CN212659794U - Adapter for converting Type-C interface into Type-C interface - Google Patents
Adapter for converting Type-C interface into Type-C interface Download PDFInfo
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- CN212659794U CN212659794U CN202021913376.9U CN202021913376U CN212659794U CN 212659794 U CN212659794 U CN 212659794U CN 202021913376 U CN202021913376 U CN 202021913376U CN 212659794 U CN212659794 U CN 212659794U
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Abstract
The application discloses adapter of Type-C interface transfer Type-C interface, including first Type-C interface, second Type-C interface and agreement chip. Because the protocol chip is added, when two ends of the adapter are connected with the equipment through the Type-C terminal, the protocol chip is communicated with the equipment connected with the first Type-C interface and the equipment connected with the second Type-C interface through the CC protocol to judge whether the Type-C terminal connected with the first Type-C interface and the Type-C terminal connected with the second Type-C interface are connected in a positive sequence or a reverse sequence, when the Type-C terminal is judged to be connected in the positive sequence, the first protocol signal channel is communicated with the third protocol signal channel, the second protocol signal channel is communicated with the fourth protocol signal channel, when the Type-C terminal is judged to be connected in the reverse sequence, the first protocol signal channel is communicated with the fourth protocol signal channel, the second protocol signal channel is communicated with the third protocol signal channel, so that when the Type-C terminal is inserted into the Type-C interface of the adapter, the front and the back do not need to be distinguished.
Description
Technical Field
The invention relates to computer accessories, in particular to an adapter for converting a Type-C interface into a Type-C interface.
Background
The adapter of Type-C interface to Type-C interface is usually used for being connected with the data line that both ends are the Type-C terminal. Specifically, in an application scenario, two interfaces of the adapter are connected to the data line, so as to connect two short data lines into a long data line. In another application scenario, when the interface of the computer host is located at a position which is inconvenient to connect, such as below a desk, one interface of the adapter is connected with the interface of the computer host through a data line, and the other interface of the adapter is located at a position which is convenient to connect, such as a desktop, so that a user can conveniently realize the connection between the external equipment and the computer host through the other interface of the adapter. However, the internal line of the adapter for converting the Type-C interface into the Type-C interface in the prior art is connected in a direct connection mode, so that the front side and the back side need to be distinguished when the Type-C terminal is connected with the Type-C interface of the adapter, on one hand, the original purpose of designing the Type-C terminal (the front side and the back side do not need to be distinguished), and on the other hand, the use experience of a user on a product is poor.
Disclosure of Invention
The invention mainly solves the technical problems that: when the Type-C interface of current adapter is connected with the Type-C terminal, the Type-C terminal need distinguish the positive and negative.
According to a first aspect, an embodiment provides an adaptor for converting a Type-C interface to a Type-C interface, including:
the first Type-C interface is used for being connected with a Type-C terminal;
the first Type-C interface is connected with the second Type-C interface, and the second Type-C interface is used for being connected with another Type-C terminal;
the protocol chip is connected with the first Type-C interface and the second Type-C interface, a first protocol signal channel and a second protocol signal channel are communicated between the protocol chip and the first Type-C interface, and a third protocol signal channel and a fourth protocol signal channel are communicated between the protocol chip and the second Type-C interface;
the protocol chip is used for carrying out CC protocol communication with equipment connected with the first Type-C interface and equipment connected with the second Type-C interface so as to judge whether a Type-C terminal connected with the first Type-C interface and a Type-C terminal connected with the second Type-C interface are in positive sequence connection or reverse sequence connection, when the positive sequence connection is judged, the first protocol signal channel is communicated with the third protocol signal channel, the second protocol signal channel is communicated with the fourth protocol signal channel, and when the reverse sequence connection is judged, the first protocol signal channel is communicated with the fourth protocol signal channel and the second protocol signal channel is communicated with the third protocol signal channel; and judging that one interface of the first Type-C interface and the second Type-C interface is an uplink interface, and the other interface is a downlink interface, so that the uplink interface is allowed to output signals to the downlink interface.
In one embodiment, the high-speed switching device further comprises a high-speed switching chip, wherein the high-speed switching chip is connected with the protocol chip, the first Type-C interface and the second Type-C interface, at least one group of high-speed signal channels are communicated among the high-speed switching chip, the first Type-C interface and the second Type-C interface, and each group of high-speed signal channels comprises a first number channel, a second number channel, a third number channel and a fourth number channel; the first channel and the second channel both communicate the first Type-C interface with the high-speed switching chip, and the third channel and the fourth channel both communicate the second Type-C interface with the high-speed switching chip;
when the agreement chip judges the Type-C terminal that the Type-C interface of first Type-C interface connection and the Type-C terminal that the second Type-C interface is connected, switch the chip at a high speed and communicate No. one passageway and No. three passageways, with No. two passageways and No. four passageways intercommunication, when the agreement chip judges the Type-C terminal that first Type-C interface connection and the Type-C terminal that the second Type-C interface is connected for the reverse order, switch the chip at a high speed and communicate No. one passageway and No. four passageways, communicate No. two passageways and No. three passageways.
In one embodiment, the high-speed signal channels include a differential signal channel and a single-ended signal channel, and when the high-speed signal channels are differential signal channels, the first channel, the second channel, the third channel and the fourth channel of the group of high-speed signal channels all include two sub-channels; and when the high-speed signal channel is a single-ended signal channel, the first channel, the second channel, the third channel and the fourth channel of the group of high-speed signal channels are single channels.
In one embodiment, three groups of high-speed signal channels are communicated among the high-speed switching chip, the first Type-C interface and the second Type-C interface, two of the three groups of high-speed signal channels are differential signal channels, and the other group of the three groups of high-speed signal channels is a single-ended signal channel.
In one embodiment, the power supply device further comprises a first power supply chip and a power supply switch chip, wherein the first power supply chip is connected with the protocol chip and the power supply switch chip, and the power supply switch chip is connected with the first Type-C interface, the second Type-C interface and the protocol chip.
In one embodiment, the first power chip is a 20V to 5V power chip.
In one embodiment, the power supply further comprises a second power supply chip, the second power supply chip is connected with the high-speed switching chip and the first power supply chip, and the second power supply chip is used for supplying power to the high-speed switching chip.
In one embodiment, the second power chip is a 5V to 3.3V power chip.
In one embodiment, a low-speed signal channel is communicated between the first Type-C interface and the second Type-C interface and is used for transmitting USB2.0 signals.
In one embodiment, the mobile phone further comprises a shell, and the first Type-C interface and the second Type-C interface are arranged on the shell.
According to the adapter for converting the Type-C interface into the Type-C interface of the above embodiment, since the protocol chip is added, when both ends of the adapter are connected to the device through the Type-C terminal, the protocol chip performs CC protocol communication with the device connected to the first Type-C interface and the device connected to the second Type-C interface to determine whether the Type-C terminal connected to the first Type-C interface and the Type-C terminal connected to the second Type-C interface are connected in a forward order or in a reverse order, when it is determined that the Type-C terminal and the Type-C terminal connected to the second Type-C interface are connected in a forward order, the first protocol signal channel is communicated with the third protocol signal channel, the second protocol signal channel is communicated with the fourth protocol signal channel, when it is determined that the Type-C terminal and the Type-C terminal are connected in a reverse order, the first protocol signal channel is communicated with the fourth protocol signal channel, and the second protocol signal channel is communicated with the third protocol signal channel, when the Type-C terminal is inserted into the Type-C interface of the adapter, the front side and the back side do not need to be distinguished.
Drawings
FIG. 1 is a block diagram of the internal structure of an adapter according to one embodiment of the present application;
fig. 2 is a schematic structural diagram of an adapter according to an embodiment of the present application.
Reference numerals: 1. a first Type-C interface; 2. a second Type-C interface; 3. a protocol chip; 4. switching the chip at a high speed; 5. a first power supply chip; 6. a power switch chip; 7. a second power supply chip; 8. a high-speed signal channel; 81. a first channel; 82. a second channel; 83. channel three; 84. channel four; 9. a low speed signal path; 10. a first protocol signal channel; 11. a second protocol signal channel; 12. a third protocol signal channel; 13. a fourth protocol signal channel; 14. a housing.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
This implementation provides an adapter that Type-C interface changes Type-C interface.
Referring to fig. 1 and 2, the adaptor includes a first Type-C interface 1, a second Type-C interface 2, and a protocol chip 3.
First Type-C interface 1 is used for being connected with a Type-C terminal, and first Type-C interface 1 and second Type-C interface 2 are connected, and second Type-C interface 2 is used for being connected with another Type-C terminal. Protocol chip 3 is connected with first Type-C interface 1 and second Type-C interface 2, and it has first agreement signal channel 10 and second agreement signal channel 11 to communicate between protocol chip 3 and first Type-C interface 1, and it has third agreement signal channel 12 and fourth agreement signal channel 13 to communicate between protocol chip 3 and second Type-C interface 2.
The protocol chip 3 is used for performing CC protocol communication with equipment connected with the first Type-C interface 1 and equipment connected with the second Type-C interface 2 to judge whether a Type-C terminal connected with the first Type-C interface 1 and a Type-C terminal connected with the second Type-C interface 2 are in positive sequence connection or reverse sequence connection, when the positive sequence connection is judged, the first protocol signal channel 10 is communicated with the third protocol signal channel 12, the second protocol signal channel 11 is communicated with the fourth protocol signal channel 13, when the reverse sequence connection is judged, the first protocol signal channel 10 is communicated with the fourth protocol signal channel 13, and the second protocol signal channel 11 is communicated with the third protocol signal channel 12; and judging that one interface of the first Type-C interface 1 and the second Type-C interface 2 is an uplink interface, and the other interface is a downlink interface, so that the uplink interface is allowed to output signals to the downlink interface.
Due to the addition of the protocol chip 3, when both ends of the adaptor are connected with the device through the Type-C terminal, the protocol chip 3 performs CC protocol communication with the device connected with the first Type-C interface 1 and the device connected with the second Type-C interface 2 to judge whether the Type-C terminal connected with the first Type-C interface 1 and the Type-C terminal connected with the second Type-C interface 2 are connected in a positive sequence or a reverse sequence, when the judgment is made that the Type-C terminal is connected in the positive sequence, the first protocol signal channel 10 is communicated with the third protocol signal channel 12, the second protocol signal channel 11 is communicated with the fourth protocol signal channel 13, when the judgment is made that the Type-C terminal is connected in the reverse sequence, the first protocol signal channel 10 is communicated with the fourth protocol signal channel 13, the second protocol signal channel 11 is communicated with the third protocol signal channel 12, so that when the Type-C terminal is inserted into the Type-C interface of the adaptor, the front and the back do not need to be distinguished.
Specifically, when the "positive sequence connection" is performed, the cc1 pin of one Type-C terminal is connected to the first protocol signal channel 10, the cc1 pin of the other Type-C terminal is connected to the third protocol signal channel 12, the cc2 pin of one Type-C terminal is connected to the second protocol signal channel 11, and the cc2 pin of the other Type-C terminal is connected to the fourth protocol signal channel 13, so that the first protocol signal channel 10 is communicated with the third protocol signal channel 12, and the second protocol signal channel 11 is communicated with the fourth protocol signal channel 13, and normal connection can be achieved. When the front side and the back side of one of the Type-C terminals are inserted reversely, the "reverse connection" and the "reverse connection" will be caused, for example, the cc1 pin of one Type-C terminal is connected to the first protocol signal channel 10, the cc1 pin of the other Type-C terminal is connected to the fourth protocol signal channel 13, the cc2 pin of one Type-C terminal is connected to the second protocol signal channel 11, and the cc2 pin of the other Type-C terminal is connected to the third protocol signal channel 12, so that the first protocol signal channel 10 and the fourth protocol signal channel 13 need to be communicated, and the second protocol signal channel 11 and the third protocol signal channel 12 need to be communicated, so that the normal connection can be realized.
Note that the device connected to the "upstream port" is typically a notebook computer or the like, and the device connected to the "downstream port" is typically a hard disk, a display screen, or the like.
Referring to fig. 1 and 2, in an embodiment, the adaptor further includes a high-speed switching chip 4, the high-speed switching chip 4 is connected to the protocol chip 3, the first Type-C interface 1 and the second Type-C interface 2, at least one group of high-speed signal channels 8 is communicated between the high-speed switching chip 4, the first Type-C interface 1 and the second Type-C interface 2, and each group of high-speed signal channels 8 includes a first number channel 81, a second number channel 82, a third number channel 83 and a fourth number channel 84; no. one passageway 81 and No. two passageways 82 all communicate first Type-C interface 1 with high-speed switching chip 4, and No. three passageways 83 and No. four passageways 84 all communicate second Type-C interface 2 with high-speed switching chip 4.
When the protocol chip 3 judges that the Type-C terminal that the first Type-C interface 1 is connected and the Type-C terminal that the second Type-C interface 2 is connected are connected in a positive sequence, the high-speed switching chip 4 communicates the first channel 81 with the third channel 83, communicates the second channel 82 with the fourth channel 84, and when the protocol chip 3 judges that the Type-C terminal that the first Type-C interface 1 is connected and the Type-C terminal that the second Type-C interface 2 is connected in a negative sequence, the high-speed switching chip 4 communicates the first channel 81 with the fourth channel 84, and communicates the second channel 82 with the third channel 83.
High-speed switching chip 4 is connected with agreement chip 3, and agreement chip 3 communicates through the agreement, and after judging the positive order of two Type-C terminals and connecting or the reverse order is connected, high-speed switching chip 4 carries out the switching of 8 connected modes of high-speed signal channel according to the judgement of agreement chip 3, and its switching principle is similar with the principle that agreement chip 3 switches protocol signal channel. Specifically, the protocol chip 3 may be an FL7102 chip, and the high-speed switching chip 4 may be a PI3USB31532 chip.
It should be noted that the high speed signal path 8 is used for transmitting signals with high transmission rate, such as TX1+ signal, TX 1-signal, RX1+ signal, RX 1-signal, TX2+ signal, TX 2-signal, RX2+ signal, RX 2-signal, SBU 1-signal, SBU 2-signal, etc. The low-speed signal channel 9 is used for transmitting signals with low transmission rate, such as USB2.0 signals.
Referring to fig. 1 and 2, in one embodiment, the high-speed signal paths 8 include a differential signal path and a single-ended signal path, and when the high-speed signal paths 8 are differential signal paths, the first path 81, the second path 82, the third path 83, and the fourth path 84 of the high-speed signal paths 8 include two sub-paths. When the high-speed signal channel 8 is a single-ended signal channel, the first channel 81, the second channel 82, the third channel 83, and the fourth channel 84 of the high-speed signal channel 8 are single channels. For example, the TX1+ signal and the TX 1-signal are a set of differential signals, which are transmitted through one sub-channel, respectively, and the SBU1 signal and the SBU2 signal are single-ended signals.
Referring to fig. 1 and 2, in an embodiment, three sets of high-speed signal channels 8 are communicated among the high-speed switching chip 4, the first Type-C interface 1 and the second Type-C interface 2, two of the three sets of high-speed signal channels 8 are differential signal channels, and the other set of the three sets of high-speed signal channels 8 is a single-ended signal channel.
Referring to fig. 1 and 2, in an embodiment, the adaptor further includes a first power chip 5 and a power switch chip 6, the first power chip 5 is connected to the protocol chip 3 and the power switch chip 6, and the power switch chip 6 is connected to the first Type-C interface 1, the second Type-C interface 2 and the protocol chip 3.
Referring to fig. 1 and 2, in an embodiment, the first power chip 5 is a 20V to 5V power chip.
Referring to fig. 1 and 2, in an embodiment, the adaptor further includes a second power chip 7, the second power chip 7 is connected to the high-speed switching chip 4 and the first power chip 5, and the second power chip 7 is used for supplying power to the high-speed switching chip 4.
Referring to fig. 1 and 2, in an embodiment, the second power chip 7 is a 5V to 3.3V power chip.
Referring to fig. 1 and 2, in an embodiment, a low-speed signal channel 9 is connected between the first Type-C interface 1 and the second Type-C interface 2, and the low-speed signal channel 9 is used for transmitting USB2.0 signals.
Referring to fig. 1 and 2, in an embodiment, the adaptor further includes a housing 14, and the first Type-C interface 1 and the second Type-C interface 2 are disposed on the housing 14. Specifically, first Type-C interface 1 and second Type-C interface 2 set up respectively in the relative both sides of casing 14.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.
Claims (10)
1. The utility model provides an adapter that Type-C interface changes Type-C interface which characterized in that includes:
the first Type-C interface is used for being connected with a Type-C terminal;
the first Type-C interface is connected with the second Type-C interface, and the second Type-C interface is used for being connected with another Type-C terminal;
the protocol chip is connected with the first Type-C interface and the second Type-C interface, a first protocol signal channel and a second protocol signal channel are communicated between the protocol chip and the first Type-C interface, and a third protocol signal channel and a fourth protocol signal channel are communicated between the protocol chip and the second Type-C interface;
the protocol chip is used for carrying out CC protocol communication with equipment connected with the first Type-C interface and equipment connected with the second Type-C interface so as to judge whether a Type-C terminal connected with the first Type-C interface and a Type-C terminal connected with the second Type-C interface are in positive sequence connection or reverse sequence connection, when the first Type-C interface is judged to be in positive sequence connection, the first protocol signal channel is communicated with the third protocol signal channel, the second protocol signal channel is communicated with the fourth protocol signal channel, and when the second Type-C interface is judged to be in reverse sequence connection, the first protocol signal channel is communicated with the fourth protocol signal channel, and the second protocol signal channel is communicated with the third protocol signal channel; and judging that one interface of the first Type-C interface and the second Type-C interface is an uplink interface, and the other interface is a downlink interface, so that the uplink interface is allowed to output signals to the downlink interface.
2. The adapter according to claim 1, further comprising a high-speed switching chip, wherein the high-speed switching chip is connected with the protocol chip, the first Type-C interface and the second Type-C interface, at least one group of high-speed signal channels are communicated among the high-speed switching chip, the first Type-C interface and the second Type-C interface, and each group of high-speed signal channels includes a first-number channel, a second-number channel, a third-number channel and a fourth-number channel; the first channel and the second channel both communicate the first Type-C interface with the high-speed switching chip, and the third channel and the fourth channel both communicate the second Type-C interface with the high-speed switching chip;
when the agreement chip judges the Type-C terminal that the Type-C interface of first Type-C interface connection and the Type-C terminal that the second Type-C interface is connected, switch the chip at a high speed and communicate No. one passageway and No. three passageways, with No. two passageways and No. four passageways intercommunication, when the agreement chip judges the Type-C terminal that first Type-C interface connection and the Type-C terminal that the second Type-C interface is connected for the reverse order, switch the chip at a high speed and communicate No. one passageway and No. four passageways, communicate No. two passageways and No. three passageways.
3. The adapter of claim 2, wherein the high-speed signal paths include a differential signal path and a single-ended signal path, and when the high-speed signal paths are differential signal paths, the first path, the second path, the third path, and the fourth path of the set of high-speed signal paths each include two sub-paths; and when the high-speed signal channel is a single-ended signal channel, the first channel, the second channel, the third channel and the fourth channel of the group of high-speed signal channels are single channels.
4. The adapter of claim 3, wherein three groups of high-speed signal channels are communicated among the high-speed switching chip, the first Type-C interface and the second Type-C interface, two of the three groups of high-speed signal channels are differential signal channels, and the other group of the three groups of high-speed signal channels is a single-ended signal channel.
5. The adaptor of claim 2, further comprising a first power chip and a power switch chip, the first power chip being connected to the protocol chip and the power switch chip, the power switch chip being connected to the first Type-C interface, the second Type-C interface, and the protocol chip.
6. The adapter of claim 5, wherein the first power chip is a 20V to 5V power chip.
7. The adapter of claim 5, further comprising a second power chip connected to the high-speed switching chip and the first power chip, the second power chip being configured to supply power to the high-speed switching chip.
8. The adapter of claim 7, wherein the second power chip is a 5V to 3.3V power chip.
9. The adapter of any one of claims 1-8, wherein a low-speed signal channel is connected between the first Type-C interface and the second Type-C interface, and the low-speed signal channel is used for transmitting USB2.0 signals.
10. The adapter of any of claims 1-8, further comprising a housing, wherein the first Type-C interface and the second Type-C interface are disposed on the housing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202021913376.9U CN212659794U (en) | 2020-09-04 | 2020-09-04 | Adapter for converting Type-C interface into Type-C interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021913376.9U CN212659794U (en) | 2020-09-04 | 2020-09-04 | Adapter for converting Type-C interface into Type-C interface |
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| CN212659794U true CN212659794U (en) | 2021-03-05 |
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| CN202021913376.9U Active CN212659794U (en) | 2020-09-04 | 2020-09-04 | Adapter for converting Type-C interface into Type-C interface |
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Address after: 518109 1st-6th floor, 1st floor, 6th floor, No.7 office building, yuan plant area, Longcheng industry and trade, Gaofeng community, Dalang street, Longhua District, Shenzhen, Guangdong Province Patentee after: Shenzhen lvlian Technology Co.,Ltd. Address before: 518109 1st-6th floor, 1st floor, 6th floor, No.7 office building, yuan plant area, Longcheng industry and trade, Gaofeng community, Dalang street, Longhua District, Shenzhen, Guangdong Province Patentee before: SHENZHEN GREEN CONNECTION TECHNOLOGY Co.,Ltd. |