CN212659074U - Small decoder mainboard with X86-architecture double high-definition interfaces - Google Patents
Small decoder mainboard with X86-architecture double high-definition interfaces Download PDFInfo
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- CN212659074U CN212659074U CN202021332447.6U CN202021332447U CN212659074U CN 212659074 U CN212659074 U CN 212659074U CN 202021332447 U CN202021332447 U CN 202021332447U CN 212659074 U CN212659074 U CN 212659074U
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- interface
- usb
- mainboard
- msata
- plug pin
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Abstract
The utility model discloses a small-size decoder mainboard of two high definition interfaces of X86 framework, include: the mainboard, the mainboard includes paster CPU, paster memory, bee calling organ, USB contact pin, fan contact pin, switch contact pin, DC 12V interface, LAN interface, USB interface, DP interface, HDMI interface, mSATA slot, connector, PCB, the utility model discloses a small-size decoder mainboard of two high definition interfaces of X86 framework has reasonable in design characteristics.
Description
Technical Field
The utility model relates to a small-size decoder mainboard technical field of two high definition interfaces of X86 framework, more specifically relates to a small-size decoder mainboard of two high definition interfaces of X86 framework.
Background
At present, a small mainboard is usually used in an industrial control server, but the layout of the existing small mainboard is fixed, so that the problem of inconvenient function expansion or interface increase is caused.
Disclosure of Invention
The present invention aims at solving at least one of the technical problems in the related art to a certain extent. Therefore, an object of the utility model is to provide a small-size decoder mainboard of two high definition interfaces of X86 framework, this small-size decoder mainboard of two high definition interfaces of X86 framework have reasonable in design characteristics.
The utility model discloses a realize solving above-mentioned technical problem, provide following technical scheme: an X86 architecture dual high definition interface mini decoder motherboard comprising: the mainboard comprises an Intel patch CPU, a patch memory, a buzzer, a USB (universal serial bus) pin, a fan pin, a switch pin, a DC 12V interface, a LAN (local area network) interface, a USB (universal serial bus) interface, a DP (data processing) interface, an HDMI (high-definition multimedia interface), an mSATA slot, a connector and a PCB (printed circuit board), wherein the DC 12V interface is electrically connected with a DC 12V power supply, the DC 12V power supply is connected with the DC 12V interface (17), the USB equipment is connected with the USB interface (19) or the USB pin (14), the display equipment is connected with the DP interface (20) or the HDMI (21), the mSATA hard disk is inserted into the ATA mSATA slot (22), the mainboard (100) is started by triggering the switch pin (16), instructions are input through the USB equipment, the patch CPU (11), the patch memory (12), the mSATA hard disk and the like.
To sum up, the utility model discloses following beneficial effect has:
1. the PCB board type is designed to be easily cut into a CPCI standard type, mounting holes and CPCI connector mounting positions are reserved, and the appearance of the PCB can be changed according to different product forms.
2. 2 misplug-proof high-speed signal connectors are selected to provide a communication channel for the expansion board.
3. And the patch CPU and the patch memory are adopted, so that the space is saved.
Drawings
Fig. 1 is a schematic front structural diagram of a small decoder motherboard with an X86 architecture dual high definition interface according to the present invention;
fig. 2 is a schematic reverse structure diagram of a small decoder motherboard with an X86 architecture dual high definition interface according to the present invention;
fig. 3 is a schematic circuit block diagram structure diagram of a small decoder motherboard with an X86 architecture dual high definition interface according to the present invention;
in the drawings, the components represented by the respective reference numerals are listed below:
100. a main board; 11. a patch CPU; 12. a patch memory; 13. a buzzer; 14. USB pin; 15. inserting a pin into a fan; 16. a switch pin; 17. a DC 12V interface; 18. a LAN interface; 19. a USB interface; 20. a DP interface; 21. an HDMI interface; 22. a mSATA slot; 23. a connector; 24. a PCB is provided.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present invention, and should not be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like, indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," and "fixed" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.
In the present application, unless expressly stated or limited otherwise, the first feature may be directly on or directly under the second feature or indirectly via intermediate members. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
As shown in fig. 1 to 3, the present embodiment includes: the main board 100 includes a chip CPU11, a chip memory 12, a buzzer 13, a USB pin 14, a fan pin 15, a switch pin 16, a DC 12V interface 17, a LAN interface 18, a USB interface 19, a DP interface 20, an HDMI interface 21, a mSATA slot 22, a connector 23, and a PCB24, where the DC 12V interface 17 is electrically connected to a DC 12V power supply, the DC 12V power supply is connected to the DC 12V interface 17, the USB device is connected to the USB interface 19 or the USB pin 14, the display device is connected to the DP interface 20 or the HDMI interface 21, a mSATA hard disk is inserted into the mSATA slot 22, the main board 100 is started by triggering the switch pin 16, an instruction is input through the USB device, and the chip CPU11, the chip memory 12, and the mSATA hard disk work cooperatively to complete operations such as calculation, temporary storage, and an output result is reflected on the display.
Best mode 1: the DC 12V power is accessed to the DC 12V interface 17, the USB device is accessed to the USB interface 19, the display device is accessed to the DP interface 20 or the HDMI interface 21, the mSATA hard disk is inserted into the mSATA slot 22, the mainboard 100 is started by triggering the switch pin, the instruction is input through the USB device, the patch CPU11, the patch memory 12, the mSATA and other cooperative work are completed, the operations of calculation, temporary storage, storage and the like are completed, and the output result is fed back to the external device.
Best mode 2: and more output interfaces are obtained by connecting the special high-speed signal connector with the expansion board. The DC 12V power supply is connected to the DC 12V interface 17 to supply power to the main board 100 and the expansion board at the same time, and according to the use scene, a proper external interface is selected, an instruction is input, and an output result is fed back to the external equipment.
Best mode 3: a section of the PCB which is not wired at the tail end of the main board is removed, the CPCI connector is pressed and connected, the CPCI case can be installed, and the CPCI case can be matched with other board cards to serve as the main board of the whole machine to drive the whole equipment.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that various changes, modifications, substitutions and alterations can be made therein by those skilled in the art without departing from the scope of the present invention.
Claims (1)
1. An X86 architecture dual high definition interface mini decoder motherboard, comprising: the mainboard comprises a chip CPU, a chip memory, a buzzer, a USB plug pin, a fan plug pin, a switch plug pin, a DC 12V interface, a LAN interface, a USB interface, a DP interface, an HDMI interface, an mSATA slot, a connector and a PCB, wherein the DC 12V interface is electrically connected with a DC 12V power supply, the DC 12V power supply is connected with the DC 12V interface (17), the USB equipment is connected with the USB interface (19) or the USB plug pin (14), the display equipment is connected with the DP interface (20) or the HDMI interface (21), the mSATA hard disk is inserted into the mSATA slot (22), the mainboard (100) is started by triggering the switch plug pin (16), instructions are input through the USB equipment, the chip CPU (11), the chip memory (12), the mSATA hard disk and the like cooperatively work to complete calculation, temporary storage and storage operations, and output results are reflected to the display equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202021332447.6U CN212659074U (en) | 2020-07-09 | 2020-07-09 | Small decoder mainboard with X86-architecture double high-definition interfaces |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202021332447.6U CN212659074U (en) | 2020-07-09 | 2020-07-09 | Small decoder mainboard with X86-architecture double high-definition interfaces |
Publications (1)
Publication Number | Publication Date |
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CN212659074U true CN212659074U (en) | 2021-03-05 |
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CN202021332447.6U Expired - Fee Related CN212659074U (en) | 2020-07-09 | 2020-07-09 | Small decoder mainboard with X86-architecture double high-definition interfaces |
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CN (1) | CN212659074U (en) |
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2020
- 2020-07-09 CN CN202021332447.6U patent/CN212659074U/en not_active Expired - Fee Related
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20210305 Termination date: 20210709 |
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CF01 | Termination of patent right due to non-payment of annual fee |