CN212623684U

CN212623684U - IO module based on ASI bus

Info

Publication number: CN212623684U
Application number: CN202021641220.XU
Authority: CN
Inventors: 方立国; 吕岳
Original assignee: Jiaxing Shansuo Intelligent Technology Co ltd
Current assignee: Jiaxing Shansuo Intelligent Technology Co ltd
Priority date: 2020-08-10
Filing date: 2020-08-10
Publication date: 2021-02-26
Anticipated expiration: 2030-08-10

Abstract

An IO module based on an ASI bus comprises a signal acquisition unit, a signal analysis unit, a modulation unit and an output unit, wherein the signal acquisition unit transmits a signal input by external IO to the signal analysis unit; the signal analysis unit analyzes and packs the signals; the modulation unit modulates the signal, and the output unit is used for sending the signal to an external IO. The utility model discloses can insert 8 IO positions and carry out input/output, improve the IO bus capacity of one time, satisfy the IO position expansion requirement of automated control scene.

Description

IO module based on ASI bus

Technical Field

The utility model relates to the field of communication technology, concretely relates to IO module based on ASI bus.

Background

The ASI (Actuator-Sensor-Interface) is an English abbreviation of an Actuator-Sensor-Interface, is a bus network used between a controller (main station) and a Sensor/Actuator (slave station) for bidirectional information exchange, has the characteristics of simple wiring, convenience in maintenance and the like, and has a good popularization prospect in industrial application.

The sensor and the actuator under the ASI bus, namely an IO control point, can be connected to an ASI network through an IO module based on the ASI bus, and transmits a discrete digital quantity input signal to a main station through the ASI bus, and simultaneously transmits a control signal from the main station to an output point.

Nowadays, more and more distributed IO devices have been used to automate field areas, especially numerous distributed sensors and actuators as intelligent sentinels directly on the field. Therefore, higher demands are made on the IO capacity of the ASI bus, but the common products in the market are dominated by 4-point IO or less modules. In ASI3.0 and the following standards, each ASI bus can mount at most 62 slave modules, and the total IO capacity is limited, i.e. 4 × 62 — 248 IO points, and the capacity of ASI slave devices is limited.

In addition, there are 8-input and 8-output slave stations in the market, but the method for implementing the slave stations is to integrate and assemble two 4I4O modules into one housing, and in essence, 8I8O is implemented by two 4I4O slave stations, one module occupies two ASI slave station addresses, and the total IO capacity of the module is the same as that of a general 4I4O slave station, that is, 4x62 is 248 IO points, which is difficult to meet the requirements in the field of automation.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a solve the above-mentioned problem that prior art exists, provide an IO module based on ASI bus, enlarge bus IO capacity, satisfied the on-the-spot expansion requirement of automated control.

In order to achieve the above object, the utility model provides a IO module based on ASI bus, including signal acquisition unit, the analytic unit of signal, modulation unit and output unit, wherein:

when the IO module receives an incoming signal from an external IO input:

the signal acquisition unit sends the input signal to the signal analysis unit;

the signal analysis unit analyzes and packs the signals sent by the signal acquisition unit according to an ASI protocol, and then sends the packed signals to the modulation unit;

the modulation unit modulates the signal sent by the signal analysis unit, then sends the modulated signal to the master station,

when the IO module receives an incoming signal output from the master station:

the modulation unit demodulates the signal output by the main station and sends the demodulated signal to the signal analysis unit;

and after the signal analysis unit analyzes the demodulation signal sent by the modulation unit according to an ASI protocol, the signal analysis unit selects to send the signal obtained by analysis to the output unit and sends the signal to an external IO through the output unit.

Further, the modulation unit is a special chip with an ASI bus modulation function.

Further, the special chip is ASI 4U.

Further, the signal analysis unit is an MCU.

Further, the input and output point defined by the ASI protocol is 8 points.

Further, the transmission protocol of the output unit is an I2C protocol.

The utility model discloses when can be so that 8 IO points of slave station module access IO points, the IO capacity of bus has improved one time, has high price/performance ratio spreading value.

Drawings

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

Fig. 1 is the utility model discloses IO module structure schematic diagram based on the ASI bus.

FIG. 2 is a core electrical schematic diagram of the present invention;

FIG. 3 is a schematic diagram of signal flow connections at the time of input in an embodiment of the present application;

fig. 4 is a schematic diagram of signal flow connection when outputting according to the embodiment of the present application.

The purpose of the present invention is to provide a novel and improved method and apparatus for operating a computer.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an IO module based on an ASI bus according to the present application, including a modulation unit, a signal analysis unit, a signal acquisition unit, and an output unit.

Referring to fig. 2, fig. 2 is a schematic circuit diagram of an IO module structure according to an embodiment of the present application.

In this embodiment, the modulation unit is a dedicated chip having an ASI bus modulation function, and preferably, the signal modulation unit uses a dedicated chip ASI4U having an ASI bus modulation function. The ASI bus is modulated by an alternating pulse modulation mode (APM), which transmits information in manchester ii and in the form of a signal waveform in sin 2.

In this embodiment, the signal analysis unit is an MCU, and preferably adopts a current mainstream MCU chip STM32F103 single chip microcomputer, and analyzes the signal on the bus according to the ASI3.0 standard, and responds to the request of the master station as required to complete the main function of the 8-point IO module.

When the ASI4U chip transmits signals to the STM32F103, a 5V compatible pin is selected at the side of the single chip microcomputer and is directly connected;

when the STM32F103 transmits signals to the ASI4U chip, the mode of single chip microcomputer leakage output and 5V level pull-up is adopted to meet the 5V requirement of the protocol chip.

The output unit is based on the I2C agreement, through the control to SCL and SDA line high-low level chronogenesis, comes required signal and carries out the transmission of signal.

In this application, the signal that will send from outside IO, through the IO module of this application, send to main website at last and define as "input", will follow the signal that main website sent, through the IO module of this application, send to outside IO at last and define as "output".

Referring to fig. 3, fig. 3 is a schematic diagram illustrating a signal flow direction connection when an input signal according to an embodiment of the present application is input, where the signal flow direction is shown by a dotted line in the figure, and the input signal according to the embodiment of the present application directly enters a single chip microcomputer after being isolated by an optical coupler.

The input ports (input 1-input 8) of the signal acquisition units receive signals input by the slave stations, and transmit the signals input by the slave stations to the input ports (PA7, PB0, PB1, PB1, PB2, PA3-PA6) corresponding to the signal analysis units through the output ports (PA7, PB0, PB1, PB1, PB2, PA3-PA 6);

the signal analysis unit analyzes and packages the signals sent by the signal acquisition unit according to an ASI protocol, and sends the packaged signals to ports (PB8-PB15) corresponding to the modulation unit through output ports (PB8-PB15) of the signal analysis unit;

after modulating the signal sent by the signal analysis unit, the modulation unit sends the modulated signal to the master station through an ASI bus (ASI +/ASI-).

Referring to fig. 4, fig. 4 is a schematic diagram illustrating the signal flow direction when the signal is outputted according to the embodiment of the present application, wherein the signal flow direction is shown by a dashed line in the diagram.

The main station outputs signals through an ASI bus (ASI +/ASI-), the modulation unit demodulates the signals output by the main station, and the signals obtained through demodulation are sent to the signal analysis unit through a port (PB8-PB 15);

after the signal analysis unit analyzes the demodulation signal sent by the modulation unit according to the ASI protocol, the signal analysis unit selects the port (ports 14 and 15) for sending the signal obtained by analysis to the OUTPUT unit through the ports (P6 and P7) and sends the signal to the external IO through the OUTPUT ports (OUTPUT1 to OUTPUT8) of the OUTPUT unit.

Therefore, the input signals of the embodiment of the application directly enter the single chip microcomputer STM32F103 after optical coupling isolation, and the output signals adopt a scalable mode (two signals of OUT _ CLK and OUT _ DAT are connected to the output unit and transmit output information in an I2C mode).

When the user only needs to input signals, only 8-point input function is provided, so that the occupied space of the module can be further reduced.

When a user needs an 8-point output function, an 8-point IO module which is expanded into 8I plus 8O through an expansion mode is given.

Therefore, the technical effects obtained by the application are as follows:

the utility model discloses can insert 8 some IO positions, improve the IO capacity of bus by one time, reach 8X62 and 496 IO positions, expand the address range of ASI bus. That is to say, compared with the prior art, an 8I8O module only occupies one slave address, 62 slave modules can be completely mounted on one bus, and the IO capacity of the bus is doubled compared with that of the products on the market, that is, 8x62 is 496 IO points.

Although specific embodiments of the present invention have been described above, it will be appreciated by those skilled in the art that these are merely examples and that many changes and modifications may be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims.

Claims

1. An IO module based on ASI bus, its characterized in that: including signal acquisition unit, signal analysis unit, modulation unit and output unit, wherein:

when the IO module receives an incoming signal from an external IO input:

the signal acquisition unit transmits a signal input by external IO to the signal analysis unit;

when the IO module receives an incoming signal output from the master station:

2. An IO module according to claim 1, wherein the modulation unit is a dedicated chip having an ASI bus modulation function.

3. An IO module as claimed in claim 2, wherein the dedicated chip is ASI 4U.

4. An IO module according to claim 1, wherein the signal resolution unit is an MCU.

5. An IO module as claimed in claim 1, wherein the ASI protocol defines input and output point locations as 8 point locations.

6. An IO module as claimed in claim 1, wherein the transport protocol of the output unit is the I2C protocol.