CN212570740U

CN212570740U - Stacked solid-state capacitor

Info

Publication number: CN212570740U
Application number: CN202021786337.7U
Authority: CN
Inventors: 杜嘉杰; 魏蓉晖
Original assignee: Dong Jia Electronics Chenzhou Co ltd
Current assignee: Dong Jia Electronics Chenzhou Co ltd
Priority date: 2020-08-24
Filing date: 2020-08-24
Publication date: 2021-02-19
Anticipated expiration: 2030-08-24

Abstract

The utility model discloses a heap solid state capacitor, including a plurality of electric capacity units, conducting structure and encapsulation unit, a plurality of electric capacity units are piled up according to the preface along piling up the direction, and every electric capacity unit includes positive pole portion and negative pole portion, and adjacent two pile up electric connection each other of electric capacity unit's negative pole portion is through first conducting layer, and conducting structure includes positive pole part and negative pole part, and positive pole part includes interconnect's first horizontal plate and first vertical plate, and negative pole part includes interconnect's second horizontal plate and second vertical plate, and electric capacity unit's positive pole portion supports to lean on in first horizontal plate or first vertical plate, and electric capacity unit's negative pole portion supports to lean on in second horizontal plate and second vertical plate, a plurality of electric capacity units of encapsulation unit cladding and partial conducting structure. Therefore, the capacitor unit configuration in two different stacking directions can be supported so as to meet the use requirement.

Description

Stacked solid-state capacitor

Technical Field

The utility model relates to a solid-state electric capacity especially relates to a heap solid-state capacitor.

Background

Capacitors have been widely used in consumer appliances, computer motherboards and their peripherals, power supplies, communication articles, automobiles, and other basic components, and are one of the indispensable components in electronic products, and their main functions include: charge storage, ac filtering, bypassing, coupling, decoupling, phase inversion, tuning, etc. Various capacitors have different capacitance characteristics and therefore, their functions and application range are different. The stacked solid-state capacitor has the advantages of high capacitance, small size and volume, excellent frequency characteristic, low manufacturing cost and wide application range, and is suitable for most electric appliances and electronic products.

However, in the conventional stacked solid-state capacitor, if the capacitor units are stacked in two different stacking directions, two corresponding conductive frames are required to be provided to support the capacitor units, which increases the complexity of the manufacturing process, increases the manufacturing time, and increases the production cost.

Therefore, it is a primary object of the present invention to provide a stacked solid-state capacitor to solve the above-mentioned problems.

SUMMERY OF THE UTILITY MODEL

An object of the present invention is to provide a stacked solid-state capacitor, which can support the configuration of capacitor units in two different stacking directions, so as to meet the requirement of use, save the manufacturing time, and reduce the manufacturing cost.

To achieve at least one of the above advantages or other advantages, an embodiment of the present invention provides a stacked solid-state capacitor. The stacked solid-state capacitor includes a plurality of capacitor units, a conductive structure and a package unit.

Each capacitor unit comprises a positive electrode part and a negative electrode part, wherein the plurality of capacitor units are sequentially stacked along the stacking direction, and the negative electrode parts of two adjacent stacked capacitor units are electrically connected with each other through a first conducting layer.

The conductive structure comprises an anode part and a cathode part, wherein the anode part comprises a first horizontal plate and a first vertical plate, the cathode part comprises a second horizontal plate and a second vertical plate, the first horizontal plate is connected with the first vertical plate, the second horizontal plate is connected with the second vertical plate, the anode part of the capacitor unit is abutted against the first horizontal plate or the first vertical plate and is electrically connected with the first horizontal plate and the first vertical plate, and the cathode part of the capacitor unit is abutted against the second horizontal plate and the second vertical plate and is electrically connected with the second horizontal plate and the second vertical plate.

The packaging unit encapsulates the plurality of capacitor units and part of the conductive structure.

In some embodiments, the stacking direction is perpendicular to the second horizontal plate.

In some embodiments, the stacking direction is perpendicular to the second vertical plate.

Further, the width of the second vertical plate corresponds to the width of the negative electrode portion of the capacitor unit.

In some embodiments, the positive electrode portions of two adjacent stacked capacitor units are electrically connected to each other by a welding structure.

In some embodiments, each capacitor unit may further include an insulating portion that circumferentially covers a portion of the surface of the positive electrode portion so that the positive electrode portion and the negative electrode portion are electrically insulated from each other.

In some embodiments, the conductive structure is made of a metal material.

In some embodiments, the surface of the conductive structure is plated with a metal layer.

In some embodiments, the negative portion is electrically connected to the negative portion through the second conductive layer.

Further, the second conductive layer is located on the surfaces of the second horizontal plate and the second vertical plate facing the negative electrode portion.

Therefore, utilize the utility model provides a heap solid state capacitor borrows the electric capacity unit that two kinds of different pile directions of borrowing by conductive structure and pile up to should the user demand, practice thrift the manufacturing time, low in production cost.

The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following preferred embodiments are listed, and the detailed description is given below with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It should be apparent that the drawings in the following description are only examples of the present application and are not intended to limit the embodiments of the present invention, and that other drawings can be derived from the drawings by those of ordinary skill in the art without inventive exercise. The drawings comprise:

fig. 1 is a schematic structural view of a conductive structure according to a first embodiment of the present invention;

fig. 2 is a schematic structural diagram of the conductive structure of the present invention; and

fig. 3 is a schematic structural diagram of a stacked solid-state capacitor according to a second embodiment of the present invention.

The attached drawings are marked as follows: 10. 10' -stacked solid state capacitors; 12-a capacitive unit; 122-positive pole part; 124-negative part; 126-an insulating part; 14-a conductive structure; 142-a positive electrode portion; 144-a negative part; 1422 — first horizontal plate; 1424 — first vertical plate; 1442 — second horizontal plate; 1444 — second vertical plate; 16-a packaging unit; 18-a first conductive layer; 20-a second conductive layer; 22-a welded structure; x, Z-stacking direction; w1 — width of second vertical panel; w2 — width of negative electrode part.

Detailed Description

Specific structural and functional details disclosed herein are merely representative and are provided for purposes of describing example embodiments of the present invention. The invention may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

In the description of the present invention, it is to be understood that the terms "center", "lateral", "up", "down", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or component being referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified. In addition, the term "comprises" and any variations thereof mean "including at least".

In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted", "connected" and "connected" are to be interpreted broadly, and may be, for example, a fixed connection, a detachable connection, or an integrally formed connection; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, and the two components can be communicated with each other. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a stacked solid-state capacitor 10 according to a first embodiment of the present invention. Note that, in fig. 1, a package unit (not shown) covering the outer side of the capacitor unit 12 is omitted. To achieve at least one of the advantages or other advantages, a first embodiment of the present invention provides a stacked solid-state capacitor 10. As shown in fig. 1, a stacked solid state capacitor 10 includes three capacitive units 12 and a conductive structure 14. Further, the conductive structure 14 includes a positive portion 142 and a negative portion 144, the positive portion 142 includes a first horizontal plate 1422 and a first vertical plate 1424, and the negative portion 144 includes a second horizontal plate 1442 and a second vertical plate 1444.

The three capacitor units 12 are sequentially stacked along the stacking direction Z. In this embodiment, the stacking direction Z is perpendicular to the second horizontal plate 1442. In other words, the three capacitor units 12 are sequentially stacked parallel to the second horizontal plate 1442. That is, the stacking direction Z of the capacitor units 12 is perpendicular to the mounting surface of the stacked solid-state capacitor 10.

The first horizontal plate 1422 connects the first vertical plate 1424, and the second horizontal plate 1442 connects the second vertical plate 1444. In one embodiment, the first horizontal plate 1422 and the first vertical plate 1424 are integrally formed, and the second horizontal plate 1442 and the second vertical plate 1444 are integrally formed.

Each capacitive cell 12 includes a positive electrode portion 122, a negative electrode portion 124, and an insulating portion 126. The insulating portion 126 circumferentially covers a part of the surface of the positive electrode portion 122 so that the positive electrode portion 122 and the negative electrode portion 124 are electrically insulated from each other. One side of the positive electrode 122 of the three capacitor units 12 abuts against the first vertical plate 1424 and is disposed on the first horizontal plate 1422, and the positive electrode 122 is electrically connected to the first horizontal plate 1422 and the first vertical plate 1424. The negative electrode portions 124 of the three capacitor units 12 abut against the second horizontal plate 1442 and the second vertical plate 1444, and are electrically connected to the second horizontal plate 1442 and the second vertical plate 1444.

The width W1 of the second vertical plate 1444 corresponds to the width W2 of the negative electrode part 124 of the capacitor unit 12. In an embodiment, the width W1 of the second vertical plate 1444 is slightly larger than the width W2 of the negative electrode part 124 of the capacitor unit 12, so as to facilitate a subsequent packaging process and to facilitate carrying the capacitor unit 12.

In addition, the negative electrode portions 124 of two adjacent stacked capacitor units 12 are electrically connected to each other through the first conductive layer 18. The negative portion 144 is electrically connected to the negative portion 124 of the capacitor unit 12 through the second conductive layer 20, and in this embodiment, the second conductive layer 20 is disposed on the surface of the second horizontal plate 1442 facing the negative portion 124, so that the second horizontal plate 1442 is electrically connected to the negative portion 124 of the capacitor unit 12.

The positive electrode 122 of the capacitor unit 12 is disposed on the first horizontal plate 1422 by welding, so that the positive electrode 122 is electrically connected to the first horizontal plate 1422. The positive electrode portions 122 of two adjacent stacked capacitor units 12 are electrically connected to each other by a welding structure 22, and the welding structure 22 is formed by welding. But is not limited thereto. In one embodiment, the positive electrode portions 122 of the capacitor units 12 may also be electrically connected to each other through a conductive adhesive. In one embodiment, the positive electrode portion 122 of the capacitor unit 12 may also be connected to the first horizontal plate 1422 or the first vertical plate 1424 of the conductive structure 14 through a conductive adhesive.

The stacked solid-state capacitor 10 further includes a packaging unit (not shown).

The encapsulation unit encapsulates the three capacitor units 12 and part of the conductive structure 14, in other words, the encapsulation unit encapsulates the three capacitor units 12, part of the positive electrode portion 142 and part of the negative electrode portion 144. The packaging unit is used to protect the stacked solid-state capacitor 10 from external environment, such as moisture, dust, and external impact. Further, the package unit may be made of any insulating material, such as epoxy (epoxy) or silicon (silicon).

Referring to fig. 2, fig. 2 is a schematic structural diagram of the conductive structure 14 of the present invention. As shown in fig. 2, the positive electrode portion 142 and the negative electrode portion 144 of the conductive structure 14 are not connected to each other and are electrically insulated from each other. Further, the conductive structure 14 may be made of a metal material, or a structure with a metal layer plated on the surface thereof, so as to ensure the conductivity of the conductive structure 14.

In addition, the number of the capacitor units 12 is not limited to three, and can be changed according to the actual capacitance requirement. The first conductive layer 18 and the second conductive layer 20 may be silver paste.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a stacked solid-state capacitor 10' according to a second embodiment of the present invention. Note that, in fig. 3, a package unit (not shown) covering the outer side of the capacitor unit 12 is omitted. To achieve at least one of the advantages or other advantages, a second embodiment of the present invention further provides a stacked solid-state capacitor 10'. The stacked solid-state capacitor 10' differs from the stacked solid-state capacitor 10 of the first embodiment in that the stacking direction X is perpendicular to the second vertical plate 1444, that is, the three capacitor units 12 are sequentially stacked on the second horizontal plate 1442 in a position parallel to the second vertical plate 1444. In this embodiment, the side edge of the positive electrode 122 of the capacitor unit 12 is abutted against the first horizontal plate 1422 and is connected to the first vertical plate 1424 by welding, so that the positive electrode 122 is electrically connected to the first vertical plate 1424. The second conductive layer 20 is disposed on the surface of the second vertical plate 1444 facing the negative electrode portion 124 of the capacitor unit 12, so that the second vertical plate 1444 is electrically connected to the negative electrode portion 124 of the capacitor unit 12.

In summary, the stacked solid-state capacitor 10, 10' provided by the present invention can utilize the conductive structure 14 to carry the capacitor units 12 stacked in two different stacking directions X, Z as required, and also has the advantages of saving manufacturing time and low production cost.

The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above description, and although the present invention has been disclosed with reference to the preferred embodiment, it is not limited to the present invention, and any skilled person in the art can make many modifications or equivalent variations by using the above disclosed method and technical contents without departing from the technical scope of the present invention, but all the simple modifications, equivalent variations and modifications made by the technical spirit of the present invention to the above embodiments are within the scope of the technical solution of the present invention.

Claims

1. A stacked solid state capacitor, comprising:

the capacitor comprises a plurality of capacitor units, a plurality of first conductive layers and a plurality of second conductive layers, wherein each capacitor unit comprises a positive electrode part and a negative electrode part, the capacitor units are sequentially stacked along the stacking direction, and the negative electrode parts of two adjacent stacked capacitor units are electrically connected with each other through the first conductive layers;

the conductive structure comprises a positive electrode part and a negative electrode part, wherein the positive electrode part comprises a first horizontal plate and a first vertical plate, the negative electrode part comprises a second horizontal plate and a second vertical plate, the first horizontal plate is connected with the first vertical plate, the second horizontal plate is connected with the second vertical plate, the positive electrode part of the capacitor unit abuts against the first horizontal plate or the first vertical plate and is electrically connected with the first horizontal plate and the first vertical plate, and the negative electrode part of the capacitor unit abuts against the second horizontal plate and the second vertical plate and is electrically connected with the second horizontal plate and the second vertical plate; and

and the packaging unit is used for coating the plurality of capacitor units and part of the conductive structure.

2. The stacked solid state capacitor of claim 1, wherein the stacking direction is perpendicular to the second horizontal plate.

3. The stacked solid state capacitor of claim 1, wherein the stacking direction is perpendicular to the second vertical plate.

4. The stacked solid-state capacitor of claim 3, wherein a width of the second vertical plate corresponds to a width of the negative part of the capacitive unit.

5. The stacked solid-state capacitor according to claim 1, wherein the positive electrode portions of the capacitor units stacked adjacent to each other are electrically connected to each other by a welded structure.

6. The stacked solid-state capacitor according to claim 1, wherein each of the capacitor elements further comprises an insulating portion that surrounds a portion of the surface of the positive electrode portion so as to electrically insulate the positive electrode portion and the negative electrode portion from each other.

7. The stacked solid-state capacitor of claim 1, wherein the conductive structure is made of a metal material.

8. The stacked solid state capacitor of claim 1, wherein a surface of the conductive structure is plated with a metal layer.

9. The stacked solid-state capacitor according to claim 1, wherein the negative electrode portion is electrically connected to the negative electrode portion through a second conductive layer.

10. The stacked solid-state capacitor of claim 9, wherein the second conductive layer is located on a surface of the second horizontal plate and the second vertical plate facing the negative electrode part.