CN212543758U

CN212543758U - Isolated signal conveying device and system

Info

Publication number: CN212543758U
Application number: CN202021790762.3U
Authority: CN
Inventors: 李立松; 方向明; 伍荣翔
Original assignee: Shenzhen Coileasy Technologies Co ltd
Current assignee: Shenzhen Line Easy Microelectronics Co.,Ltd.
Priority date: 2020-08-24
Filing date: 2020-08-24
Publication date: 2021-02-12
Anticipated expiration: 2030-08-24

Abstract

The application provides an isolation signal transmission device and system, and relates to the technical field of isolation signal transmission. The isolated signal conveying device comprises an encoding module, an isolating device, a first comparator, a second comparator and a decoding module, wherein the encoding module generates a first polarity square wave signal and a second polarity square wave signal according to an input signal and conveys the first polarity square wave signal and the second polarity square wave isolated signal to the input end of the isolating device; the second comparator generates a third signal and a fourth signal according to the first polarity square wave signal and the second polarity square wave signal, wherein the fourth signal is a delay signal of the third signal; the decoding module decodes according to the first signal, the second signal, the third signal and the fourth signal and outputs a decoded signal. The method and the device have the advantage of low power consumption.

Description

Isolated signal conveying device and system

Technical Field

The application relates to the technical field of isolated signal transmission, in particular to an isolated signal transmission device and system.

Background

The isolation signal transmission has wide application in the aspects of industrial buses, electric automobile charging piles, intelligent power grids and the like, and the functions of safety protection, noise isolation and level conversion of the system can be realized. The traditional optical coupler is high in power consumption and large in time delay, the power consumption and the time delay can be remarkably reduced by using the isolating device, and meanwhile, the service life is longer and the stability is higher. Therefore, the prior art is generally implemented by using an isolation device for encoding.

For signal transmission, because an isolation device is adopted, signals need to be encoded and decoded, and a traditional encoding and decoding mode is to adopt a carrier wave to realize level transmission, for example, when the signals needing to be transmitted are high level, the carrier wave is correspondingly transmitted; when the signal needing to be transmitted is in a high level, the carrier wave is not correspondingly transmitted. However, the power consumption of signals transmitted by this method is high, and even signals with very low frequency require a carrier with high frequency and high power consumption for transmission.

In summary, in the prior art, when the isolated signal is transmitted, the power consumption is large.

SUMMERY OF THE UTILITY MODEL

An object of the application is to provide an isolation signal transmission device and system to solve the problem that the power consumption is large when isolation signal transmission is performed in the prior art.

In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:

on one hand, the embodiment of the application provides an isolation signal transmission device, which comprises an encoding module, an isolation device, a first comparator, a second comparator and a decoding module, wherein the encoding module is electrically connected with the input end of the isolation device, the output end of the isolation device is respectively electrically connected with the input ends of the first comparator and the second comparator, and the output ends of the first comparator and the second comparator are electrically connected with the decoding module; the encoding module is used for generating a first polarity square wave signal and a second polarity square wave signal according to an input signal, and transmitting the first polarity square wave signal and the second polarity square wave isolation signal to an input end of the isolation device, wherein the first polarity square wave signal and the second polarity square wave signal are opposite signals; the first comparator is configured to generate a first signal and a second signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the first signal and the second signal to the decoding module, where the second signal is a delayed signal of the first signal; the second comparator is configured to generate a third signal and a fourth signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the third signal and the fourth signal to the decoding module, where the fourth signal is a delayed signal of the third signal; the decoding module is used for decoding according to the first signal, the second signal, the third signal and the fourth signal and outputting a decoded signal.

Optionally, when the input end of the isolation device inputs a first polarity square wave signal, the output end of the isolation device sequentially outputs a positive polarity pulse and a negative polarity pulse, and when the input end of the isolation device inputs a second polarity square wave signal, the output end of the isolation device sequentially outputs a negative polarity pulse and a positive polarity pulse; the first comparator is used for outputting a high-level signal after receiving the positive-polarity pulse and outputting a low-level signal after receiving the negative-polarity pulse; when the time of the high level signal output by the first comparator reaches a threshold value, automatically switching to output a low level signal, wherein the threshold value is greater than the width of the first polarity square wave signal; the second comparator is used for outputting a low level signal after receiving the negative polarity pulse and outputting a high level signal after receiving the positive polarity pulse; and when the time of the low level signal output by the second comparator reaches the threshold value, the high level signal is automatically switched to be output.

Optionally, the isolation signal transmission device further includes a first delay module and a second delay module, and output ends of the first comparator and the second comparator each include a first output end and a second output end; a first output end of the first comparator is electrically connected with the decoding module so as to transmit a first signal to the decoding module; the second output end of the first comparator is electrically connected with the decoding module through the first delay module so as to transmit a second signal to the decoding module; the first output end of the second comparator is electrically connected with the decoding module so as to transmit a third signal to the decoding module; and the second output end of the second comparator is electrically connected with the decoding module through the second delay module so as to transmit a fourth signal to the decoding module.

Optionally, the first delay module and the second delay module include a plurality of delays, the plurality of delays are sequentially connected, and the delay of each delay is smaller than the widths of the first polarity square wave signal and the second polarity square wave signal.

Optionally, the decoding module includes a logic processing circuit and a latch, an input end of the logic processing circuit is electrically connected to the first comparator and the second comparator respectively, an output end of the logic processing circuit is electrically connected to the latch, and the logic processing circuit and the latch are configured to decode according to levels of the first signal, the second signal, the third signal, and the fourth signal and output a decoded signal.

Optionally, the logic processing circuit includes a first not gate, a second not gate, a first and gate, and a second and gate, an input terminal of the first not gate is configured to receive the fourth signal, an output terminal of the first not gate is electrically connected to a first input terminal of the first and gate, a second input terminal of the first and gate is configured to receive the first signal, and an output terminal of the first and gate is electrically connected to the first terminal of the latch; the input end of the second not gate is used for receiving the third signal, the output end of the first not gate is electrically connected with the first input end of the second and gate, the second input end of the second and gate is used for receiving the second signal, and the output end of the second and gate is electrically connected with the second end of the latch; the latch is used for outputting a high-level signal when the second signal is a high-level signal and the third signal is a low-level signal; the latch is also used for outputting a low level signal when the fourth signal is a low level signal and the first signal is a high level signal.

Optionally, the latch includes an RS latch, a first end of the latch is a zero setting end, and a second end of the latch is a set end.

Optionally, the encoding module includes an encoding submodule and a driver, the encoding submodule is electrically connected to the driver, and the driver is further electrically connected to the input end of the isolation device; the encoding submodule is used for generating a first polarity square wave signal when the rising edge of the input signal is detected after the input signal is received, and transmitting the first polarity square wave isolation signal to the input end of the isolation device by using the driver; and the coding submodule is used for generating a second polarity square wave signal when the falling edge of the input signal is detected after the input signal is received, and transmitting the second polarity square wave isolation signal to the input end of the isolation device by using the driver.

Optionally, the encoding module further includes a timer, the timer is electrically connected to the encoding submodule, the timer is configured to provide a clock signal for the encoding submodule, and the encoding submodule is further configured to generate a first refresh signal after a first polarity square wave signal is generated, and the preset time is greater than the width of the first polarity square wave signal; the encoding submodule is further used for generating a second refreshing signal after generating a second polarity square wave signal and a preset time, wherein the preset time is larger than the width of the second polarity square wave signal.

On the other hand, the embodiment of the application also provides an isolated signal transmission system, which comprises the isolated signal transmission device.

Compared with the prior art, the embodiment of the application has the following beneficial effects:

the application provides an isolation signal transmission device and a system, the isolation signal transmission device comprises a coding module, an isolation device, a first comparator, a second comparator and a decoding module, the coding module is electrically connected with the input end of the isolation device, the output end of the isolation device is respectively electrically connected with the input ends of the first comparator and the second comparator, the output ends of the first comparator and the second comparator are electrically connected with the decoding module, the coding module is used for generating a first polarity square wave signal and a second polarity square wave signal according to an input signal and transmitting the first polarity square wave signal and the second polarity square wave isolation signal to the input end of the isolation device, wherein the first polarity square wave signal and the second polarity square wave signal are opposite signals, the first comparator is used for generating a first signal and a second signal according to the first polarity square wave signal and the second polarity square wave signal, the first signal and a second signal are transmitted to a decoding module, wherein the second signal is a delay signal of the first signal; the second comparator is used for generating a third signal and a fourth signal according to the first polarity square wave signal and the second polarity square wave signal and transmitting the third signal and the fourth signal to the decoding module, wherein the fourth signal is a delay signal of the third signal; the decoding module is used for decoding according to the first signal, the second signal, the third signal and the fourth signal and outputting a decoded signal. Because the isolation device is adopted to transmit signals in the application, the isolation device can play a role in signal isolation. Meanwhile, when the isolated signal is transmitted, the signal is divided into a first polarity square wave signal and a second polarity square wave signal for transmission, so that the isolated signal transmission is realized without a carrier wave mode, and the power consumption is further effectively reduced.

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a diagram of a first encoded signal in the prior art.

Fig. 2 is a block diagram of an isolated signal transmission device according to an embodiment of the present disclosure.

Fig. 3 is a schematic diagram of a sub-module of an encoding module according to an embodiment of the present application.

Fig. 4 is a schematic diagram of an encoded signal according to an embodiment of the present application.

Fig. 5 is a diagram of a second type of prior art encoded signal.

Fig. 6 is a waveform diagram during a first isolated signal transmission process according to an embodiment of the present application.

Fig. 7 is a circuit diagram of a first isolated signal transmitting device according to an embodiment of the present application.

Fig. 8 is a diagram illustrating an effect of a single delay unit according to an embodiment of the present application.

Fig. 9 is a schematic diagram of operations of a plurality of delays according to an embodiment of the present application.

Fig. 10 is a circuit diagram of a decoding module according to an embodiment of the present application.

Fig. 11 is a circuit diagram of a second isolated signal delivery device according to an embodiment of the present application.

Fig. 12 is a waveform diagram during a second isolated signal transmission process according to an embodiment of the present application.

Fig. 13 is a waveform diagram during a third isolated signal transmission process according to an embodiment of the present application.

Fig. 14 is a schematic diagram of control signal generation provided in an embodiment of the present application.

In the figure: 100-isolated signal delivery means; 110-an encoding module; 120-an isolation device; 130-a first comparator; 140-a second comparator; 150-a decoding module; 111-an encoding submodule; 112-a driver; 160-a first delay module; 170-a second delay module; 151-logic processing circuitry; 152-latch.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.

As described in the background, isolated signal transport is typically transmitted using an isolation device in the prior art. For example, referring to fig. 1, the signal to be transmitted is shown as a in fig. 1, which includes two square wave pulse signals. On the basis, the existing decoding logic is shown as b in fig. 1, and it implements transmission of signals by means of carrier waves. The working principle is that when the signal to be transmitted is at high level, the coded signal corresponds to a transmission carrier (position A in figure 1); when the signal to be transmitted is at a low level, the encoded signal corresponds to a non-transmission carrier (position B in fig. 1), and after encoding is performed in this way, decoding is performed on one side of the output end of the isolation device, so that isolated signal transmission can be realized.

However, the above isolated signal transmission method has a problem of large power consumption, that is, the power consumption of the transmission carrier device system is high, and even a very low frequency signal to be transmitted requires a high frequency and high power consumption carrier wave for transmission. For example, assuming that a signal to be transmitted is always a high-level signal, although the signal to be transmitted is unchanged, the whole system needs to continuously transmit a high-frequency carrier, which results in high power consumption of the system.

In view of this, the present application provides an isolation signal transmission apparatus, which implements signal transmission by converting an input signal into a positive square wave signal and a negative square wave signal, so as to greatly reduce power consumption during isolation signal transmission.

The following provides an exemplary description of an isolated signal transmission device provided in an embodiment of the present application:

as an optional implementation manner, please refer to fig. 2, the isolated signal transmission apparatus 100 includes an encoding module 110, an isolating device 120, a first comparator 130, a second comparator 140, and a decoding module 150, wherein the encoding module 110 is electrically connected to an input end of the isolating device 120, an output end of the isolating device 120 is electrically connected to input ends of the first comparator 130 and the second comparator 140, and output ends of the first comparator 130 and the second comparator 140 are electrically connected to the decoding module 150. The isolation device 120 described herein may be a transformer.

The encoding module 110 is configured to generate a first polarity square wave signal and a second polarity square wave signal according to an input signal, and transmit the first polarity square wave signal and the second polarity square wave isolation signal to an input end of the isolation device 120. Optionally, the widths of the positive square wave signal and the negative square wave signal are the same, wherein the first square wave signal and the second square wave signal are opposite signals, in other words, when the first square wave signal is the positive square wave signal, the second square wave signal is the negative square wave signal; when the first polarity square wave signal is a negative polarity square wave signal, the second polarity square wave signal is a positive polarity square wave signal.

Meanwhile, the first comparator 130 is configured to generate a first signal and a second signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the first signal and the second signal to the decoding module 150, where the second signal is a delayed signal of the first signal. The second comparator 140 is configured to generate a third signal and a fourth signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the third signal and the fourth signal to the decoding module 150, where the fourth signal is a delayed signal of the third signal. The decoding module 150 is configured to decode according to the first signal, the second signal, the third signal, and the fourth signal and output a decoded signal.

It can be understood that the input signal is converted into the first polarity square wave signal and the second polarity square wave signal, so that the carrier wave form can be avoided, only the square wave signal needs to be generated, and the purpose of reducing power consumption can be achieved.

As an implementation manner, please refer to fig. 3, the encoding module 110 includes an encoding submodule 111 and a driver 112, the encoding submodule 111 is electrically connected to the driver 112, and the driver 112 is further electrically connected to an input terminal of the isolation device 120; the encoding submodule 111 is configured to, after receiving the input signal, generate a first polarity square wave signal when a rising edge of the input signal is detected, and transmit the first polarity square wave isolation signal to the input terminal of the isolation device 120 by using the driver 112, and generate a second polarity square wave signal when a falling edge of the input signal is detected, and transmit the second polarity square wave isolation signal to the input terminal of the isolation device 120 by using the driver 112.

As shown in fig. 4, the input signal is a waveform signal shown in a in fig. 4, and as an optional implementation manner, the first polarity square wave signal is a positive polarity square wave signal, and the second polarity square wave signal is a negative polarity square wave signal. After the coding sub-module 111 receives the signal, when a rising edge is detected, a positive square wave signal is generated, and when a falling edge of the input signal is detected, a negative square wave signal is generated. The generated signals are shown as b in fig. 4, and for convenience of description, the widths of the generated positive square wave signal and the generated negative square wave signal are both tp. As can be seen from fig. 4, the present application is equivalent to generating signals only at the rising edge and the falling edge of the input signal for transmission, so that the power consumption is greatly reduced.

Meanwhile, in the prior art, there is another encoding method, as shown in fig. 5, the encoding method uses two pulses to identify a rising edge (or a falling edge), and uses a single pulse to identify a falling edge (or a rising edge), and the receiving end decodes the edge by counting the number of pulses. For example, a in fig. 5 is data to be transmitted, which includes two square wave pulses, and when a rising edge of a square wave pulse occurs, two pulses are used for encoding, and when a falling edge of a square wave pulse occurs, one pulse is used for encoding, and an encoded signal is shown as b in fig. 5. However, when encoding in this way, the refresh signal also has the same number of pulses, but the timing of the encoding signal is uncertain as compared with the square wave signal. As shown in fig. 5C, when the double-pulse refresh signal is close to the edge signal of the single pulse, 3 pulses are actually transmitted, and the receiver cannot determine the correct information from the 3 pulses. It may even happen that the refresh signal overlaps the edge signal directly, resulting in an erroneous output. The problem that the refresh signal and the edge signal are close in time sequence can be effectively avoided only by greatly increasing the delay of the system, and the cost is high.

In view of this, the isolation signal transmission apparatus provided in the present application can better handle the timing sequence when the refresh signal and the edge signal are close to or collide with each other, and avoid introducing a large delay.

The isolation device 120 includes an input end and an output end, the input end and the output end are coupled through a magnetic field, and when the input end outputs a square wave signal, a corresponding positive pulse and a corresponding negative pulse are generated at the output end according to typical inductance-resistance (L-R) charging and discharging circuit characteristics. In other words, when a square wave signal is input at the input end, a positive polarity pulse and a negative polarity pulse are correspondingly generated at the output end because the square wave signal has a rising edge and a falling edge. On the basis, referring to fig. 6, a in fig. 6 shows an input signal which is a square wave, and b in fig. 6 shows a signal encoded according to an input and output signal. It can be understood that as shown in fig. 6 b and fig. 6 c, when the input terminal of the isolation device 120 inputs the positive polarity square wave signal, the output terminal of the isolation device 120 sequentially outputs the positive polarity pulse and the negative polarity pulse, and when the input terminal of the isolation device 120 inputs the negative polarity square wave signal, the output terminal of the isolation device 120 sequentially outputs the negative polarity pulse and the positive polarity pulse.

It should be understood, of course, that the foregoing implementation is merely an example, and in an actual use process, the polarity of the isolation device 120 may also be reversed, for example, when the input end of the isolation device 120 inputs a positive-polarity square wave signal, the output end of the isolation device 120 may also output a negative-polarity pulse and a positive-polarity pulse successively, and when the input end of the isolation device 120 inputs a negative-polarity square wave signal, the output end of the isolation device 120 may also output a positive-polarity pulse and a negative-polarity pulse successively, which is not limited in this application. For convenience of description, the following embodiments all use the example that when the input end of the isolation device 120 inputs the positive polarity square wave signal, the output end of the isolation device 120 sequentially outputs the positive polarity pulse and the negative polarity pulse, and when the input end of the isolation device 120 inputs the negative polarity square wave signal, the output end of the isolation device 120 sequentially outputs the negative polarity pulse and the positive polarity pulse.

As one implementation, the first comparator 130 is configured to output a high level signal after receiving the positive polarity pulse, and output a low level signal after receiving the negative polarity pulse; and automatically switches to output a low level signal when the time of the high level signal output by the first comparator 130 reaches a threshold value, wherein the threshold value is greater than the width of the positive polarity square wave signal. Therefore, on this basis, since the input end of the isolation device 120 inputs a positive square wave signal and a negative square wave signal, when the input end of the isolation device 120 inputs the positive square wave signal, the output end of the isolation device 120 outputs a positive pulse first, and outputs a negative pulse after the width tp of the positive square wave signal; after a period of time, the input terminal of the isolation device 120 inputs a negative square wave signal, the output terminal of the isolation device 120 outputs a negative pulse, and after a threshold time, outputs a positive pulse.

It can be understood that the signal transmitted to the first comparator 130 through the output terminal of the isolation device 120 is substantially "first positive polarity pulse-first negative polarity pulse-second positive polarity pulse", when the isolation signal is transmitted to the first comparator 130, please refer to d in fig. 6, according to the operation principle of the first comparator 130, when the first positive polarity pulse occurs, the first comparator 130 outputs a high level; when the first negative polarity pulse occurs, the first comparator 130 outputs a low level, constituting a first pulse. When the second negative polarity pulse signal appears, the first comparator 130 outputs a low level, the signal is unchanged, when the second positive polarity pulse signal appears, the first comparator 130 outputs a high level, and since the subsequent first comparator 130 does not receive the low level any more, the first comparator 130 maintains the high level output until the time for outputting the high level signal reaches the threshold value, and at this time, the characteristic of the first comparator 130 automatically changes the output signal into the low level signal, thereby forming the second pulse. It is understood that the width of the second pulse is the threshold of the first comparator 130, and if the threshold is set to tm, the width of the second pulse is tm. Moreover, it can be understood that, since the first pulse is associated with the positive polarity square wave signal, the width of the first pulse signal is theoretically equal to the width of the positive polarity square wave signal, which is tp, and tm > tp needs to be satisfied in design.

Similarly, the second comparator 140 is configured to output a high level signal after receiving the negative polarity pulse, and output a high level signal after receiving the negative polarity pulse; and automatically switches to output a high level signal when the time of the low level signal output by the second comparator 140 reaches a threshold value. The operation principle of the second comparator 140 is similar to that of the first comparator 130, and therefore, the detailed description thereof is omitted. The output signal is shown as f in fig. 6.

It can be understood that the input signal of the above example only includes one square wave signal, but in an actual application process, a plurality of square wave signals in the input signal may be provided, and the working principle of the square wave signals output to the first comparator 130 is the same, and will not be described herein again.

It should be noted that, in order to achieve the effect that the first comparator 130 and the second comparator 140 output different results according to the same signal input at the output terminal of the isolation device 120. Referring to fig. 7, L1 is a signal input terminal of the isolation device 120, and L2 is a signal output terminal of the isolation device 120. The first comparator 130 and the second comparator 140 each include a first input terminal and a second input terminal, and the first input terminal is a non-inverting input terminal and the first input terminal is an inverting input terminal. The isolation device 120 includes a first output terminal and a second output terminal, the first output terminal of the isolation device 120 is electrically connected to the non-inverting input terminals of the first comparator 130 and the second comparator 140, respectively, and the second output terminal of the isolation device 120 is electrically connected to the inverting input terminals of the first comparator 130 and the second comparator 140, respectively. By the connection mode, the input signals of the first comparator 130 and the second comparator 140 can be ensured to be the same, and the first comparator 130 and the second comparator 140 can output different signals because the processing modes of the data are different.

Meanwhile, on the basis of the above coding logic, the present application sets a corresponding decoding logic, wherein the isolated signal transmission apparatus 100 further includes a first delay module 160 and a second delay module 170, and the output ends of the first comparator 130 and the second comparator 140 both include a first output end and a second output end; a first output terminal of the first comparator 130 is electrically connected to the decoding module 150 to transmit a first signal to the decoding module 150, where a in fig. 7 is the first signal; a second output terminal of the first comparator 130 is electrically connected to the decoding module 150 through the first delay module 160 to transmit a second signal, in which AD is the second signal in fig. 7, to the decoding module 150. A first output end of the second comparator 140 is electrically connected to the decoding module 150 to transmit a third signal to the decoding module 150, where B in fig. 7 is the third signal, a second output end of the second comparator 140 is electrically connected to the decoding module 150 through the second delay module 170 to transmit a fourth signal to the decoding module 150, and BD in fig. 7 is the fourth signal; similarly, the fourth signal is a delayed signal of the third signal.

The second signal is a delayed signal of the first signal, and the fourth signal is a delayed signal of the third signal, which means that the second signal has the same waveform as the first signal, but the pulse of the second signal occurs later than that of the first signal; similarly, the fourth signal has the same waveform as the third signal, except that the pulse occurs at a later time than the third signal. Alternatively, the delay may be tm; and, the delay is required to be not less than tp and not more than tm in design. On the basis, please refer to fig. 6, d in fig. 6 shows the waveform of the first signal, e in fig. 6 shows the waveform of the second signal, f in fig. 6 shows the waveform of the third signal, and g in fig. 6 shows the waveform of the fourth signal. As can be seen, the time at which the first square wave pulse appears in the second signal is delayed by tm from the time at which the first square wave pulse appears in the first signal, and the time at which the second square wave pulse appears in the second signal is also delayed by tm from the time at which the second square wave pulse appears in the first signal; the time at which the first square-wave pulse appears in the fourth signal is delayed tm from the time at which the first square-wave pulse appears in the third signal, while the time at which the second square-wave pulse appears in the fourth signal is also delayed tm from the time at which the second square-wave pulse appears in the third signal.

As an optional implementation manner, each of the first delay module 160 and the second delay module 170 includes a plurality of delays, the plurality of delays are connected in sequence, and the delay of each delay is smaller than the widths of the first polarity square wave signal and the second polarity square wave signal, as shown in fig. 7, the isolation signal transmission apparatus 100 may also include 6 delays, and the delay of each delay is 1 ns; or the first delay module 160 and the second delay module 170 may include three delays, and the delay of the delay is 2ns, which only needs to satisfy that the delay of each delay does not exceed tp. The reason why the first delay module 160 and the second delay module 170 provided by the present application need to include a plurality of delays is as follows:

fig. 8 shows a schematic diagram of the working principle of a single delay device, wherein a in fig. 8 is a circuit diagram of the single delay device, and b in fig. 8 is a signal conversion diagram of the single delay device, as can be seen from the diagram, if a single stage delay device with a long delay is used, if the input signal Vin pulse is relatively short, Vo1 drops very slowly (the delay device with a long delay has a large RC time constant), it is possible that at the end of the Vin pulse, Vo1 still does not drop to the threshold corresponding to logic 0 (as shown by the horizontal dashed line), that is, the input pulse signal is absorbed by the delay device and cannot be output, therefore, the delay requirement of the present application cannot be achieved by using the single delay device.

If a delay module with multiple stages of delays is adopted, please refer to fig. 9, and fig. 9 shows a schematic diagram of a working principle of multiple delays, where a in fig. 9 is a circuit diagram of multiple delays, and b in fig. 9 is a signal transformation diagram of multiple delays, and as can be seen from the diagram, as long as the delay of each stage is less than the pulse width of an input signal, each stage has enough time to reach a threshold of logic inversion, so that pulses of the input signal are stored and output, and a delay effect is achieved.

As shown in fig. 10, the decoding module 150 includes a logic processing circuit 151 and a latch 152, an input end of the logic processing circuit 151 is electrically connected to the first comparator 130 and the second comparator 140, an output end of the logic processing circuit 151 is electrically connected to the latch 152, and the logic processing circuit 151 and the latch 152 are configured to decode according to levels of the first signal, the second signal, the third signal, and the fourth signal and output a decoded signal.

As an implementation manner, the logic processing circuit 151 includes a first not gate, a second not gate, a first and gate, and a second and gate, an input end of the first not gate is configured to receive the fourth signal, an output end of the first not gate is electrically connected to a first input end of the first and gate, a second input end of the first and gate is configured to receive the first signal, and an output end of the first and gate is electrically connected to a first end of the latch 152; the input terminal of the second not gate is configured to receive the third signal, the output terminal of the first not gate is electrically connected to the first input terminal of the second and gate, the second input terminal of the second and gate is configured to receive the second signal, and the output terminal of the second and gate is electrically connected to the second terminal of the latch 152.

Optionally, the latch 152 described herein is an RS latch 152, and on this basis, the first end of the latch 152 is a zero terminal (i.e., an R terminal in the figure), and the second end of the latch 152 is a set terminal (i.e., an S terminal in the figure). Wherein, R means Reset, meaning zero clearing; s means Set, 1. Thus, the logic expression at the input of latch 152 is:

SET＝AD AND(NOT B)

RST＝(NOT BD)AND A

the RS latch 152 operates in such a manner that when R is 1, Q is forcibly output to 0 and 0 is continuously output even after the condition that R is 1 ends; when S is 1, the output Q is forced to 1, and the output 1 is maintained after the condition that S is 1 is ended.

In other words, the latch 152 is configured to output a high level signal when the second signal is a high level signal and the third signal is a low level signal; and outputting a low level signal when the fourth signal is a low level signal and the first signal is a high level signal. Referring to fig. 6, h in fig. 6 shows a signal at the set terminal of the latch 152, and i in fig. 6 shows a signal at the zero terminal of the latch 152. On the basis, the signal output by the latch 152 is shown as j in fig. 6, and the encoding and decoding processes are further realized. It will be appreciated that the decoded signal has the same waveform as the input signal and is delayed by no more than tm.

As another implementation manner, the isolated signal transmission apparatus 100 provided in the present application may also introduce a DC refresh, where the DC refresh refers to a process in which a signal is transmitted through the isolation device 120 while the input signal maintains a certain potential (0 or 1), so that the receiver side can confirm the state of the input signal. Unlike the above implementation, the DC refresh does not occur at the signal edges, but rather during signal maintenance.

On this basis, please refer to fig. 11, the encoding module 110 further includes a timer electrically connected to the encoding submodule 111, the timer is configured to provide a clock signal for the encoding submodule 111, and the encoding submodule 111 is further configured to generate a positive refresh signal after generating a positive square wave signal for a preset time, where the preset time is greater than the width of the positive square wave signal; the encoding submodule 111 is further configured to generate a negative refresh signal after generating a negative square wave signal for a preset time, where the preset time is greater than the width of the positive square wave signal and the delay time. That is, when the preset time is td, td > tp and td > tm are satisfied.

The operation of the isolated signal transmission device 100 for increasing the refresh signal will be described in detail. As shown in fig. 12, fig. 12 is a signal change diagram of the isolated signal delivery apparatus 100 after the refresh signal is added. In fig. 12, a is an input signal, and after being encoded by the encoding submodule 111 at the positions of the rising edge and the falling edge of the input signal, a positive square wave signal and a negative square wave signal are respectively generated, and at the same time, the encoding submodule 111 receives a time signal transmitted by the timer. And according to the timing result of the timer, the control driver 112 outputs the positive polarity pulse (positive refresh signal) with the width tp again each time td after the input terminal L1 of the isolation device 120 outputs the positive polarity square wave signal until the falling edge of the input signal occurs. Furthermore, the encoding submodule 111 outputs a negative pulse (negative refresh signal) with a width tp again by the driver 112 every time td after the input terminal L1 of the isolation device 120 outputs the negative pulse according to the timing result of the timer until the input signal has a rising edge, and the encoded signal is shown as b in fig. 12.

Meanwhile, since the signal processing process of the present application is basically the same as the signal processing process of the above embodiment, the present application is not repeated again. Further, as can be understood from fig. 12, after receiving the pulse generated from the input signal at the R terminal and the S terminal of the latch 152, the pulse generated from the refresh signal is also received, as shown by h in fig. 12 and i in fig. 12.

On the basis of increasing the refresh signal, the first delay module 160 and the second delay module 170 provided by the present application can both be implemented by using a plurality of delays. The reason is that:

the refresh signal always arrives at a determined moment after the occurrence of the corresponding edge, i.e. at a moment of an integer multiple td. For example, a positive refresh signal may occur at td, 2 x td, 3 x td … after a rising edge, but since the input signal is not deterministic, the falling edge occurs randomly, and there may be a problem of collision between the falling edge and the positive refresh signal (similarly there is a problem of collision between the rising edge and the negative refresh signal), so it is necessary to design to ensure that the signal transmission is not affected when the collision occurs. The technical effect is achieved by a mode that the edge detection signal immediately stops refreshing signal output and immediately starts edge coding isolation signal transmission.

By setting edge signal detection, the output waveform of the system is detected when the edge collides with the refresh signal. Taking only the falling edge and the positive refresh collision as examples (the opposite case analysis is similar), the waveform diagram is shown in fig. 13.

If the system arrives at the edge signal during the process of transmitting the refresh signal, the current refresh signal is stopped, and the edge signal is directly transmitted, as shown in b in fig. 13 (the dotted line in the figure is the waveform that the refresh signal should maintain if the refresh signal and the edge signal do not collide). When the edge signal comes, the encoding circuit controls the refresh signal to stop immediately and transmit the edge signal. There are many ways to implement this function to achieve the same technical effect, and one of the following is an alternative implementation.

As an implementation, referring to fig. 14, the input signal outputs a control signal through a delay and an exclusive nor (XNOR) gate, the control signal having 0 at the edge and 1 at other positions. This control signal serves as a control signal for the output stage having an Enable (EN) terminal. When the edge occurs, EN is 0, the output stage is turned off, and the refresh signal is not transmitted; when EN is 1, the description is not the edge timing, and the refresh signal can be normally transmitted to the next stage.

Through the implementation mode, the normal transmission of signals can not be influenced even when the falling edge or the rising edge collides with the refreshing signals.

Based on the above embodiment, the present application further provides an isolated signal transmission system, which includes the above isolated signal transmission device.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims

1. An isolated signal transmission device is characterized by comprising an encoding module, an isolating device, a first comparator, a second comparator and a decoding module, wherein the encoding module is electrically connected with the input end of the isolating device, the output end of the isolating device is respectively electrically connected with the input ends of the first comparator and the second comparator, and the output ends of the first comparator and the second comparator are electrically connected with the decoding module; wherein the content of the first and second substances,

the encoding module is used for generating a first polarity square wave signal and a second polarity square wave signal according to an input signal and transmitting the first polarity square wave signal and the second polarity square wave signal to the input end of the isolation device, wherein the first polarity square wave signal and the second polarity square wave signal are opposite signals;

the first comparator is configured to generate a first signal and a second signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the first signal and the second signal to the decoding module, where the second signal is a delayed signal of the first signal;

the second comparator is configured to generate a third signal and a fourth signal according to the first polarity square wave signal and the second polarity square wave signal, and transmit the third signal and the fourth signal to the decoding module, where the fourth signal is a delayed signal of the third signal;

the decoding module is used for decoding according to the first signal, the second signal, the third signal and the fourth signal and outputting a decoded signal.

2. The isolated signal delivery device according to claim 1, wherein when a square wave signal of a first polarity is input to the input terminal of the isolation device, the output terminal of the isolation device sequentially outputs a pulse of a positive polarity and a pulse of a negative polarity, and when a square wave signal of a second polarity is input to the input terminal of the isolation device, the output terminal of the isolation device sequentially outputs a pulse of a negative polarity and a pulse of a positive polarity; wherein the content of the first and second substances,

the first comparator is used for outputting a high level signal after receiving the positive polarity pulse and outputting a low level signal after receiving the negative polarity pulse; when the time of the high level signal output by the first comparator reaches a threshold value, automatically switching to output a low level signal, wherein the threshold value is greater than the width of the first polarity square wave signal;

the second comparator is used for outputting a low level signal after receiving the negative polarity pulse and outputting a high level signal after receiving the positive polarity pulse; and when the time of the low level signal output by the second comparator reaches the threshold value, the high level signal is automatically switched to be output.

3. The isolated signal delivery device of claim 2, further comprising a first delay module and a second delay module, wherein the output terminals of the first comparator and the second comparator each comprise a first output terminal and a second output terminal;

a first output end of the first comparator is electrically connected with the decoding module so as to transmit a first signal to the decoding module;

the second output end of the first comparator is electrically connected with the decoding module through the first delay module so as to transmit a second signal to the decoding module;

the first output end of the second comparator is electrically connected with the decoding module so as to transmit a third signal to the decoding module;

and the second output end of the second comparator is electrically connected with the decoding module through the second delay module so as to transmit a fourth signal to the decoding module.

4. The isolated signal delivery device of claim 3, wherein the first delay module and the second delay module comprise a plurality of delays, the plurality of delays are connected in sequence, and the delay of each delay is smaller than the width of the first polarity square wave signal and the width of the second polarity square wave signal.

5. The isolated signal delivery device of claim 1, wherein the decoding module comprises a logic processing circuit and a latch, an input terminal of the logic processing circuit is electrically connected to the first comparator and the second comparator, respectively, an output terminal of the logic processing circuit is electrically connected to the latch, and the logic processing circuit and the latch are configured to decode and output decoded signals according to levels of the first signal, the second signal, the third signal and the fourth signal.

6. The isolated signal delivery device of claim 5, wherein the logic processing circuit comprises a first not gate, a second not gate, a first and gate, and a second and gate, wherein an input of the first not gate is configured to receive the fourth signal, an output of the first not gate is electrically connected to a first input of the first and gate, a second input of the first and gate is configured to receive the first signal, and an output of the first and gate is electrically connected to the first end of the latch;

the input end of the second not gate is used for receiving the third signal, the output end of the first not gate is electrically connected with the first input end of the second and gate, the second input end of the second and gate is used for receiving the second signal, and the output end of the second and gate is electrically connected with the second end of the latch; wherein the content of the first and second substances,

the latch is used for outputting a high-level signal when the second signal is a high-level signal and the third signal is a low-level signal;

the latch is also used for outputting a low level signal when the fourth signal is a low level signal and the first signal is a high level signal.

7. The isolated signal delivery device of claim 6, wherein the latch comprises an RS latch, a first end of the latch being a set zero end, a second end of the latch being a set end.

8. The isolated signal delivery device of claim 1, wherein the encoding module comprises an encoding submodule and a driver, the encoding submodule being electrically connected to the driver, and the driver being further electrically connected to the input of the isolation device; wherein the content of the first and second substances,

the encoding submodule is used for generating a first polarity square wave signal when the rising edge of the input signal is detected after the input signal is received, and transmitting the first polarity square wave isolation signal to the input end of the isolation device by using the driver;

and the coding submodule is used for generating a second polarity square wave signal when the falling edge of the input signal is detected after the input signal is received, and transmitting the second polarity square wave isolation signal to the input end of the isolation device by using the driver.

9. The isolated signal delivery device of claim 8, wherein the encoding module further comprises a timer electrically connected to the encoding submodule, the timer configured to provide a clock signal to the encoding submodule, and the encoding submodule further configured to generate a first refresh signal a preset time after generating a first polarity square wave signal, wherein the preset time is greater than a width of the first polarity square wave signal;

the encoding submodule is further used for generating a second refreshing signal after generating a second polarity square wave signal and a preset time, wherein the preset time is larger than the width of the second polarity square wave signal.

10. An isolated signal delivery system comprising an isolated signal delivery apparatus according to any of claims 1 to 9.