CN212515393U - Clock detector based on IRIG-B code time synchronization system - Google Patents

Abstract

The utility model relates to a clock detector based on IRIG-B code time synchronization system, which comprises an IRIG-B code photoelectric conversion module, an IRIG-B code time synchronization decoding module, a liquid crystal display module, a direct current power supply module, an IRIG-B code time synchronization detection probe and a satellite time service receiving module; the power supply input ends of the IRIG-B code photoelectric conversion module, the IRIG-B code timing decoding module, the liquid crystal display module and the satellite timing receiving module are respectively connected with the direct-current power supply module in parallel to obtain reliable direct-current electric energy, the IRIG-B code timing detection probe is connected with the IRIG-B code timing decoding module, the IRIG-B code timing decoding module is respectively connected with the IRIG-B code photoelectric conversion module and the liquid crystal display module, and the satellite timing receiving module is connected with the liquid crystal display module. The utility model provides a synchronous technical problem of transformer substation clock, provide convenience for the reason of maintenance and constructor analysis time setting problem simultaneously and work such as corresponding processing.

Description

Clock detector based on IRIG-B code time synchronization system

Technical Field

The utility model relates to an electric power tech field, concretely relates to clock detector based on IRIG-B sign indicating number to time system.

Background

At present, an IRIG-B code time synchronization system is widely applied to various devices needing time synchronization, such as a power system and the like, an accurate time basis can be provided for system fault analysis and processing through substation clock synchronization in the power system, and the clock synchronization becomes a necessary technical means for improving the comprehensive automation level of a power grid and a key link in realizing a full-digital and intelligent protection system.

An IRIG-B code time setting system generally has two implementation modes of optical fiber IRIG-B code time setting and RS-485 twisted pair time setting, at present, in the process of checking and processing the RS-485 twisted pair time setting problem, the judgment can be carried out only through the existence of potential change, the potential change amplitude is small and continuously fluctuates, and a maintainer cannot accurately judge whether the time setting state is correct or not according to the potential change amplitude; for the optical fiber IRIG-B code time synchronization mode, a maintainer can only analyze whether a weak optical signal exists in the optical fiber or not; the problems bring great inconvenience to the work of analyzing the reason of the time synchronization problem, processing the abnormal time synchronization and the like of the maintenance and construction personnel, and the reliable and stable operation of the transformer substation clock synchronization system is seriously hindered.

SUMMERY OF THE UTILITY MODEL

In view of the above technical problem, the utility model provides a clock detector based on IRIG-B sign indicating number time system, including IRIG-B sign indicating number photoelectric conversion module 1, IRIG-B sign indicating number time decoding module 2, liquid crystal display module 3, DC power supply module 4, IRIG-B sign indicating number time detection probe 5 and satellite time service receiving module 6; the power supply input ends of the IRIG-B code photoelectric conversion module 1, the IRIG-B code time synchronization decoding module 2, the liquid crystal display module 3 and the satellite time service receiving module 6 are respectively connected with the direct current power supply module 4 in parallel through power supply cables to obtain reliable direct current electric energy, the IRIG-B code time synchronization detection probe 5 is connected with the IRIG-B code time synchronization decoding module 2 to collect a clock signal of equipment to be detected, the IRIG-B code time synchronization decoding module 2 is respectively connected with the IRIG-B code photoelectric conversion module 1 and the liquid crystal display module 3 through communication cables, and the satellite time service receiving module 6 is connected with the liquid crystal display module 3 through communication cables.

Further, the IRIG-B code photoelectric conversion module 1 includes an RXD optical fiber receiving port 102, a VCC power indicator light 103, an optical IRIG-B code to electric IRIG-B code decoding circuit board 104, a power input terminal 105, and an IRIG-B code time-setting signal output port 106; the RXD optical fiber receiving port 102 is connected with the optical IRIG-B code synchronization optical fiber 101 to be detected, and is used for receiving the clock optical signal of the optical IRIG-B code of the equipment to be detected, which is transmitted by the optical IRIG-B code synchronization optical fiber 101 to be detected, and outputting the clock electrical signal of the IRIG-B code by the IRIG-B code synchronization signal output port 106 after the conversion processing is performed by the optical IRIG-B code to electric IRIG-B code decoding circuit board 104; when the VCC power supply indicator light 103 is turned on, the IRIG-B code photoelectric conversion module 1 is in a working state; the power input terminal 105 receives power supplied from the dc power supply module 4.

Further, the IRIG-B code time synchronization decoding module 2 includes a signal indicator lamp 201, a power indicator lamp 202, an IRIG-B code time synchronization decoding circuit board 203, an RS-485 serial port communication port 204, a power input port a205, and an IRIG-B code time synchronization signal input port 206; the IRIG-B code time tick signal input port 206 is connected with the IRIG-B code time tick signal output port 106 and the IRIG-B code time tick detection probe 5, and is used for receiving the electric IRIG-B code clock signal output by the IRIG-B code time tick signal output port 106 and the device to be detected; the RS-485 serial port communication port 204 is used for outputting a digital signal converted by the IRIG-B code time-setting decoding circuit board 203; the signal indicator light 201 indicates that the IRIG-B code pair decoding module 2 is in a working state in a flashing manner and the power indicator light 202 indicates that the IRIG-B code pair decoding module 2 is in a working state in a lighting manner; the power input port a205 receives power from the dc power module 4.

Further, the IRIG-B code pair detection probe 5 comprises a probe contact 501, an insulated handle 502 and an insulated wire 503; the probe contact 501 is connected with an insulated wire 503, the probe contact 501 is in contact with a clock lead end of the equipment to be detected and collects clock signals, and the insulated wire 503 is connected with the IRIG-B code time-setting signal input port 206 and outputs the clock signals collected by the probe contact 501 and the equipment to be detected.

Further, the liquid crystal display module 3 comprises a liquid crystal display screen 301, a first RS-485 serial port communication input end 302, a power input port B303, an option button 304 and a second RS-485 serial port communication input end 305; the first RS-485 serial port communication input end 302 is connected with the RS-485 serial port communication port 204 and receives digital signals, the second RS-485 serial port communication input end 305 is connected with the satellite time service receiving module 6 and receives the digital signals, a module source of the digital signals to be received is selected through the option button 304, corresponding clock correction operation is executed, and corresponding test and operation results are displayed through the liquid crystal display 301; the power input port B303 receives power supplied from the dc power supply module 4.

Further, the satellite time service receiving module 6 includes a power input port C601, a satellite clock source signal output port 602, a satellite antenna interface 603, and a time service processing chip 604; the power input port C601 receives electric energy provided by the dc power supply module 4, the satellite antenna interface 603 is configured to receive a clock input signal of a Beidou or GPS satellite antenna, and the satellite clock source signal output port 602 outputs a digital signal converted by the time service processing chip 604.

The utility model discloses an useful part lies in: the clock detector acquires the clock signal from the IRIG-B code photoelectric conversion module 1 or the IRIG-B code time synchronization detection probe 5, compares the clock signal with the acquired clock signal of the satellite time service receiving module 6, corrects the clock signal, visually and accurately displays the test result, solves the technical problem of clock synchronization of the transformer substation, facilitates the installation and the disassembly of maintenance and constructors, further reduces the abnormal handling difficulty and the workload of the maintenance personnel, improves the working efficiency of the maintenance personnel in handling the IRIG-B code time synchronization system problem, ensures the effective coverage of accurate unified time reference, and has very important significance for the stable operation, state monitoring, evaluation and analysis of equipment and the like.

Drawings

FIG. 1: the structure schematic diagram of a clock detector based on an IRIG-B code time synchronization system;

FIG. 2: the structural schematic diagram of the IRIG-B code photoelectric conversion module;

FIG. 3: the IRIG-B code time synchronization decoding module is in a schematic structural diagram;

FIG. 4: a schematic structural diagram of a liquid crystal display module;

FIG. 5: the schematic structure diagram of the IRIG-B code time setting detection probe;

FIG. 6: the structure schematic diagram of the satellite time service receiving module;

in the figure:

1. an IRIG-B code photoelectric conversion module; 101. an IRIG-B code time setting optical fiber to be detected; 102. an RXD fiber receive port; 103. a VCC power indicator light; 104. the light IRIG-B code is converted into an electric IRIG-B code decoding circuit board; 105. a power input port; 106. an IRIG-B code time setting signal output port;

2. an IRIG-B code time synchronization decoding module; 201. a signal indicator light; 202. a power indicator light; 203. an IRIG-B code time setting decoding circuit board; 204. RS-485 serial port communication port; 205. a power input port A; 206. an IRIG-B code time setting signal input port;

3. a liquid crystal display module; 301. a liquid crystal display screen; 302. a first RS-485 serial port communication input end; 303. a power input port B; 304. an option button; 305. a second RS-485 serial port communication input end;

4. a DC power supply module;

5. detecting a probe during IRIG-B code synchronization; 501. a probe tip; 502. an insulated handle; 503. an insulated wire;

6. a satellite time service receiving module; 601. a power input port C; 602. a satellite clock source signal output port; 603. a satellite antenna interface; 604. time service processing chip.

Detailed Description

With reference to the accompanying drawing 1, the utility model provides a clock detector based on IRIG-B code is to time system, include: the system comprises an IRIG-B code photoelectric conversion module 1, an IRIG-B code time synchronization decoding module 2, a liquid crystal display module 3, a direct current power supply module 4, an IRIG-B code time synchronization detection probe 5 and a satellite time service receiving module 6; the power supply input ends of the IRIG-B code photoelectric conversion module 1, the IRIG-B code time synchronization decoding module 2, the liquid crystal display module 3 and the satellite time service receiving module 6 are respectively connected with the direct current power supply module 4 in parallel through power supply cables to obtain reliable direct current electric energy, the IRIG-B code time synchronization detection probe 5 is connected with the IRIG-B code time synchronization decoding module 2 to collect a clock signal of equipment to be detected, the IRIG-B code time synchronization decoding module 2 is respectively connected with the IRIG-B code photoelectric conversion module 1 and the liquid crystal display module 3 through communication cables, and the satellite time service receiving module 6 is connected with the liquid crystal display module 3 through communication cables.

The clock detector can be used for respectively collecting two clock sources, namely a clock signal of the equipment to be detected collected by the detection probe 5 through IRIG-B code time setting and a clock optical signal of the optical cable of the equipment to be detected collected by the IRIG-B code photoelectric conversion module 1, has the advantages of light and electricity collection of the clock signal source, and has the characteristic of high flexibility in field detection.

With reference to fig. 2, the IRIG-B code photoelectric conversion module 1 includes an RXD optical fiber receiving port 102, a VCC power supply indicator light 103, an optical IRIG-B code to electric IRIG-B code decoding circuit board 104, a power supply input terminal 105, and an IRIG-B code time-setting signal output port 106; the RXD optical fiber receiving port 102 is connected with the optical IRIG-B code synchronization optical fiber 101 to be detected, and is used for receiving the clock optical signal of the optical IRIG-B code of the equipment to be detected, which is transmitted by the optical IRIG-B code synchronization optical fiber 101 to be detected, and outputting the clock electrical signal of the IRIG-B code by the IRIG-B code synchronization signal output port 106 after the conversion processing is performed by the optical IRIG-B code to electric IRIG-B code decoding circuit board 104; when the VCC power supply indicator light 103 is turned on, the IRIG-B code photoelectric conversion module 1 is in a working state; the power input terminal 105 receives power supplied from the dc power supply module 4.

With reference to fig. 3, the IRIG-B code pair time decoding module 2 includes a signal indicator 201, a power indicator 202, an IRIG-B code pair time decoding circuit board 203, an RS-485 serial port communication port 204, a power input port a205, and an IRIG-B code pair time signal input port 206; the IRIG-B code time tick signal input port 206 is connected with the IRIG-B code time tick signal output port 106 and the IRIG-B code time tick detection probe 5, and is used for receiving the electric IRIG-B code clock signal output by the IRIG-B code time tick signal output port 106 and the device to be detected; the RS-485 serial port communication port 204 is used for outputting a digital signal converted by the IRIG-B code time-setting decoding circuit board 203; the signal indicator light 201 indicates that the IRIG-B code pair decoding module 2 is in a working state in a flashing manner and the power indicator light 202 indicates that the IRIG-B code pair decoding module 2 is in a working state in a lighting manner; the power input port a205 receives power from the dc power module 4.

With reference to fig. 5, the IRIG-B code pair detection probe 5 includes a probe contact 501, an insulated handle 502 and an insulated wire 503; the probe contact 501 is connected with an insulated wire 503, the probe contact 501 is in contact with a clock lead end of the equipment to be detected and collects clock signals, and the insulated wire 503 is connected with the IRIG-B code time-setting signal input port 206 and outputs the clock signals collected by the probe contact 501 and the equipment to be detected.

With reference to fig. 4, the liquid crystal display module 3 includes a liquid crystal display screen 301, a first RS-485 serial port communication input end 302, a power input port B303, an option button 304, and a second RS-485 serial port communication input end 305; the first RS-485 serial port communication input end 302 is connected with the RS-485 serial port communication port 204 and receives digital signals, the second RS-485 serial port communication input end 305 is connected with the satellite time service receiving module 6 and receives the digital signals, a module source of the digital signals to be received is selected through the option button 304, corresponding clock correction operation is executed, and corresponding test and operation results are displayed through the liquid crystal display 301; the power input port B303 receives power supplied from the dc power supply module 4.

With reference to fig. 6, the satellite time service receiving module 6 includes a power input port C601, a satellite clock source signal output port 602, a satellite antenna interface 603, and a time service processing chip 604; the power input port C601 receives electric energy provided by the dc power supply module 4, the satellite antenna interface 603 is configured to receive a clock input signal of a Beidou or GPS satellite antenna, and the satellite clock source signal output port 602 outputs a digital signal converted by the time service processing chip 604.

A use method of a clock detector based on an IRIG-B code time synchronization system comprises the following steps:

first, turning on a power switch of the dc power module 4:

when the power switch is powered on, and the clock detector based on the IRIG-B code synchronization system is in an on state, the VCC power indicator 103 of the IRIG-B code photoelectric conversion module 1, the power indicator 202 of the IRIG-B code synchronization decoding module 2, and the liquid crystal display 301 of the liquid crystal display module 3 are normally on, and the liquid crystal display 301 displays a program start state;

when the power switch is powered off, and the clock detector based on the IRIG-B code synchronization system is in an off state, the VCC power indicator 103 of the IRIG-B code photoelectric conversion module 1, the power indicator 202 of the IRIG-B code synchronization decoding module 2, and the liquid crystal display 301 of the liquid crystal display module 3 are normally off, and the liquid crystal display 301 is in a black screen state without displaying.

And secondly, the clock detector can be used for respectively acquiring two clock sources:

(1) when the equipment to be detected adopts an electric IRIG-B code to realize a time synchronization mode: the clock signals of the detection probe 5 are compared through the satellite time service receiving module 6 and the IRIG-B code time service, so that the functions of time display and time correction are completed, and the synchronization requirement is realized; the probe contact 501 of the IRIG-B code timing detection probe 5 is contacted with a clock lead terminal of equipment to be detected and a clock electrical signal is acquired;

(2) when the device to be detected adopts the optical IRIG-B code to realize the time synchronization mode: the time display and time correction functions are completed through the comparison of clock signals of the satellite time service receiving module 6 and the IRIG-B code photoelectric conversion module 1, and the synchronization requirement is realized; an RXD optical fiber receiving port 102 of the IRIG-B code photoelectric conversion module 1 is connected with an optical fiber 101 for detecting IRIG-B code pairing.

Thirdly, after the clock source is determined, the following operations can be executed:

the satellite antenna as a reference clock source is connected with the satellite antenna interface 603 of the satellite time service receiving module 6, the option button 304 is selected as the start of the test, at this time, the VCC power indicator 103 of the IRIG-B code photoelectric conversion module 1 and the signal indicator 201 of the IRIG-B code time pair decoding module 2 are in a flashing state, and the test results displayed on the liquid crystal display screen 301 of the liquid crystal display module 3 can be respectively checked through the option button 304:

(1) the actual clock time of the detected equipment and the clock time of the satellite time service receiving module 6 received by the detector;

(2) whether the difference value of the two values meets the requirement of the transformer substation clock synchronization or not is judged, if the liquid crystal display screen 301 shows that the difference value is 'OK', the difference value is 'NO', the difference value is not qualified, and if the difference value is '…', the difference value represents that an input signal is undetermined;

(3) when the liquid crystal display 301 displays "NO", the clock correction is selected and started through the option button 304, the clock detector prompts an operator whether to perform clock correction, the clock of the device to be detected is corrected after confirmation, and after the correction process is finished, the liquid crystal display 301 of the clock detector displays "clock correction is completed/not completed";

before clock correction, isolation measures should be taken for the tested device and other devices in a time synchronization system, so that interference of clock signals of the detector on other devices is avoided; when the access of the reference clock source to the detector is bad or the output of the reference clock source is wrong, the correction result is influenced, and the influence on the detected equipment is larger when the requirement on the time precision is higher; therefore, an operator is required to select three modes with the requirement of clock synchronization precision and select the modes according to the requirement of field detection:

the first mode is as follows: the limit is 1S, the method is suitable for equipment with low time precision requirement, and the mode is recommended to be selected;

and a second mode: the limit is 20ms, and the method is suitable for equipment with higher requirement on time precision;

and a third mode: the limit is 0.1ms, the method is suitable for equipment with high requirement on time precision, and the mode is carefully selected; in this mode, the precision requirement of the detector on the input signal of the reference clock source is very high, and if the precision requirement cannot be met, the correction function fails.

(4) When the liquid crystal display panel 301 is displayed as "…", the following are checked and excluded in order:

the signals received by the probe contact 501 or the RXD optical fiber receiving port 102 are non-IRIG-B code signals;

the probe contact 501 or the RXD optical fiber receiving port 102 is in poor contact with the tested equipment, and the satellite antenna interface 603 is in poor contact with the satellite antenna;

exceeding the calculation range of the detector;

the detector program load is great and the crash occurs.

And fourthly, after the test is finished, firstly removing all the connection wires between the IRIG-B code photoelectric conversion module 1 and the tested equipment, at the moment, normally turning on the VCC power supply indicator lamp 103 of the IRIG-B code photoelectric conversion module 1, normally turning off the signal indicator lamp 201 of the IRIG-B code time synchronization decoding module 2, and turning off the switch button of the direct current power supply module 4 after confirmation.

In this embodiment, the IRIG-B code timing decoding module 2 achieves the purpose of transformer substation clock synchronization by obtaining a clock timing signal from the IRIG-B code photoelectric conversion module 1 or the IRIG-B code timing detection probe 5. It should be noted that, through the technical solutions disclosed in the present embodiment, a person skilled in the art should fall into the scope of the present invention through simple line modifications or replacement of corresponding modules.

Claims (6)

1. A clock detector based on an IRIG-B code time synchronization system is characterized by comprising an IRIG-B code photoelectric conversion module (1), an IRIG-B code time synchronization decoding module (2), a liquid crystal display module (3), a direct current power supply module (4), an IRIG-B code time synchronization detection probe (5) and a satellite time service receiving module (6); the power input ends of the IRIG-B code photoelectric conversion module (1), the IRIG-B code time synchronization decoding module (2), the liquid crystal display module (3) and the satellite time service receiving module (6) are respectively connected with the direct current power supply module (4) in parallel through a power cable and obtain reliable direct current electric energy, the IRIG-B code time synchronization detection probe (5) is connected with the IRIG-B code time synchronization decoding module (2) and collects a clock signal of equipment to be detected, the IRIG-B code time synchronization decoding module (2) is respectively connected with the IRIG-B code photoelectric conversion module (1) and the liquid crystal display module (3) through communication cables, and the satellite time service receiving module (6) is connected with the liquid crystal display module (3) through communication cables.

2. The clock detector based on the IRIG-B code time tick system according to claim 1, wherein the IRIG-B code photoelectric conversion module (1) comprises an RXD optical fiber receiving port (102), a VCC power indicator lamp (103), an optical IRIG-B code to electric IRIG-B code decoding circuit board (104), a power input end (105) and an IRIG-B code time tick signal output port (106); the RXD optical fiber receiving port (102) is connected with an optical IRIG-B code timing fiber (101) to be detected, and is used for receiving a clock optical signal of an optical IRIG-B code of equipment to be detected, which is transmitted by the optical IRIG-B code timing fiber (101) to be detected, converting the clock optical signal into an electric IRIG-B code decoding circuit board (104) through the optical IRIG-B code, and outputting the clock optical signal of the IRIG-B code through an IRIG-B code timing signal output port (106); when the VCC power supply indicator lamp (103) is turned on, the IRIG-B code photoelectric conversion module (1) is in a working state; the power input end (105) receives the electric energy provided by the direct current power supply module (4).

3. The clock detector based on the IRIG-B code time synchronization system according to claim 2, wherein the IRIG-B code time synchronization decoding module (2) comprises a signal indicator lamp (201), a power indicator lamp (202), an IRIG-B code time synchronization decoding circuit board (203), an RS-485 serial port communication port (204), a power input port A (205) and an IRIG-B code time synchronization signal input port (206); the IRIG-B code time tick signal input port (206) is connected with the IRIG-B code time tick signal output port (106) and the IRIG-B code time tick detection probe (5) and is used for receiving an electric IRIG-B code clock signal output by the IRIG-B code time tick signal output port (106) and equipment to be detected; the RS-485 serial port communication port (204) is used for outputting a digital signal converted by the IRIG-B code time-setting decoding circuit board (203); the signal indicator lamp (201) indicates that the IRIG-B code pair time decoding module (2) is in a working state in a flashing mode and the power indicator lamp (202) indicates that the IRIG-B code pair time decoding module is in a working state in a lighting mode; the power input port A (205) receives power supplied by the direct current power supply module (4).

4. The clock detector based on the IRIG-B code pair system according to claim 3, wherein the IRIG-B code pair detection probe (5) comprises a probe contact (501), an insulated handle (502) and an insulated wire (503); the probe contact (501) is connected with an insulated wire (503), the probe contact (501) is in contact with a clock lead end of the equipment to be detected and collects clock signals, and the insulated wire (503) is connected with the IRIG-B code time synchronization signal input port (206) and outputs the clock signals collected by the probe contact (501) and the equipment to be detected.

5. The clock detector based on the IRIG-B code time synchronization system as claimed in claim 4, wherein the liquid crystal display module (3) comprises a liquid crystal display (301), a first RS-485 serial port communication input end (302), a power input port B (303), an option button (304) and a second RS-485 serial port communication input end (305); the first RS-485 serial port communication input end (302) is connected with the RS-485 serial port communication port (204) and receives digital signals, the second RS-485 serial port communication input end (305) is connected with the satellite time service receiving module (6) and receives the digital signals, a module source for receiving the digital signals is selected through an option button (304), corresponding clock correction operation is executed, and corresponding test and operation results are displayed through a liquid crystal display screen (301); the power input port B (303) receives power supplied by the direct current power supply module (4).

6. The clock detector based on the IRIG-B code time synchronization system of claim 5, wherein the satellite time service receiving module (6) comprises a power input port C (601), a satellite clock source signal output port (602), a satellite antenna interface (603) and a time service processing chip (604); the power input port C (601) receives electric energy provided by the direct current power supply module (4), the satellite antenna interface (603) receives a clock input signal of a Beidou or GPS satellite antenna, and the satellite clock source signal output port (602) is connected with the second RS-485 serial port communication input port (305) and used for outputting a digital signal converted by the time service processing chip (604).

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