CN212459836U

CN212459836U - PXie intermediate frequency acquisition processing module

Info

Publication number: CN212459836U
Application number: CN202021069330.3U
Authority: CN
Inventors: 荣彬杰; 吴东; 夏思宇
Original assignee: Chengdu Punuo Technology Co ltd
Current assignee: Chengdu Punuo Technology Co ltd
Priority date: 2020-06-11
Filing date: 2020-06-11
Publication date: 2021-02-02
Anticipated expiration: 2030-06-11

Abstract

The utility model discloses a PXie intermediate frequency acquisition processing module, including acquisition element, analog-to-digital conversion unit, clock circuit, LVDS interface, FPGA treater, memory and PXie interface unit. The utility model has stronger data acquisition and processing capacity, better compatibility and expansibility, and no need of external driving devices; the temperature, voltage and current signals can be detected simultaneously, and the method has high reliability and safety.

Description

PXie intermediate frequency acquisition processing module

Technical Field

The utility model belongs to the technical field of data acquisition, especially, relate to PXie intermediate frequency acquisition processing module.

Background

The existing digital signal processing can only carry out single-path processing on the acquired signal, the data transmission speed is limited, the data storage capacity is small, the power consumption is large, the communication interface function is simple, and the requirements of digital signal acquisition and processing cannot be met; the traditional data acquisition card has complex wiring and poor data acquisition and processing efficiency under the condition of large data volume.

SUMMERY OF THE UTILITY MODEL

The object of the present invention is to provide a PXie intermediate frequency acquisition and processing module for solving the above problems, which comprises an acquisition unit, an analog-to-digital conversion unit, a clock circuit, an LVDS interface, an FPGA processor, a memory and a PXie interface unit; the acquisition unit comprises a voltage and current detection circuit and a temperature detection circuit; the voltage and current detection circuit and the temperature detection circuit are respectively connected with the LVDS interface by an analog-to-digital converter; the clock circuit is connected with the analog-to-digital conversion unit; the clock circuit is connected with the FPGA processor through an LVDS interface; the memory is connected with the FPGA processor; the FPGA processor is connected with the PXie interface unit.

The beneficial effects of the utility model reside in that: the utility model has stronger data acquisition and processing capacity, better compatibility and expansibility, and no need of external driving devices; the temperature, voltage and current signals can be detected simultaneously, and the method has high reliability and safety.

Drawings

FIG. 1 is a system diagram of the present invention;

fig. 2 is a flow chart of the intermediate frequency signal acquisition of the present invention.

Detailed Description

The present invention will be further explained with reference to the accompanying drawings:

as shown in fig. 1, the PXie intermediate frequency acquisition and processing module of the present invention includes an acquisition unit, an analog-to-digital conversion unit, a clock circuit, an LVDS interface, an FPGA processor, a memory, and a PXie interface unit; the acquisition unit comprises a voltage and current detection circuit and a temperature detection circuit; the voltage and current detection circuit and the temperature detection circuit are respectively connected with the LVDS interface by an analog-to-digital converter; the clock circuit is connected with the analog-to-digital conversion unit; the clock circuit is connected with the FPGA processor through an LVDS interface; the memory is connected with the FPGA processor; the FPGA processor is connected with the PXie interface unit.

Specifically, the FPGA processor adopts an XCKU115 chip.

Specifically, the analog-to-digital conversion unit adopts an AD9467 analog-to-digital converter.

Specifically, the analog-to-digital conversion unit is further connected with a coupling unit, and the input end of the acquisition channel transmits the acquired signal to the analog-to-digital converter through the coupling unit.

Specifically, the voltage and current detection circuit comprises a MAX16065 chip; the temperature detection circuit comprises a TMP75C temperature sensor and a TWI controller; the TWI controller is connected to the TMP75C temperature sensor for providing a clock signal to the TMP75C temperature sensor.

Specifically, the memory adopts MT40A512M16 HA-083E.

The clock circuit adopts an internal clock and an external clock alternative mode, and the switching mode adopts an alternative amplifier, so that the clock frequency adjustment of the analog-to-digital converter and the FPGA processor can be realized.

The utility model can realize that the power consumption of the board card does not exceed 50W, and has the characteristic of low power consumption; the detected voltage and current are compared with the early warning threshold, and when the detected voltage exceeds the set threshold, a fault alarm signal is sent out, so that the protection capability is strong, and the reliability of the system is improved.

The temperature acquired by the board card can be reported to the system through PCIE, the system can monitor the board temperature of the acquisition card in real time, meanwhile, self protection is arranged on the board, and when the temperature exceeds a warning value, the operation is stopped, so that the reliability and the safety are improved.

The utility model discloses can use the high-speed mouth to connect PCIE high speed bus and carry out high speed communication, can reach compatible CPCI's standard, also can use the high-speed mouth to connect PCIE high speed bus simultaneously and carry out high speed communication, have better compatibility.

The technical scheme of the utility model is not limited to the restriction of above-mentioned specific embodiment, all according to the utility model discloses a technical scheme makes technical deformation, all falls into within the protection scope of the utility model.

Claims

The PXie intermediate frequency acquisition processing module is characterized by comprising an acquisition unit, an analog-to-digital conversion unit, a clock circuit, an LVDS interface, an FPGA processor, a memory and a PXie interface unit; the acquisition unit comprises a voltage and current detection circuit and a temperature detection circuit; the voltage and current detection circuit and the temperature detection circuit are respectively connected with the LVDS interface by an analog-to-digital converter; the clock circuit is connected with the analog-to-digital conversion unit; the clock circuit is connected with the FPGA processor through an LVDS interface; the memory is connected with the FPGA processor; the FPGA processor is connected with the PXie interface unit.
2. The PXie intermediate frequency acquisition processing module according to claim 1, wherein the FPGA processor employs an XCKU115 chip.
3. The PXie intermediate-frequency acquisition processing module according to claim 1, wherein the analog-to-digital conversion unit employs an AD9467 analog-to-digital converter.
4. The PXie intermediate frequency acquisition processing module according to claim 1, wherein the voltage and current detection circuit comprises a MAX16065 chip; the temperature detection circuit comprises a TMP75C temperature sensor and a TWI controller; the TWI controller is connected to the TMP75C temperature sensor for providing a clock signal to the TMP75C temperature sensor.
5. The PXie intermediate-frequency acquisition and processing module according to claim 1, wherein the memory is MT40a512M16 HA-083E.