CN209930252U - LORA intelligent control plug board circuit - Google Patents
LORA intelligent control plug board circuit Download PDFInfo
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- CN209930252U CN209930252U CN201920821404.5U CN201920821404U CN209930252U CN 209930252 U CN209930252 U CN 209930252U CN 201920821404 U CN201920821404 U CN 201920821404U CN 209930252 U CN209930252 U CN 209930252U
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Abstract
The utility model relates to a LORA intelligent control picture peg circuit, including singlechip, GPRS communication unit, wiFi communication unit, battery power supply unit and remote radio LORA interface unit, GPRS communication unit wiFi communication unit and LORA interface unit respectively with the singlechip communication is connected, battery power supply unit's output with an input electricity of singlechip is connected. Integrate GPRS communication unit and wiFi communication unit to the singlechip on, the LORA module passes through LORA interface unit and transmits the data transmission who gathers to the singlechip in, singlechip rethread GPRS communication unit output to realize the demand of LORA teletransmission data. The input antenna circuit receives input data and transmits the input data to the 2G control chip G510, and the 2G control chip G510 acquires information of the SIM card U2 through the SIM information acquisition circuit and sends the data to the single chip microcomputer through the 2G output circuit.
Description
Technical Field
The utility model belongs to the technical field of wireless communication, especially, relate to LORA intelligent control picture peg circuit.
Background
LORA is a low-power local area network wireless standard created by semtech corporation, and low power consumption generally covers a long distance with difficulty, and the long distance generally has high power consumption, and if a horse wants to run far without eating grass, it seems difficult to handle. The LORA is named Long Range Radio (Long Range Radio), and has the greatest characteristic that the LORA is longer in transmission distance than other wireless modes under the same power consumption condition, achieves low power consumption and Long Range unification, and is 3-5 times longer in distance than traditional wireless Radio frequency communication under the same power consumption condition. Currently, LORA on the market is generally a single acquisition system, and does not have a remote communication capability including 2G and wifi.
SUMMERY OF THE UTILITY MODEL
The utility model provides a LORA intelligent control picture peg circuit for solve the not enough technical problem of LORA remote communication ability among the prior art.
The utility model provides a LORA intelligent control plugboard circuit, including singlechip, GPRS communication unit, wiFi communication unit, battery power supply unit and remote radio LORA interface unit, GPRS communication unit, wiFi communication unit and the LORA interface unit respectively with singlechip communication connection, the output of battery power supply unit is connected with an input electricity of singlechip, GPRS communication unit includes input antenna circuit, 2G control chip G510, 2G power stabilizing circuit, 2G output circuit and SIM information acquisition circuit, an input of 2G control chip G510 is connected with the input antenna circuit electricity, the input of 2G power stabilizing circuit is connected with the output electricity of battery power supply circuit, the output of 2G power stabilizing circuit is connected with another input electricity of 2G control chip G510, the input end of the 2G output circuit is electrically connected with an output end of the 2G control chip G510, the output end of the 2G output circuit is electrically connected with an input end of the single chip microcomputer, the 2G control chip G510 is in communication connection with the SIM card U2, and an input end of the 2G control chip G510 is electrically connected with an output end of the single chip microcomputer.
The LORA interface unit comprises a LORA debugging interface J4 and a LORA module interface J5, wherein the LORA debugging interface J4 and the LORA module interface J5 are respectively electrically connected with the single chip microcomputer.
The input antenna circuit comprises an antenna J1, a filter capacitor C1, a filter capacitor C2 and a resistor R1, an input end of the antenna J1 receives signals, an output end of the antenna J1 is connected with one end of a resistor R1 and one end of a filter capacitor C2, the other end of the resistor R1 is connected with one end of a filter capacitor C1 and a 2G control chip G510, and the other end of the filter capacitor C1 and the other end of the filter capacitor C2 are all grounded.
Wherein, the 2G power stabilizing circuit comprises a power switch control circuit, a magnetic resistance FB1, a voltage stabilizing capacitor C3, a voltage stabilizing capacitor C4, a voltage stabilizing capacitor C5, a voltage stabilizing capacitor C6 and a voltage stabilizing capacitor C7, one input end of the power switch control circuit inputs current, the other input end of the power switch control circuit receives the control level sent by the 2G control chip G510, the output end of the power switch control circuit is electrically connected with the input end of the magnetic resistance FB1, the output end of the magnetic resistance FB1 is electrically connected with the voltage-stabilizing capacitor C3, one end of the voltage-stabilizing capacitor C4, one end of the voltage-stabilizing capacitor C5, one end of the voltage-stabilizing capacitor C6, one end of the voltage-stabilizing capacitor C7 and one input end of the 2G control chip G510 respectively, the other end of the voltage-stabilizing capacitor C4, the other end of the voltage-stabilizing capacitor C5, the other end of the voltage-stabilizing capacitor C6 and the other end of the voltage-stabilizing capacitor C7 are grounded.
The power switch control circuit comprises a resistor R3, a resistor R72, a MOS transistor Q2 and a MOS transistor Q5, wherein a source of the MOS transistor Q2 and one end of the resistor R3 input current, a gate of the MOS transistor Q2 is respectively electrically connected with the other end of the resistor R3 and a drain of the MOS transistor Q5, a drain of the MOS transistor Q2 is electrically connected with an input end of the reluctance FB1, a gate of the MOS transistor Q5 receives the control level, a source of the MOS transistor Q5 is grounded, one end of the resistor R72 is electrically connected with the gate of the MOS transistor Q5, and the other end of the resistor R72 is grounded.
The GPRS communication unit further comprises a work indicating circuit, the input end of the work indicating circuit is respectively electrically connected with the battery control unit and the 2G control chip G510, and the output end of the work indicating circuit is grounded.
From the foregoing the embodiment of the utility model provides a can know, the utility model provides a LORA intelligent control picture peg circuit with GPRS communication unit and wiFi communication unit integrated to the singlechip on, the LORA module passes through LORA interface unit and in data transfer to the singlechip of gathering, singlechip rethread GPRS communication unit output to realize the demand of LORA teletransmission data. The input antenna circuit receives input data and transmits the input data to the 2G control chip G510, and the 2G control chip G510 acquires information of the SIM card U2 through the SIM information acquisition circuit and sends the data to the single chip microcomputer through the 2G output circuit.
Drawings
In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a block diagram of the LORA intelligent control plug board circuit of the present invention;
fig. 2 is a partial circuit diagram of a GPRS communication unit of the LORA intelligent control board plugging circuit of the present invention;
fig. 3 is a 2G power stabilizing circuit diagram of the LORA intelligent control plug board circuit of the present invention;
fig. 4 is a 2G output circuit diagram of the LORA intelligent control plug board circuit of the present invention;
fig. 5 is the utility model discloses the SIM information acquisition circuit diagram of LORA intelligent control picture peg circuit.
Description of the main elements:
1. a single chip microcomputer; 2. a GPRS communication unit; 3. a WiFi communication unit; 4. a battery power supply unit; 5. a LORA interface unit; 21. an input antenna circuit; 22. 2G power supply stabilizing circuit; 23. a 2G output circuit; 24. and a SIM information acquisition circuit.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the drawings in the embodiments of the present invention are combined to clearly and completely describe the technical solutions in the embodiments of the present invention, and obviously, the described embodiments are only some embodiments, not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by the skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-5, the present invention relates to a LORA intelligent control plug board circuit, which comprises a single chip microcomputer 1, a GPRS communication unit 2, a WiFi communication unit 3, a battery power supply unit 4 and a long-distance radio LORA interface unit 5, wherein the GPRS communication unit 2, the WiFi communication unit 3 and the LORA interface unit 5 are respectively in communication connection with the single chip microcomputer 1, an output terminal of the battery power supply unit 4 is electrically connected to an input terminal of the single chip microcomputer 1, the GPRS communication unit 2 includes an input antenna circuit 21, a 2G power stabilizing circuit G510, a 2G power stabilizing circuit 22, a 2G output circuit 23 and a SIM information obtaining circuit 24, an input terminal of the 2G power stabilizing circuit G510 is electrically connected to the input antenna circuit 21, an input terminal of the 2G power stabilizing circuit 22 is electrically connected to an output terminal of the battery power supply circuit, an output terminal of the 2G power stabilizing circuit 22 is electrically connected to another, the input end of the 2G output circuit 23 is electrically connected with an output end of the 2G control chip G510, the output end of the 2G output circuit 23 is electrically connected with an input end of the single chip microcomputer 1, an input end of the 2G control chip G510 is electrically connected with an output end of the single chip microcomputer 1, and the 2G control chip G510 is in communication connection with the SIM card U2.
Compared with the prior art, the utility model provides a LORA intelligent control picture peg circuit is integrated to singlechip 1 with GPRS communication unit 2 and wiFi communication unit 3 on, and the LORA module passes through LORA interface unit 5 and transmits the data of gathering to singlechip 1, and singlechip 1 rethread GPRS communication unit 2 outputs to realize the demand of LORA teletransmission data. The input antenna circuit 21 receives input data and transmits the input data to the 2G control chip G510, and the 2G control chip G510 acquires information of the SIM card U2 through the SIM information acquisition circuit 24 and transmits the data to the singlechip 1 through the 2G output circuit 23.
The utility model relates to a accuse equipment in socket type LORA intelligence. The requirements of LORA communication and control can be met, and the data collected by the LORA receiver is packaged by the high-performance single chip microcomputer 1. And sending the data packet to the cloud-end platform through 2G communication. And meanwhile, the 2G communication and the WIFI communication are utilized to realize the position positioning function. And sending the position data to the cloud platform through 2G communication. The product adopts 220V direct power supply, and the built-in battery can support power failure standby.
In this embodiment, the LORA interface unit 5 includes an LORA debug interface J4 and an LORA module interface J5, and the LORA debug interface J4 and the LORA module interface J5 are electrically connected to the single chip microcomputer 1, respectively. LORA debugging interface J4 is the engineering debugging mouth of LORA module, carries out LORA module engineering debugging, and LORA module interface J5 connects the LORA module, carries out the data acquisition and the transmission of LORA module.
In this embodiment, the input antenna circuit 21 includes an antenna J1, a filter capacitor C1, a filter capacitor C2, and a resistor R1, an input end of the antenna J1 receives a signal, an output end of the antenna J1 is respectively connected to one end of the resistor R1 and one end of the filter capacitor C2, the other end of the resistor R1 is respectively connected to one end of the filter capacitor C1 and the 2G control chip G510, and the other end of the filter capacitor C1 and the other end of the filter capacitor C2 are both grounded. The signal received by the antenna J1 is filtered by the C1 and the C2 and then transmitted to the RF-ANT contact position of the G510. G510 controls the power stabilizing circuit, the 2G output circuit 23, and the SIM information acquiring circuit 24 through different output ports, respectively.
In this embodiment, the 2G power stabilizing circuit 22 includes a power switch control circuit, a magnetic resistance FB1, a voltage stabilizing capacitor C3, a voltage stabilizing capacitor C4, a voltage stabilizing capacitor C5, a voltage stabilizing capacitor C6 and a voltage stabilizing capacitor C7, wherein a current is input to one input terminal of the power switch control circuit, another input terminal of the power switch control circuit receives a control level sent by the 2G control chip G510, an output terminal of the power switch control circuit is electrically connected to an input terminal of the magnetic resistance FB1, an output terminal of the magnetic resistance FB1 is respectively electrically connected to one terminal of the voltage stabilizing capacitor C3, one terminal of the voltage stabilizing capacitor C4, one terminal of the voltage stabilizing capacitor C5, one terminal of the voltage stabilizing capacitor C6, one terminal of the voltage stabilizing capacitor C7 and one input terminal of the 2G control chip G510, and another terminal of the voltage stabilizing capacitor C4, another terminal of the voltage stabilizing capacitor C5, another terminal of the voltage stabilizing capacitor C6 and.
In this embodiment, the power switch control circuit includes a resistor R3, a resistor R72, a MOS transistor Q2, and a MOS transistor Q5, wherein a source of the MOS transistor Q2 and one end of the resistor R3 input currents, a gate of the MOS transistor Q2 is electrically connected to the other end of the resistor R3 and a drain of the MOS transistor Q5, a drain of the MOS transistor Q2 is electrically connected to an input terminal of the magnetoresistive FB1, a gate of the MOS transistor Q5 receives a control level ON _ OFF, a source of the MOS transistor Q5 is grounded, one end of the resistor R72 is electrically connected to a gate of the MOS transistor Q5, and the other end of the resistor R72 is grounded.
The board circuit further comprises a work indicating circuit, the work indicating circuit comprises an indicator lamp D1, a protection resistor R2 and a control switch MOS tube Q1, VBAT current is input to the input end of the D1, the output end of the D1 is connected with the input end of a resistor R2, the output end of the R2 is electrically connected with the drain electrode of the Q1, a control signal of G510 is input to the gate electrode of the Q1, and the source electrode of the Q1 is grounded.
When the control level is ON, Q5 is turned ON, Q2 is turned ON, and VBAT _4V2 outputs VBAT current to supply G510 after being stabilized by FB1, C3, C4, C5, C6 and C7.
In this embodiment, the SIM information obtaining circuit 24 is directly connected to the SIM card U2 for reading information in the SIM card U2, and the SIM information obtaining circuit 24 includes a filter capacitor C8, a filter capacitor C9, a filter capacitor C10, and a filter capacitor C11, and mainly filters SIM _ DATA, SIM _ CLK, SIM _ RST, and VSIM signals output by the G510. Diodes D2-D5 restrict the flow of SIM _ DATA, SIM _ CLK, SIM _ RST, and VSIM signals, and provide protection.
In the embodiment, the 2G output circuit 23 includes resistors R4-R13, and R4-R13 mainly protect signals and prevent the load of signals input into the single chip microcomputer 1 from being too large.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
Above is the description to the technical scheme that the utility model provides, to technical personnel in the field, according to the utility model discloses the thought of embodiment all has the change part on concrete implementation and range of application, to sum up, this description content should not be understood as the restriction of the utility model.
Claims (6)
1. The LORA intelligent control plugboard circuit is characterized by comprising a single chip microcomputer, a GPRS communication unit, a WiFi communication unit, a battery power supply unit and a remote radio LORA interface unit, wherein the GPRS communication unit, the WiFi communication unit and the LORA interface unit are respectively in communication connection with the single chip microcomputer, the output end of the battery power supply unit is electrically connected with one input end of the single chip microcomputer, the GPRS communication unit comprises an input antenna circuit, a 2G control chip G510, a 2G power supply stabilizing circuit, a 2G output circuit and a SIM information acquisition circuit, the SIM information acquisition circuit is provided with a SIM card U2, one input end of the 2G control chip G510 is electrically connected with the input antenna circuit, the input end of the 2G power supply stabilizing circuit is electrically connected with the output end of the battery power supply circuit, the output end of the 2G power supply stabilizing circuit is electrically connected with the other input end of the 2G control chip G510, the input end of the 2G output circuit is electrically connected with an output end of the 2G control chip G510, the output end of the 2G output circuit is electrically connected with an input end of the single chip microcomputer, the 2G control chip G510 is in communication connection with the SIM card U2, and an input end of the 2G control chip G510 is electrically connected with an output end of the single chip microcomputer.
2. The LORA intelligent control board circuit according to claim 1, wherein the LORA interface unit comprises a LORA debug interface J4 and a LORA module interface J5, and the LORA debug interface J4 and the LORA module interface J5 are electrically connected to the single chip microcomputer, respectively.
3. The LORA intelligent control board circuit according to claim 1, wherein the input antenna circuit comprises an antenna J1, a filter capacitor C1, a filter capacitor C2 and a resistor R1, an input end of the antenna J1 receives a signal, an output end of the antenna J1 is connected to one end of the resistor R1 and one end of the filter capacitor C2 respectively, the other end of the resistor R1 is connected to one end of the filter capacitor C1 and the 2G control chip G510 respectively, and the other end of the filter capacitor C1 and the other end of the filter capacitor C2 are both grounded.
4. The LORA intelligent control board circuit according to claim 1, wherein the 2G power stabilizing circuit comprises a power switch control circuit, a magnetic resistance FB1, a voltage stabilizing capacitor C3, a voltage stabilizing capacitor C4, a voltage stabilizing capacitor C5, a voltage stabilizing capacitor C6 and a voltage stabilizing capacitor C7, wherein a current is input to an input terminal of the power switch control circuit, another input terminal of the power switch control circuit receives a control level sent by the 2G control chip G510, an output terminal of the power switch control circuit is electrically connected to an input terminal of the magnetic resistance FB1, an output terminal of the magnetic resistance FB1 is electrically connected to the voltage stabilizing capacitor C3, an end of the voltage stabilizing capacitor C4, an end of the voltage stabilizing capacitor C5, an end of the voltage stabilizing capacitor C6, an end of the voltage stabilizing capacitor C7 and an input terminal of the 2G control chip G510, respectively, another end of the voltage stabilizing capacitor C4, a voltage stabilizing capacitor C3932 and an input terminal of the voltage stabilizing capacitor C, The other end of the voltage-stabilizing capacitor C5, the other end of the voltage-stabilizing capacitor C6 and the other end of the voltage-stabilizing capacitor C7 are grounded.
5. The LORA intelligent control board circuit according to claim 4, wherein the power switch control circuit comprises a resistor R3, a resistor R72, a MOS transistor Q2 and a MOS transistor Q5, wherein a current is input to a source of the MOS transistor Q2 and one end of the resistor R3, a gate of the MOS transistor Q2 is electrically connected to the other end of the resistor R3 and a drain of the MOS transistor Q5, respectively, a drain of the MOS transistor Q2 is electrically connected to an input end of the resistor FB1, a gate of the MOS transistor Q5 receives the control level, a source of the MOS transistor Q5 is grounded, one end of the resistor R72 is electrically connected to a gate of the MOS transistor Q5, and the other end of the resistor R72 is grounded.
6. The LORA intelligent control socket circuit according to claim 1, wherein the GPRS communication unit further comprises a work indication circuit, an input end of the work indication circuit is electrically connected with the battery control unit and the 2G control chip G510, respectively, and an output end of the work indication circuit is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920821404.5U CN209930252U (en) | 2019-05-31 | 2019-05-31 | LORA intelligent control plug board circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920821404.5U CN209930252U (en) | 2019-05-31 | 2019-05-31 | LORA intelligent control plug board circuit |
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| CN209930252U true CN209930252U (en) | 2020-01-10 |
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| CN201920821404.5U Active CN209930252U (en) | 2019-05-31 | 2019-05-31 | LORA intelligent control plug board circuit |
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| CN (1) | CN209930252U (en) |
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- 2019-05-31 CN CN201920821404.5U patent/CN209930252U/en active Active
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