CN212435602U

CN212435602U - Electrolytic capacitor-free high-efficiency converter for inhibiting power ripples

Info

Publication number: CN212435602U
Application number: CN202021676367.2U
Authority: CN
Inventors: 蔡东林; 林仁杰; 傅晋民; 陈招治; 李龙斌; 黄辉雄; 郑明星; 柯清波; 陈永往; 许共龙; 孙轩
Original assignee: Jinjiang Power Supply Co of State Grid Fujian Electric Power Co Ltd
Current assignee: Jinjiang Power Supply Co of State Grid Fujian Electric Power Co Ltd
Priority date: 2020-08-13
Filing date: 2020-08-13
Publication date: 2021-01-29
Anticipated expiration: 2030-08-13

Abstract

The utility model relates to a restrain electrolytic capacitor high efficiency converter of no electrolytic capacitor of power ripple, connect in parallel the active filter on the generating line in the converter and can handle direct current side secondary pulsating power and reduce the busbar voltage ripple, so can use the mode of enlargiing filter capacitor voltage ripple to reduce required filter capacitance value in a large number, so that use the less but more stable performance of appearance value, the longer thin film electric capacity of life-span of use replaces electrolytic capacitor, thereby ensure that the converter has higher reliability and longer life-span under the condition that can restrain the busbar voltage ripple; meanwhile, the filter capacitor is decoupled from the bus, and the voltage stress of the filter capacitor is far lower than the bus voltage, so that a thin film capacitor with the same capacitance value, lower withstand voltage and smaller volume can be selected to replace an electrolytic capacitor, the volume of the filter capacitor is reduced, and the power density of the converter is improved; in addition, the voltage stress of the switch tube in the active filter is far lower than the bus voltage, so that the loss of the switch tube is reduced, and the high efficiency of the converter is realized.

Description

Electrolytic capacitor-free high-efficiency converter for inhibiting power ripples

Technical Field

The utility model relates to a new forms of energy electric automobile field, especially a no electrolytic capacitor high efficiency converter of suppression power ripple.

Background

The new energy electric automobile has the characteristics of zero emission, high efficiency and sustainability, is in line with the new concepts of environmental protection, energy conservation and emission reduction, is favored, and has become a new trend in the development of new energy electric automobiles. The vehicle-mounted charger plays an important role in providing energy for the new energy electric automobile. An AC/DC converter is generally used as the vehicle-mounted charger, but for the AC/DC converter, because the instantaneous power of the DC-side load and the AC-side input power supply does not match, a secondary pulsating power with twice the grid frequency exists on the DC side, and the secondary pulsating power makes the DC-side bus voltage ripple large, which affects the reliability and stability of the converter. The existing vehicle-mounted charger often adopts a large-capacity electrolytic capacitor connected in parallel on a bus as shown in fig. 1 to process secondary pulsating power. However, since the electrolytic capacitor is sensitive to temperature and has a short lifetime, the reliability and lifetime of the system are reduced. The defect directly influences the performance, reliability and service life of the vehicle-mounted charger, and indirectly limits the popularization of new energy electric vehicles.

Disclosure of Invention

In view of this, the utility model aims at providing a no electrolytic capacitor high efficiency converter of suppression power ripple, no electrolytic capacitor can realize high reliability, long-life, high power density and high efficiency, uses as on-vehicle charger in the specially adapted new forms of energy electric automobile field simultaneously.

The utility model discloses a following scheme realizes: an electrolytic capacitor-free high-efficiency converter for inhibiting power ripples comprises a converter main circuit and a converter control circuit, wherein the converter control circuit is connected with the converter main circuit and is used for controlling the converter main circuit to tend to be stable; the converter main circuit comprises a rectifier bridge and a Boost PFC converter connected in parallel in a staggered mode; the rectifier bridge is connected in parallel with the interleaved parallel Boost PFC converter; the input end of the rectifier bridge is connected with an external alternating voltage; the interleaved parallel Boost PFC converter comprises a first inductor L₁A second inductor L₂A first switch tube S₁A second switch tube S₂A first diode D₁A second diode D₂Bus capacitor C_busAn active filter and a load; the first inductor L₁One end of and the second inductance L₂One end of the rectifier is connected with the positive output end of the rectifier bridge and is connected with the positive output end of the rectifier bridge; the first inductor L₁Is respectively connected with the first switch tube S₁And the first diode D₁The anode of (2) is connected; the second inductor L₂Is connected with the second switching tube S₂And the second diode D₂The anode of (2) is connected; the first diode D₁And the second diode D₂Is connected with the bus capacitor C at the same time_busIs connected with one end of the connecting rod; the first switch tube S₁Source electrode of and the second switch tube S₂The source electrodes of the two-way rectifier are connected with the negative output end of the rectifier bridge and are simultaneously connected with the bus capacitor C_busThe other end of the first and second connecting rods is connected; the bus capacitor C_busThe load and the load are connected on a bus in parallel; the active filter and the bus capacitor C_busAnd the direct current side secondary pulsating power is processed to reduce the bus voltage ripple.

Further, the rectifier bridge comprises a third diode D₃A fourth diode D₄A fifth diode D₅And a sixth diode D₆(ii) a The third diode D₃And the fifth diode D₅Is connected with the positive pole of the external alternating current input voltage as the positive input end of the rectifier bridge; the fourth diode D₄And the sixth diode D₆The negative electrode is connected with the negative electrode of the external alternating current input voltage as the negative input end of the rectifier bridge; the third diode D₃And the fourth diode D₄Is connected and serves as the forward output end of the rectifier bridge; the fifth diode D₅And the sixth diode D₆Is connected and serves as the negative output terminal of the rectifier bridge.

Further, the active filter comprises a first filter capacitor C₁A second filter capacitor C₂The third opening tube S₃And a fourth switching tube S₄And a third inductance L₃(ii) a The first filter capacitor C₁One end of the positive electrode is connected with the positive electrode of the bus; the first filteringCapacitor C₁And the other end of the third switching tube S₃The drain of the third switching tube S is connected with₃Respectively with the third inductor L₃And said fourth switching tube S₄Is connected to pass through the first filter capacitor C₁Bears the third switch tube S₃And a fourth switching tube S₄Partial voltage stress of the third switching tube S₃And a fourth switching tube S₄The voltage stress is lower than the bus voltage, so that the loss of the switching tube is reduced; the third inductor L₃And the other end of the second filter capacitor C₂Is connected with one end of the connecting rod; the second filter capacitor C₂And the other end of the second switch tube S₄Is connected to the negative pole of the bus bar.

Furthermore, the converter control circuit comprises a singlechip processor circuit, an alternating voltage sampling circuit and a first inductor L₁Current sampling circuit and second inductor L₂Current sampling circuit, first drive circuit, second drive circuit, bus current sampling circuit, bus voltage sampling circuit, first filter capacitor C₁Voltage sampling circuit and second filter capacitor C₂Voltage sampling circuit and third inductor L₃A current sampling circuit; the alternating voltage sampling circuit is connected with an external alternating input voltage, and the single chip microcomputer processor circuit is connected with the alternating voltage sampling circuit and used for receiving a signal of the external alternating input voltage after passing through the alternating voltage sampling circuit; the first inductor L₁Current sampling circuit and the first inductor L₁Connected, the single chip processor circuit and the first inductor L₁A current sampling circuit connected to receive the first inductor L₁The current flows through the first inductor L₁A signal after the current sampling circuit; the second inductor L₂Current sampling circuit and the second inductor L₂Connected, the singlechip processor circuit and the second inductor L₂A current sampling circuit connected to receive the second inductor L₂The current flows through the second inductor L₂A signal after the current sampling circuit; bus current sampling circuit and busThe single chip processor circuit is connected with the bus current sampling circuit and used for receiving a signal of the bus current after passing through the bus current sampling circuit; the bus voltage sampling circuit is connected with a bus, and the single chip processor circuit is connected with the bus voltage sampling circuit and used for receiving a signal of the bus voltage after passing through the bus voltage sampling circuit; the first filter capacitor C₁And the first filter capacitor C₁The voltage sampling circuit is connected with the single chip processor circuit and the first filter capacitor C₁A voltage sampling circuit connected to receive the first filter capacitor C₁Through a first filter capacitor C₁A signal after the voltage sampling circuit; the second filter capacitor C₂And the second filter capacitor C₂The voltage sampling circuit is connected with the singlechip processor circuit and the second filter capacitor C₂A voltage sampling circuit connected to receive the second filter capacitor C₂Via a second filter capacitor C₂A signal after the voltage sampling circuit; the third inductor L₃Current sampling circuit and the third inductor L₃Connected, the singlechip processor circuit and the third inductor L₃A current sampling circuit connected to receive the third inductor L₃The current flows through the third inductor L₃A signal after the current sampling circuit; the single chip processor circuit is further connected with the first drive circuit and the second drive circuit respectively, and is used for sending two control signals to the first drive circuit and the second drive circuit respectively after receiving the signals of the sampling circuit, so that the first drive circuit controls the converter main circuit to realize input side power factor correction and bus voltage stabilization, and the second drive circuit controls the active filter to suppress power ripples on a bus.

Compared with the prior art, the utility model discloses following beneficial effect has:

(1) the utility model discloses parallelly connected active filter on the generating line can handle direct current side secondary pulsating power and reduce the busbar voltage ripple, so can use and enlarge first filter capacitor C₁Voltage ripple and second filter capacitorC₂The required filter capacitance value is greatly reduced in a voltage ripple mode, so that a thin-film capacitor with a smaller capacitance value, more stable performance and longer service life is used for replacing an electrolytic capacitor, and the electrolytic-free capacitor is realized, so that the converter has higher reliability and longer service life under the condition of inhibiting the bus voltage ripple.

(2) The utility model discloses a filter capacitor C₁And a second filter capacitor C₂Are all decoupled from the bus, a first filter capacitor C₁Voltage stress and second filter capacitance C₂The voltage stress is far lower than the bus voltage, so that a thin film capacitor with the same capacitance value, lower withstand voltage and smaller volume can be selected to replace an electrolytic capacitor, the volume of the filter capacitor is greatly reduced, and the power density of the converter is improved.

(3) The utility model discloses first filter capacitor C among the active filter₁Bears a third switch tube S₃Partial voltage stress of and fourth switching tube S₄Partial voltage stress of the third switching tube S₃Voltage stress of and fourth switching tube S₄The voltage stress is far lower than the bus voltage, the loss of the switch tube is reduced, and therefore the high efficiency of the converter can be achieved.

Drawings

Fig. 1 is a schematic diagram of an on-board charger in the prior art according to an embodiment of the present invention.

Fig. 2 is a block diagram of a converter system according to an embodiment of the present invention.

Fig. 3 is a schematic circuit diagram of a main circuit of a converter according to an embodiment of the present invention.

FIG. 4 is a circuit diagram of a converter voltage sampling circuit according to an embodiment of the present invention, in which FIG. 4(a) is an AC voltage v_acA sampling circuit diagram, in which FIG. 4(b) shows a bus voltage v_busA first filter capacitor C₁Voltage v_C1And a second filter capacitor C₂Voltage v_C2A circuit diagram is sampled.

FIG. 5 shows a first inductor L of the converter according to an embodiment of the present invention₁Current i_L1A second inductor L₂Current i_L2Bus current i_busAnd a third inductor L₃Current i_L3A circuit diagram is sampled.

Fig. 6 is a circuit diagram of the converter single-chip processor according to the embodiment of the present invention.

Fig. 7 is a diagram of a converter control method according to an embodiment of the present invention, in which fig. 7(a) is a diagram of a main circuit control method, and fig. 7(b) is a diagram of an active filter control method.

Fig. 8 is a circuit diagram of a converter according to an embodiment of the present invention, in which fig. 8(a) is a first driving circuit diagram, and fig. 8(b) is a second driving circuit diagram.

Fig. 9 is a key waveform diagram of the power frequency cycle of the converter according to the embodiment of the present invention.

FIG. 10 is a diagram showing the switching cycle state of an active filter in a converter according to an embodiment of the present invention, in which FIG. 10(a) shows an inductor L₃Current i_L3The state diagram when the linearity is increased and is greater than zero, and FIG. 10(b) shows the inductance L₃Current i_L3The state diagram when the linearity is reduced and is greater than zero, and FIG. 10(c) shows the inductance L₃Current i_L3The state diagram of linear increase and less than zero, FIG. 10(d) is the inductance L₃Current i_L3The linearity is reduced and is less than zero state diagram.

Fig. 11 is a waveform diagram illustrating a switching cycle key of an active filter in a converter according to an embodiment of the present invention.

Fig. 12 is a schematic diagram of a converter circuit simulation power frequency cycle key waveform according to an embodiment of the present invention.

FIG. 13 is a waveform diagram illustrating the switching period of an active filter in a converter circuit simulation according to an embodiment of the present invention, wherein FIG. 13(a) is an inductor L₃Current i_L3A waveform diagram at greater than zero, FIG. 13(b) is the inductance L₃Current i_L3A waveform diagram less than zero.

Detailed Description

The present invention will be further explained with reference to the drawings and the embodiments.

The present embodiment provides an electrolytic capacitor-free high-efficiency converter for suppressing power ripple, which includes a converter main circuit and a converter control circuit, as shown in fig. 2The control circuit is connected with the converter main circuit and used for controlling the converter main circuit to tend to be stable; as shown in fig. 3, the converter main circuit comprises a rectifier bridge and an interleaved parallel Boost PFC converter; the rectifier bridge is connected in parallel with the interleaved parallel Boost PFC converter; the input end of the rectifier bridge is connected with an external alternating voltage; the interleaved parallel Boost PFC converter comprises a first inductor L₁A second inductor L₂A first switch tube S₁A second switch tube S₂A first diode D₁A second diode D₂Bus capacitor C_busAn active filter and a load; the first inductor L₁One end of and the second inductance L₂One end of the rectifier is connected with the positive output end of the rectifier bridge and is connected with the positive output end of the rectifier bridge; the first inductor L₁Is respectively connected with the first switch tube S₁And the first diode D₁The anode of (2) is connected; the second inductor L₂Is connected with the second switching tube S₂And the second diode D₂The anode of (2) is connected; the first diode D₁And the second diode D₂Is connected with the bus capacitor C at the same time_busIs connected with one end of the connecting rod; the first switch tube S₁Source electrode of and the second switch tube S₂The source electrodes of the two-way rectifier are connected with the negative output end of the rectifier bridge and are simultaneously connected with the bus capacitor C_busThe other end of the first and second connecting rods is connected; the bus capacitor C_busThe load and the load are connected on a bus in parallel; the active filter and the bus capacitor C_busAnd the direct current side secondary pulsating power is processed to reduce the bus voltage ripple.

As shown in fig. 3, in the present embodiment, the rectifier bridge includes a third diode D₃A fourth diode D₄A fifth diode D₅And a sixth diode D₆(ii) a The third diode D₃And the fifth diode D₅Is connected with the positive pole of the external alternating current input voltage as the positive input end of the rectifier bridge; the fourth diode D₄And the sixth diode D₆The negative electrode is connected with the negative electrode of the external alternating current input voltage as the negative input end of the rectifier bridge; the third diode D₃And the fourth diode D₄Is connected and serves as the forward output end of the rectifier bridge; the fifth diode D₅And the sixth diode D₆Is connected and serves as the negative output terminal of the rectifier bridge.

As shown in fig. 3, in the present embodiment, the active filter includes a first filter capacitor C₁A second filter capacitor C₂The third opening tube S₃And a fourth switching tube S₄And a third inductance L₃(ii) a The first filter capacitor C₁One end of the positive electrode is connected with the positive electrode of the bus; the first filter capacitor C₁And the other end of the third switching tube S₃The drain of the third switching tube S is connected with₃Respectively with the third inductor L₃And said fourth switching tube S₄Is connected to pass through the first filter capacitor C₁Bears the third switch tube S₃And a fourth switching tube S₄Partial voltage stress of the third switching tube S₃And a fourth switching tube S₄The voltage stress is lower than the bus voltage, so that the loss of the switching tube is reduced; the third inductor L₃And the other end of the second filter capacitor C₂Is connected with one end of the connecting rod; the second filter capacitor C₂And the other end of the second switch tube S₄Is connected to the negative pole of the bus bar.

As shown in fig. 2, in this embodiment, the converter control circuit includes a single chip processor circuit, an ac voltage sampling circuit, and a first inductor L₁Current sampling circuit and second inductor L₂Current sampling circuit, first drive circuit, second drive circuit, bus current sampling circuit, bus voltage sampling circuit, first filter capacitor C₁Voltage sampling circuit and second filter capacitor C₂Voltage sampling circuit and third inductor L₃A current sampling circuit; the alternating currentThe voltage sampling circuit is connected with an external alternating-current input voltage, and the single-chip microcomputer processor circuit is connected with the alternating-current voltage sampling circuit and used for receiving a signal of the external alternating-current input voltage after passing through the alternating-current voltage sampling circuit; the first inductor L₁Current sampling circuit and the first inductor L₁Connected, the single chip processor circuit and the first inductor L₁A current sampling circuit connected to receive the first inductor L₁The current flows through the first inductor L₁A signal after the current sampling circuit; the second inductor L₂Current sampling circuit and the second inductor L₂Connected, the singlechip processor circuit and the second inductor L₂A current sampling circuit connected to receive the second inductor L₂The current flows through the second inductor L₂A signal after the current sampling circuit; the bus current sampling circuit is connected with a bus, and the single chip processor circuit is connected with the bus current sampling circuit and used for receiving a signal of the bus current after passing through the bus current sampling circuit; the bus voltage sampling circuit is connected with a bus, and the single chip processor circuit is connected with the bus voltage sampling circuit and used for receiving a signal of the bus voltage after passing through the bus voltage sampling circuit; the first filter capacitor C₁And the first filter capacitor C₁The voltage sampling circuit is connected with the single chip processor circuit and the first filter capacitor C₁A voltage sampling circuit connected to receive the first filter capacitor C₁Through a first filter capacitor C₁A signal after the voltage sampling circuit; the second filter capacitor C₂And the second filter capacitor C₂The voltage sampling circuit is connected with the singlechip processor circuit and the second filter capacitor C₂A voltage sampling circuit connected to receive the second filter capacitor C₂Via a second filter capacitor C₂A signal after the voltage sampling circuit; the third inductor L₃Current sampling circuit and the third inductor L₃Connected, the singlechip processor circuit and the third inductor L₃A current sampling circuit connected to receive the third inductor L₃The current flows through the third inductor L₃Electric current miningSampling the signal after the circuit; the single chip processor circuit is further connected with the first drive circuit and the second drive circuit respectively, and is used for sending two control signals to the first drive circuit and the second drive circuit respectively after receiving the signals of the sampling circuit, so that the first drive circuit controls the converter main circuit to realize input side power factor correction and bus voltage stabilization, and the second drive circuit controls the active filter to suppress power ripples on a bus.

Preferably, as shown in fig. 3 and fig. 9, the present embodiment further provides a method for operating a high-efficiency converter without electrolytic capacitor based on power ripple suppression, wherein when the converter is operating normally, because the ac side implements a high power factor, the ac input instantaneous power of the ac side includes a dc component and an ac component; the direct current side realizes low ripple of load voltage, so that the direct current output power only contains a direct current component and does not contain an alternating current component; when the AC input instantaneous power is larger than the DC output power, the excess power is applied to the bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂Charging is carried out, and the bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂The voltage rises from the respective minimum value to the respective maximum value, respectively, and the bus capacitance C_busA first filter capacitor C₁And a second filter capacitor C₂All store energy; when the AC input instantaneous power is smaller than the DC output power, the power is respectively decreased by the bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂Discharge supply, bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂The voltage is respectively reduced from the maximum value to the minimum value, and the bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂All release energy; with the fluctuation of AC input instantaneous power, the bus capacitor C_busVoltage, first filter capacitor C₁Voltage and second filter capacitor C₂The voltage is respectively between the maximum value and the minimum valueThe period of the power frequency is fluctuated back and forth, and the fluctuation process is realized by a bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂And processing the secondary pulsating power to reduce the bus voltage ripple.

Preferably, as shown in fig. 2, in this embodiment, the active filter connected in parallel to the bus can process the dc-side secondary pulsating power to reduce the bus voltage ripple (1), and the required filter capacitance value can be greatly reduced by amplifying the first filter capacitor voltage ripple (2) and the second filter capacitor voltage ripple (3), so that the electrolytic capacitor is replaced by a thin film capacitor with a smaller capacitance value, more stable performance and longer service life, and no electrolytic capacitor is implemented, thereby ensuring that the converter has higher reliability and longer service life under the condition of being able to suppress the bus voltage ripple; meanwhile, the first filter capacitor C₁And a second filter capacitor C₂Are all decoupled with a bus, and the first filter capacitor C₁Voltage stress and second filter capacitance C₂The voltage stress is far lower than the bus voltage, so that a thin film capacitor with the same capacitance value, lower withstand voltage and smaller volume can be selected to replace an electrolytic capacitor, the volume of the filter capacitor is greatly reduced, and the power density of the converter is improved; in addition, the voltage stress of the switch tube in the active filter is far lower than the bus voltage, the loss of the switch tube is low, and the high efficiency of the converter can be realized.

Preferably, as shown in fig. 3, in the present embodiment, the first filter capacitor C in the active filter₁Bears the third switch tube S₃Partial voltage stress of and fourth switching tube S₄Partial voltage stress of the third switching tube S₃Voltage stress of and fourth switching tube S₄The voltage stress of the converter is far lower than the bus voltage, the loss of the switching tube is reduced, and therefore the high efficiency of the converter is achieved.

Preferably, as shown in fig. 2, in this embodiment, the control circuit includes a voltage sampling circuit shown in fig. 4, a current sampling circuit shown in fig. 5, a single-chip processor circuit shown in fig. 6, and a single-chip processor circuit shown in fig. 8The drive circuit shown. The single chip processor circuit simultaneously receives the signal of the AC input voltage after passing through the AC voltage sampling circuit and the first inductor L₁The current flows through the first inductor L₁Signal after current sampling circuit, second inductance L₂The current flows through the second inductor L₂The signal after the current sampling circuit, the signal after the bus current passes through the bus current sampling circuit, the signal after the bus voltage passes through the bus voltage sampling circuit, and the first filter capacitor C₁The voltage passes through a first filter capacitor C₁Signal after voltage sampling circuit, second filter capacitor C₂The voltage passes through a second filter capacitor C₂Signal after voltage sampling circuit and third inductance L₃The current flows through the third inductor L₃After the signals after the current sampling circuit are sampled, two control signals are generated and sent to two driving circuits shown in fig. 8 by using a control mode shown in fig. 7; the first driving circuit controls the electrolytic capacitor-free high-efficiency converter main circuit for inhibiting the power ripple so as to be beneficial to realizing the functions of input side power factor correction and bus voltage stabilization; the second driving circuit controls an active filter in the electrolytic capacitor-free high-efficiency converter for inhibiting the power ripple so as to be beneficial to inhibiting the bus voltage ripple and realizing the high efficiency of the converter under the condition of not using an electrolytic capacitor.

Preferably, as shown in FIG. 9, in the present embodiment, v_ac、i_ac、p_in、v_bus、v_C1、v_C2、v_ds3、v_ds4、i_L3T respectively represents AC input voltage, AC input current, AC input instantaneous power, bus voltage, and first filter capacitor C₁Voltage, second filter capacitor C₂Voltage, third switch tube S₃Voltage stress, fourth switch tube S₄Voltage stress, third inductance L₃Current, power frequency cycle. When T/T is at [1/8,3/8 ]]At stage time, instantaneous power p is input by AC_inGreater than the DC output power P_oThe excess power is respectively applied to the bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂Charging is carried out, its electricityThe pressures are respectively from respective minimum values v_{bus_min}、v_{C1_min}、v_{C2_min}Rising to respective maximum values v_{bus_max}、v_{C1_max}、v_{C2_max}Bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂All store energy; when T/T is at [3/8,5/8 ]]At stage time, instantaneous power p is input by AC_inLess than the DC output power P_oThe part of the power which is less is respectively provided by a bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂Providing discharges with voltages from respective maximum values v_{bus_max}、v_{C1_max}、v_{C2_max}Down to respective minimum values v_{bus_min}、v_{C1_min}、v_{C2_min}Bus capacitor C_busA first filter capacitor C₁And a second filter capacitor C₂All release energy. With AC input instantaneous power p_inFluctuation of (C), bus capacitance_busVoltage v_busA first filter capacitor C₁Voltage v_C1And a second filter capacitor C₂Voltage v_C2The power frequency is respectively fluctuated back and forth between the maximum value and the minimum value of the power frequency by a period of twice power frequency, and the fluctuation process is the process of processing secondary pulse power by the capacitor.

As shown in FIGS. 10 and 11, where v_gs3、v_gs4、i_L3Respectively represent a third switch tube S₃Drive signal, fourth switch tube S₄Drive signal, third inductance L₃The four switching cycle states of the current and active filter are described in detail as follows:

1、t₁—t₂status of state

As shown in fig. 10(a) and 11, the third switch tube S₃Conducting the fourth switching tube S₄And (6) turning off. Third inductance L₃Voltage v across_L3Equal to the bus voltage v_busMinus a first filter capacitor C₁Voltage v_C1And a second filter capacitor C₂Voltage v_C2Sum, i.e. v_L3= v_bus-(v_C1+v_C2) Inductance L₃Stored energy, inductanceCurrent i_L3Linearly increasing and greater than zero.

2、t₂—t₃Status of state

As shown in fig. 10(b) and 11, the third switch tube S₃Turn-off, fourth switch tube S₄And conducting. Third inductance L₃Voltage v across_L3Equal to negative second filter capacitor voltage v_C2I.e. v_L3= -v_C2Inductance L₃Discharge energy, inductor current i_L3The linearity decreases and is greater than zero.

3、t₄—t₅Status of state

As shown in fig. 10(c) and 11, the third switch tube S₃Turn-off, fourth switch tube S₄And conducting. Third inductance L₃Voltage v across_L3Equal to negative second filter capacitor voltage v_C2I.e. v_L3= -v_C2Inductance L₃Stored energy, inductor current i_L3Linearly increasing and less than zero.

4、t₅—t₆Status of state

As shown in fig. 10(d) and 11, the third switch tube S₃Conducting the fourth switching tube S₄And (6) turning off. Third inductance L₃Voltage v across_L3Equal to the bus voltage v_busMinus the first filter capacitor voltage v_C1And a second filter capacitor voltage v_C2Sum, i.e. v_L3= v_bus-(v_C1+v_C2) Inductance L₃Discharge energy, inductor current i_L3The linearity decreases and is less than zero.

With the PSIM simulation software, the converter circuit simulation parameters of this embodiment are designed as follows: effective value v of AC input voltage_{ac_rms}=220V, bus voltage mean value V_{bus_avg}=400V, mean value V of voltage of first filter capacitor_{C1_avg}=150V, second filter capacitor voltage mean value V_{C2_avg}=180V, load power P_o=7kW, bus capacitance C_bus=500 μ F, first filter capacitor C₁=550 μ F, second filter capacitance C₂=1200µF。

From the simulation results of fig. 12, it can be seen that the ac input side realizes high powerRate factor, PF = 0.999; bus voltage mean v_{bus_avg}=400V, mean value V of voltage of first filter capacitor_{C1_avg}=150V, second filter capacitor voltage mean value V_{C2_avg}=180V, all in agreement with theoretical design values; bus voltage ripple Δ v_bus=17V, first filter capacitor voltage ripple Δ V_C1=96V, second filter capacitor voltage ripple Δ V_C2=52V, the bus voltage low ripple is verified, and compared with the mode of adopting a large-capacity electrolytic capacitor connected in parallel on a bus as shown in fig. 1, the capacitance value 1028 [ mu ] F can be reduced, so that the required filter capacitance value is greatly reduced, a thin film capacitor with a smaller capacitance value, more stable performance and longer service life can be used for replacing the electrolytic capacitor, and the reliability and the service life of the system are improved; at the same time, the maximum value v of the first filter capacitor voltage_{C1_max}=198V, second filter capacitor voltage maximum value V_{C2_max}=206V, the voltage stress of the first filter capacitor and the voltage stress of the second filter capacitor are both much lower than the bus voltage, which verifies that the electrolytic capacitor can be replaced by a thin film capacitor with the same capacitance value, but lower withstand voltage and smaller volume, thus greatly reducing the volume of the filter capacitor and realizing the improvement of the power density of the converter; in addition, the first filter capacitor bears the third switch tube S₃And a fourth switching tube S₄Partial voltage stress of the third switching tube S₃Voltage stress v_ds3=287V, fourth switching tube S₄Voltage stress v_ds4=287V, all well below the bus voltage, verifying that low losses of the switching tube, high efficiency of the converter can be achieved.

From the simulation results of fig. 13, it can be seen that the third switch tube S is in four switching period states of the active filter₃Drive signal v_gs3And a fourth switching tube S₄Drive signal v_gs4A third inductor L₃Current i_L3The four switching period simulation waveforms of (a) are all consistent with the four switching period theoretical analysis waveforms of fig. 11.

Therefore, the circuit simulation waveforms of fig. 12 and fig. 13 further verify the correctness of the theoretical analysis and the feasibility of the implementation of the scheme of the electrolytic capacitor-free high-efficiency converter for suppressing the power ripple.

It is worth mentioning that the utility model protects a hardware structure, as for the control method does not require protection. The above is only a preferred embodiment of the present invention. However, the present invention is not limited to the above embodiments, and any equivalent changes and modifications made according to the present invention do not exceed the scope of the present invention, and all belong to the protection scope of the present invention.

Claims

1. An electrolytic capacitor-free high-efficiency converter for suppressing power ripples, characterized in that: the control circuit comprises a converter main circuit and a converter control circuit, wherein the converter control circuit is connected with the converter main circuit and is used for controlling the converter main circuit to tend to be stable; the converter main circuit comprises a rectifier bridge and a Boost PFC converter connected in parallel in a staggered mode; the rectifier bridge is connected in parallel with the interleaved parallel Boost PFC converter; the input end of the rectifier bridge is connected with an external alternating voltage; the interleaved parallel Boost PFC converter comprises a first inductor L₁A second inductor L₂A first switch tube S₁A second switch tube S₂A first diode D₁A second diode D₂Bus capacitor C_busAn active filter and a load; the first inductor L₁One end of and the second inductance L₂One end of the rectifier is connected with the positive output end of the rectifier bridge and is connected with the positive output end of the rectifier bridge; the first inductor L₁Is respectively connected with the first switch tube S₁And the first diode D₁The anode of (2) is connected; the second inductor L₂Is connected with the second switching tube S₂And the second diode D₂The anode of (2) is connected; the first diode D₁And the second diode D₂Is connected with the bus capacitor C at the same time_busIs connected with one end of the connecting rod; the first switch tube S₁Source electrode of and the second switch tube S₂Are all connected with the negative output end of the rectifier bridge and are simultaneously connected with the negative output end of the rectifier bridgeBus capacitor C_busThe other end of the first and second connecting rods is connected; the bus capacitor C_busThe load and the load are connected on a bus in parallel; the active filter and the bus capacitor C_busAnd the direct current side secondary pulsating power is processed to reduce the bus voltage ripple.

2. The electrolytic capacitor-free high-efficiency converter for suppressing power ripples according to claim 1, wherein: the rectifier bridge comprises a third diode D₃A fourth diode D₄A fifth diode D₅And a sixth diode D₆(ii) a The third diode D₃And the fifth diode D₅Is connected with the positive pole of the external alternating current input voltage as the positive input end of the rectifier bridge; the fourth diode D₄And the sixth diode D₆The negative electrode is connected with the negative electrode of the external alternating current input voltage as the negative input end of the rectifier bridge; the third diode D₃And the fourth diode D₄Is connected and serves as the forward output end of the rectifier bridge; the fifth diode D₅And the sixth diode D₆Is connected and serves as the negative output terminal of the rectifier bridge.

3. The electrolytic capacitor-free high-efficiency converter for suppressing power ripples according to claim 1, wherein: the active filter comprises a first filter capacitor C₁A second filter capacitor C₂The third opening tube S₃And a fourth switching tube S₄And a third inductance L₃(ii) a The first filter capacitor C₁One end of the positive electrode is connected with the positive electrode of the bus; the first filter capacitor C₁And the other end of the third switching tube S₃The drain of the third switching tube S is connected with₃Respectively with the third inductor L₃And said fourth switching tube S₄Is connected to pass through the first filter capacitor C₁Bear againstThird switch tube S₃And a fourth switching tube S₄Partial voltage stress of the third switching tube S₃And a fourth switching tube S₄The voltage stress is lower than the bus voltage, so that the loss of the switching tube is reduced; the third inductor L₃And the other end of the second filter capacitor C₂Is connected with one end of the connecting rod; the second filter capacitor C₂And the other end of the second switch tube S₄Is connected to the negative pole of the bus bar.

4. The electrolytic capacitor-free high efficiency converter with suppressed power ripples according to claim 3, characterized in that: the converter control circuit comprises a singlechip processor circuit, an alternating voltage sampling circuit and a first inductor L₁Current sampling circuit and second inductor L₂Current sampling circuit, first drive circuit, second drive circuit, bus current sampling circuit, bus voltage sampling circuit, first filter capacitor C₁Voltage sampling circuit and second filter capacitor C₂Voltage sampling circuit and third inductor L₃A current sampling circuit; the alternating voltage sampling circuit is connected with an external alternating input voltage, and the single chip microcomputer processor circuit is connected with the alternating voltage sampling circuit and used for receiving a signal of the external alternating input voltage after passing through the alternating voltage sampling circuit; the first inductor L₁Current sampling circuit and the first inductor L₁Connected, the single chip processor circuit and the first inductor L₁A current sampling circuit connected to receive the first inductor L₁The current flows through the first inductor L₁A signal after the current sampling circuit; the second inductor L₂Current sampling circuit and the second inductor L₂Connected, the singlechip processor circuit and the second inductor L₂A current sampling circuit connected to receive the second inductor L₂The current flows through the second inductor L₂A signal after the current sampling circuit; the bus current sampling circuit is connected with a bus, and the single chip processor circuit is connected with the bus current sampling circuit and used for receiving a signal of the bus current after passing through the bus current sampling circuit; what is needed isThe bus voltage sampling circuit is connected with a bus, and the single chip processor circuit is connected with the bus voltage sampling circuit and used for receiving a signal of the bus voltage after passing through the bus voltage sampling circuit; the first filter capacitor C₁And the first filter capacitor C₁The voltage sampling circuit is connected with the single chip processor circuit and the first filter capacitor C₁A voltage sampling circuit connected to receive the first filter capacitor C₁Through a first filter capacitor C₁A signal after the voltage sampling circuit; the second filter capacitor C₂And the second filter capacitor C₂The voltage sampling circuit is connected with the singlechip processor circuit and the second filter capacitor C₂A voltage sampling circuit connected to receive the second filter capacitor C₂Via a second filter capacitor C₂A signal after the voltage sampling circuit; the third inductor L₃Current sampling circuit and the third inductor L₃Connected, the singlechip processor circuit and the third inductor L₃A current sampling circuit connected to receive the third inductor L₃The current flows through the third inductor L₃A signal after the current sampling circuit; the single chip processor circuit is further connected with the first drive circuit and the second drive circuit respectively, and is used for sending two control signals to the first drive circuit and the second drive circuit respectively after receiving the signals of the sampling circuit, so that the first drive circuit controls the converter main circuit to realize input side power factor correction and bus voltage stabilization, and the second drive circuit controls the active filter to suppress power ripples on a bus.