CN212391880U - Signal control system based on carrier wave technology and wireless signal technology - Google Patents
Signal control system based on carrier wave technology and wireless signal technology Download PDFInfo
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- CN212391880U CN212391880U CN202021212519.3U CN202021212519U CN212391880U CN 212391880 U CN212391880 U CN 212391880U CN 202021212519 U CN202021212519 U CN 202021212519U CN 212391880 U CN212391880 U CN 212391880U
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Abstract
The utility model relates to the technical field of signal control, in particular to a signal control system based on a carrier wave technology and a wireless signal technology, which comprises a shell, wherein a PCB circuit board is arranged in the shell, and a master control circuit is arranged on the PCB circuit board; the master control circuit comprises a master controller control circuit and a slave controller control circuit; the main controller control circuit comprises a U1 chip, a U2 chip, a U3 chip, a U4 chip, a wireless receiving module and a power carrier main module; the 1 st pin of the U1 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C3 and the capacitor C11 are connected in parallel to pins 2 and 3 of the U1 chip, and the pin 3 of the U1 chip is connected with a +12V power supply; the wireless control system converts wireless signals into power carrier signals, utilizes the carrier signals to be loaded on a power line, realizes wired transmission, and transmits the power carrier signals to a receiving end through a power line, thereby realizing wireless control.
Description
Technical Field
The utility model relates to a signal control technical field, concretely relates to signal control system based on carrier wave technique and radio signal technique.
Background
With the advent of the internet + era and the rapid development of electronic commerce, the society has become a network era based on networks and using intelligent devices as terminals. The network connecting the intelligent equipment terminals mainly adopts a wired network and a wireless network, and the wireless network is favored by people due to the convenience. The traditional wireless control methods mainly comprise methods such as Bluetooth, WIFI and 2.4G, and the methods have the following problems when in use:
one is, because reasons such as the distance between the signal source and the smart machine, some places of signal propagation are strong and some places are weak, and weak places can not receive the signal.
Secondly, wireless control is convenient only by needing a short distance from a signal source, and the wireless control method has defects.
Third, there are some special places, such as the place with better shielding, which cannot propagate the wireless signal.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a signal control system based on carrier wave technique and radio signal technique to prior art's defect and not enough.
The utility model discloses a signal control system based on carrier wave technology and wireless signal technology, which comprises a shell, wherein a PCB circuit board is arranged in the shell, and a master control circuit is arranged on the PCB circuit board; the master control circuit comprises a master controller control circuit and a slave controller control circuit;
the main controller control circuit comprises a U1 chip, a U2 chip, a U3 chip, a U4 chip, a wireless receiving module and a power carrier main module;
the 1 st pin of the U1 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C3 and the capacitor C11 are connected in parallel to pins 2 and 3 of the U1 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the 1 st pin of the U2 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C10 in series, and the other end of the capacitor C10 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series, and the capacitors C4 and C9 are respectively connected in parallel to pins 2 and 3 of the U2 chip;
the positive end of a diode in the U3 chip is connected with a diode D5 in series, and the other end of the diode D5 is connected with the Port end; the negative electrode end of a diode of the U3 chip is connected in series with resistors R6, R5, R4, R3, R3 and R1, and the other end of the resistor R1 is connected with the L end; the C pole of a triode in the U3 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R8 in series, and a capacitor C5 is connected at two ends of the resistor R8 in parallel; the E pole of the triode Q1 is grounded, the C pole is connected with the resistor R9 in series, the other end of the resistor R9 is connected with a +3.3V power supply, the b pole is connected with the resistor R2 in series, and the other end of the resistor R2 is connected with the resistor R8 in parallel; pins 1-6 of the U3 chip are respectively connected with a ROW3 terminal, an RX terminal, a TX terminal, an NRST terminal, an RST terminal and a LINE5 terminal; the 7 th pin of the U3 chip is connected in parallel with a capacitor C7, and the other end of the capacitor C7 is connected with a +3.3V power supply; the 8 th pin of the U3 chip is connected in series with a capacitor C8, and the other end of the capacitor C8 is connected in parallel with a capacitor C7; the 10 th pin of the U3 chip is connected with the DATA IN terminal; the 11 th to 20 th pins of the U3 chip are respectively connected with a ZERO end, a PB4 end, a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a SWIM end, a ROW1 end and a ROW2 end; the 4 th pin of the U3 chip is connected with a resistor R10 in parallel, a resistor R10 is connected with a capacitor C6 in series, and the other end of the resistor R10 is connected with a +3.3.V power supply;
the 1 st to 9 th pins of the socket J2 are respectively connected with a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a LINE5 end, a SWIM end, a ROW1 end, a ROW2 end and a ROW3 end;
the b pole of the triode Q2 is connected with the PB4 end, the E pole of the triode Q2 is connected with the horn FM, the C pole of the triode Q2 is connected with the resistor R12 in series, and the resistor R680 is connected between the b pole and the C pole of the triode Q2 in parallel;
the 1 st pin of the socket J3 is connected with a +3.3V power supply, the 2 nd pin is grounded, the 3 rd pin is connected with a SWIM end, and the 4 th pin is connected with an NRST end;
the DATA output end of the wireless receiving module is connected with the DATA _ IN end, and the VDD end is connected with a +3.3V power supply;
the +12V interface of the power carrier main module is connected with a +12V power supply, and the +3.3V interface is connected with + 3.3V; the PLC _ IN end and the PLC _ OUT end of the power carrier main module are connected with a secondary coil of a transformer T, one end of a primary coil of the transformer T is connected with a capacitor CX1 IN series, the other end of the capacitor CX1 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of a diode D1 is connected with a fuse F1, the other end of the fuse F1 is connected with a live wire L, the cathode of a diode D2 is connected with the anode of a diode D4, the anode of a diode D4 is connected with a zero line N, the anode of a diode D3 is connected in parallel with the cathode of a diode D1, the cathode of a diode D3 is connected in parallel with the cathode of a diode D4, and capacitors C1 and C2 are connected in parallel between the anode of a diode D1 and the cathode of a diode D4;
the slave controller control circuit comprises a U5 chip, a U6 chip, a U7 chip and a U8 chip,
the 1 st pin of the U5 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C3 in series, and the other end of the capacitor C3 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series and the capacitor C4 is connected in parallel to pins 2 and 3 of the U2 chip respectively;
the 1 st pin of the U6 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C6 and the capacitor C7 are connected in parallel to pins 1 and 3 of the U6 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the positive end of a diode in the U7 chip is connected with a diode D8 in series, and the other end of the diode D8 is connected with the Port end; the negative electrode end of a diode of the U7 chip is connected in series with resistors R9, R8, R7, R6, R5 and R4, and the other end of the resistor R4 is connected with a live line L; the C pole of a triode in the U7 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R10 in series, and a capacitor C8 is connected at two ends of the resistor R10 in parallel; the E pole of the triode Q4 is grounded, the C pole is connected with the resistor R12 in series, the other end of the resistor R12 is connected with a +3.3V power supply, the b pole is connected with the resistor R11 in series, and the other end of the resistor R11 is connected with the resistor R10 in parallel;
the 2 nd pin and the 3 rd pin of the U8 chip are connected with an RXD interface and a TXD interface of a power carrier slave module, the 4 th pin of the U8 chip is connected with an NRST end, the 4 th pin of the U8 chip is connected with a capacitor C10 in parallel, the capacitor C10 is connected with a resistor R13 in series, and the other end of the resistor R13 is connected with a +3.3V power supply; the 8 th pin of the U8 chip is connected with a capacitor C8 in series, and the other end of the capacitor C8 is connected with the 7 th pin of the U8 chip in series; one end of a capacitor C11 is connected in parallel with the 9 th pin of the U8 chip, one end of a capacitor C11 is connected with a +3.3V power supply, and the other end of a capacitor C11 is grounded; the 11 th pin of the U8 chip is connected with a ZERO end, the 13 th pin is connected with a B end, and the 16 th pin-18 th pin is connected with an R end, a G end and a SWIM end;
the PLC _ IN end and the PLC _ OUT end of the power carrier slave module are connected with a secondary coil of a transformer T1, one end of a primary coil of the transformer T1 is connected with a capacitor C9 IN series, the other end of the capacitor C9 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of the diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of the diode D1 is connected with a fuse F2, the other end of the fuse F1 is connected with a live wire L, the cathode of the diode D2 is connected with the anode of the diode D4, the anode of the diode D4 is connected with a zero line N, the anode of the diode D3 is connected in parallel with the cathode of the diode D1, the cathode of the diode D3 is connected in parallel with the cathode of the diode D4, and the capacitor C1 is connected in parallel between the anode of the diode D1 and the cathode of the diode D4;
the 1 st pin of the socket J2 is connected with a +3.3V power supply, the 2 nd pin is grounded, and the 3 rd and 4 th pins are connected with a SWIM end and an NRST end;
further, the U1 chip and the U6 chip are voltage stabilizing chips with the model number of 78M 12.
Further, the U2 chip and the U5 chip are voltage stabilizer chips with the model number of LM 1117-ADJ.
Further, the U3 chip and the U7 chip are photocouplers of which the model is EL816 DS.
Further, the transistor Q1 and the transistor Q4 are NPN transistors of type 2N 2222B.
Further, the triode Q2 is an NPN-type medium power transistor of type SS 8050.
Further, the U4 chip is a main controller MCU of model STM8S103F 3.
Further, the U8 chip is a slave controller MCU of the model STM8S103F 3.
After the structure is adopted, the utility model discloses beneficial effect does: a signal control system based on carrier wave technique and radio signal technique, it utilizes the carrier wave signal loading on the power cord through converting radio signal to power line carrier signal, realizes the wire propagation, gives the receiving terminal through the power cord transmission to realize wireless control.
[ description of the drawings ]
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, do not constitute a limitation of the invention, and in which:
FIG. 1 is a topological schematic of the present invention;
fig. 2 is a circuit diagram of a U1 chip in the main controller control circuit of the present invention;
fig. 3 is a circuit diagram of a U2 chip in the main controller control circuit of the present invention;
fig. 4 is a circuit diagram of a U3 chip in the main controller control circuit of the present invention;
fig. 5 is a circuit diagram of a U4 chip in the main controller control circuit of the present invention;
fig. 6 is a circuit diagram of a J2 socket in the main controller control circuit of the present invention;
fig. 7 is a partial circuit diagram of the voice control in the main controller control circuit of the present invention;
fig. 8 is a circuit diagram of the power carrier main module in the main controller control circuit of the present invention;
fig. 9 is a circuit diagram of a J3 socket in the main controller control circuit of the present invention;
fig. 10 is a circuit diagram of a wireless receiving module in the control circuit of the main controller according to the present invention;
fig. 11 is a circuit diagram of light control in the control circuit of the main controller of the present invention;
fig. 12 is a circuit diagram of a U5 chip in a slave controller control circuit according to the present invention;
fig. 13 is a circuit diagram of a U6 chip in a slave controller control circuit according to the present invention;
fig. 14 is a circuit diagram of a U7 chip in a slave controller control circuit according to the present invention;
fig. 15 is a circuit diagram of a U8 chip in a slave controller control circuit according to the present invention;
fig. 16 is a circuit diagram of a power carrier master module in the slave controller control circuit according to the present invention;
fig. 17 is a circuit diagram of a J4 socket in the slave controller control circuit of the present invention;
fig. 18 is a circuit diagram of light control from the controller control circuit of the present invention.
[ detailed description ] embodiments
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
As shown in fig. 1, a signal control system based on a carrier technology and a wireless signal technology according to this embodiment includes a housing, a PCB is disposed in the housing, a main controller MCU is disposed on the PCB, one end of the main controller MCU is connected to one end of a main power carrier module through a wire, and a WIFI module is connected to the other end of the main controller MCU through a wireless signal; the main power carrier module is connected with one end of the slave power carrier module through a wire, the other end of the slave power carrier module is connected with one end of the slave controller MCU through a wire, and the other end of the slave controller MCU is connected with the lighting equipment through a wire.
Wherein: the remote controller 315 is connected to the main controller MCU via wireless signals. The master power carrier module and the slave power carrier module are power carrier modules of the type CON 15-2.
As shown in fig. 2-11, the device comprises a housing, a PCB circuit board is arranged in the housing, and a master control circuit is arranged on the PCB circuit board; the master control circuit comprises a master controller control circuit and a slave controller control circuit;
the main controller control circuit comprises a U1 chip, a U2 chip, a U3 chip, a U4 chip, a wireless receiving module and a power carrier main module;
the 1 st pin of the U1 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C3 and the capacitor C11 are connected in parallel to pins 2 and 3 of the U1 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the 1 st pin of the U2 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C10 in series, and the other end of the capacitor C10 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series, and the capacitors C4 and C9 are respectively connected in parallel to pins 2 and 3 of the U2 chip;
the positive end of a diode in the U3 chip is connected with a diode D5 in series, and the other end of the diode D5 is connected with the Port end; the negative electrode end of a diode of the U3 chip is connected in series with resistors R6, R5, R4, R3, R3 and R1, and the other end of the resistor R1 is connected with the L end; the C pole of a triode in the U3 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R8 in series, and a capacitor C5 is connected at two ends of the resistor R8 in parallel; the E pole of the triode Q1 is grounded, the C pole is connected with the resistor R9 in series, the other end of the resistor R9 is connected with a +3.3V power supply, the b pole is connected with the resistor R2 in series, and the other end of the resistor R2 is connected with the resistor R8 in parallel; pins 1-6 of the U3 chip are respectively connected with a ROW3 terminal, an RX terminal, a TX terminal, an NRST terminal, an RST terminal and a LINE5 terminal; the 7 th pin of the U3 chip is connected in parallel with a capacitor C7, and the other end of the capacitor C7 is connected with a +3.3V power supply; the 8 th pin of the U3 chip is connected in series with a capacitor C8, and the other end of the capacitor C8 is connected in parallel with a capacitor C7; the 10 th pin of the U3 chip is connected with the DATA IN terminal; the 11 th to 20 th pins of the U3 chip are respectively connected with a ZERO end, a PB4 end, a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a SWIM end, a ROW1 end and a ROW2 end; the 4 th pin of the U3 chip is connected with a resistor R10 in parallel, a resistor R10 is connected with a capacitor C6 in series, and the other end of the resistor R10 is connected with a +3.3.V power supply;
the 1 st to 9 th pins of the socket J2 are respectively connected with a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a LINE5 end, a SWIM end, a ROW1 end, a ROW2 end and a ROW3 end;
the b pole of the triode Q2 is connected with the PB4 end, the E pole of the triode Q2 is connected with the horn FM, the C pole of the triode Q2 is connected with the resistor R12 in series, and the resistor R680 is connected between the b pole and the C pole of the triode Q2 in parallel;
the 1 st pin of the socket J3 is connected with a +3.3V power supply, the 2 nd pin is grounded, the 3 rd pin is connected with a SWIM end, and the 4 th pin is connected with an NRST end;
the DATA output end of the wireless receiving module is connected with the DATA _ IN end, and the VDD end is connected with a +3.3V power supply;
the +12V interface of the power carrier main module is connected with a +12V power supply, and the +3.3V interface is connected with + 3.3V; the PLC _ IN end and the PLC _ OUT end of the power carrier main module are connected with a secondary coil of a transformer T, one end of a primary coil of the transformer T is connected with a capacitor CX1 IN series, the other end of the capacitor CX1 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of a diode D1 is connected with a fuse F1, the other end of the fuse F1 is connected with a live wire L, the cathode of a diode D2 is connected with the anode of a diode D4, the anode of a diode D4 is connected with a zero line N, the anode of a diode D3 is connected in parallel with the cathode of a diode D1, the cathode of a diode D3 is connected in parallel with the cathode of a diode D4, and capacitors C1 and C2 are connected in parallel between the anode of a diode D1 and the cathode of a diode D4;
as shown in fig. 13-18, the slave controller control circuit includes a U5 chip, a U6 chip, a U7 chip, a U8 chip, a power carrier slave module;
the 1 st pin of the U5 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C3 in series, and the other end of the capacitor C3 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series and the capacitor C4 is connected in parallel to pins 2 and 3 of the U2 chip respectively;
the 1 st pin of the U6 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C6 and the capacitor C7 are connected in parallel to pins 1 and 3 of the U6 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the positive end of a diode in the U7 chip is connected with a diode D8 in series, and the other end of the diode D8 is connected with the Port end; the negative electrode end of a diode of the U7 chip is connected in series with resistors R9, R8, R7, R6, R5 and R4, and the other end of the resistor R4 is connected with a live line L; the C pole of a triode in the U7 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R10 in series, and a capacitor C8 is connected at two ends of the resistor R10 in parallel; the E pole of the triode Q4 is grounded, the C pole is connected with the resistor R12 in series, the other end of the resistor R12 is connected with a +3.3V power supply, the b pole is connected with the resistor R11 in series, and the other end of the resistor R11 is connected with the resistor R10 in parallel;
the 2 nd pin and the 3 rd pin of the U8 chip are connected with an RXD interface and a TXD interface of a power carrier slave module, the 4 th pin of the U8 chip is connected with an NRST end, the 4 th pin of the U8 chip is connected with a capacitor C10 in parallel, the capacitor C10 is connected with a resistor R13 in series, and the other end of the resistor R13 is connected with a +3.3V power supply; the 8 th pin of the U8 chip is connected with a capacitor C8 in series, and the other end of the capacitor C8 is connected with the 7 th pin of the U8 chip in series; one end of a capacitor C11 is connected in parallel with the 9 th pin of the U8 chip, one end of a capacitor C11 is connected with a +3.3V power supply, and the other end of a capacitor C11 is grounded; the 11 th pin of the U8 chip is connected with a ZERO end, the 13 th pin is connected with a B end, and the 16 th pin-18 th pin is connected with an R end, a G end and a SWIM end;
the PLC _ IN end and the PLC _ OUT end of the power carrier slave module are connected with a secondary coil of a transformer T1, one end of a primary coil of the transformer T1 is connected with a capacitor C9 IN series, the other end of the capacitor C9 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of the diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of the diode D1 is connected with a fuse F2, the other end of the fuse F1 is connected with a live wire L, the cathode of the diode D2 is connected with the anode of the diode D4, the anode of the diode D4 is connected with a zero line N, the anode of the diode D3 is connected in parallel with the cathode of the diode D1, the cathode of the diode D3 is connected in parallel with the cathode of the diode D4, and the capacitor C1 is connected in parallel between the anode of the diode D1 and the cathode of the diode D4;
the 1 st pin of the socket J2 is connected with a +3.3V power supply, the 2 nd pin is connected with the ground, and the 3 rd and 4 th pins are connected with a SWIM terminal and an NRST terminal.
Wherein: the U1 chip and the U6 chip are voltage stabilizing chips with the model number of 78M 12.
Wherein: the U2 chip and the U5 chip are voltage stabilizer chips with the model number of LM 1117-ADJ.
Wherein: the U3 chip and the U7 chip are photocouplers with the model number of EL816 DS.
Wherein: the transistor Q1 and the transistor Q4 are NPN type transistors with the model number of 2N 2222B.
Wherein: the triode Q2 is an NPN type medium power tube with the model number of SS 8050.
Wherein: the U4 chip is the main control unit MCU of model STM8S103F 3.
Wherein: the U8 chip is a slave controller MCU of model STM8S103F3
In the design, a wireless signal is received by the wireless receiving module and then transmitted to the MCU IC to be converted into a signal which can be identified by the carrier module, the identified signal is converted into the signal by the carrier module, the signal information is loaded on a power line, and the signal is transmitted into the LED lamp through the power line.
In the design, a carrier slave controller is arranged in the LED lamp, and is used for identifying signals transmitted by a power line and transmitting the signals to the MCUIC, and the MCUIC converts the signals into electric signals so as to control the change of the LED lamp.
In this design, wireless transmitting terminal passes through radio signal, gives the host computer (main control unit MCU) with control signal transmission, and the host computer passes through technical processing, gives the power line carrier module, and the power line carrier module is with signal processing, with signal loading on L, N power cord, gives lighting apparatus on the transmission, and lighting apparatus rethread is received and is handled to control lighting apparatus.
In the design, a host (a master controller MCU) converts a wireless signal into a power carrier signal for transmission, and a slave (a slave controller MCU) converts the carrier signal into a control signal, so that signal control is realized.
A signal control system based on carrier wave technique and radio signal technique, it utilizes the carrier wave signal loading on the power cord through converting radio signal to power line carrier signal, realizes the wire propagation, gives the receiving terminal through the power cord transmission to realize wireless control.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (8)
1. A signal control system based on carrier wave technology and wireless signal technology is characterized in that: the intelligent control device comprises a shell, wherein a PCB circuit board is arranged in the shell, and a master control circuit is arranged on the PCB circuit board; the master control circuit comprises a master controller control circuit and a slave controller control circuit;
the main controller control circuit comprises a U1 chip, a U2 chip, a U3 chip, a U4 chip, a wireless receiving module and a power carrier main module; the 1 st pin of the U1 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C3 and the capacitor C11 are connected in parallel to pins 2 and 3 of the U1 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the 1 st pin of the U2 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C10 in series, and the other end of the capacitor C10 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series, and the capacitors C4 and C9 are respectively connected in parallel to pins 2 and 3 of the U2 chip;
the positive end of a diode in the U3 chip is connected with a diode D5 in series, and the other end of the diode D5 is connected with the Port end; the negative electrode end of a diode of the U3 chip is connected in series with resistors R6, R5, R4, R3, R3 and R1, and the other end of the resistor R1 is connected with the L end; the C pole of a triode in the U3 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R8 in series, and a capacitor C5 is connected at two ends of the resistor R8 in parallel; the E pole of the triode Q1 is grounded, the C pole is connected with the resistor R9 in series, the other end of the resistor R9 is connected with a +3.3V power supply, the b pole is connected with the resistor R2 in series, and the other end of the resistor R2 is connected with the resistor R8 in parallel; pins 1-6 of the U3 chip are respectively connected with a ROW3 terminal, an RX terminal, a TX terminal, an NRST terminal, an RST terminal and a LINE5 terminal; the 7 th pin of the U3 chip is connected in parallel with a capacitor C7, and the other end of the capacitor C7 is connected with a +3.3V power supply; the 8 th pin of the U3 chip is connected in series with a capacitor C8, and the other end of the capacitor C8 is connected in parallel with a capacitor C7; the 10 th pin of the U3 chip is connected with the DATA IN terminal; the 11 th to 20 th pins of the U3 chip are respectively connected with a ZERO end, a PB4 end, a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a SWIM end, a ROW1 end and a ROW2 end; the 4 th pin of the U3 chip is connected with a resistor R10 in parallel, a resistor R10 is connected with a capacitor C6 in series, and the other end of the resistor R10 is connected with a +3.3.V power supply;
the 1 st to 9 th pins of the socket J2 are respectively connected with a LINE0 end, a LINE1 end, a LINE2 end, a LINE3 end, a LINE4 end, a LINE5 end, a SWIM end, a ROW1 end, a ROW2 end and a ROW3 end; the b pole of the triode Q2 is connected with the PB4 end, the E pole of the triode Q2 is connected with the horn FM, the C pole of the triode Q2 is connected with the resistor R12 in series, and the resistor R680 is connected between the b pole and the C pole of the triode Q2 in parallel; the 1 st pin of the socket J3 is connected with a +3.3V power supply, the 2 nd pin is grounded, the 3 rd pin is connected with a SWIM end, and the 4 th pin is connected with an NRST end; the DATA output end of the wireless receiving module is connected with the DATA _ IN end, and the VDD end is connected with a +3.3V power supply;
the +12V interface of the power carrier main module is connected with a +12V power supply, and the +3.3V interface is connected with + 3.3V; the PLC _ IN end and the PLC _ OUT end of the power carrier main module are connected with a secondary coil of a transformer T, one end of a primary coil of the transformer T is connected with a capacitor CX1 IN series, the other end of the capacitor CX1 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of a diode D1 is connected with a fuse F1, the other end of the fuse F1 is connected with a live wire L, the cathode of a diode D2 is connected with the anode of a diode D4, the anode of a diode D4 is connected with a zero line N, the anode of a diode D3 is connected in parallel with the cathode of a diode D1, the cathode of a diode D3 is connected in parallel with the cathode of a diode D4, and capacitors C1 and C2 are connected in parallel between the anode of a diode D1 and the cathode of a diode D4;
the slave controller control circuit comprises a U5 chip, a U6 chip, a U7 chip, a U8 chip and a power carrier slave module; the 1 st pin of the U5 chip is connected with a +12V power supply, the 2 nd pin is connected with a capacitor C3 in series, and the other end of the capacitor C3 is grounded; the 3 rd pin of the U2 chip is connected with a +3.3V power supply; the resistors R14 and R13 are connected in series and the capacitor C4 is connected in parallel to pins 2 and 3 of the U2 chip respectively;
the 1 st pin of the U6 chip is connected with a VDD end, and the 2 nd pin is grounded; the capacitor C6 and the capacitor C7 are connected in parallel to pins 1 and 3 of the U6 chip, and the pin 3 of the U1 chip is connected with a +12V power supply;
the positive end of a diode in the U7 chip is connected with a diode D8 in series, and the other end of the diode D8 is connected with the Port end; the negative electrode end of a diode of the U7 chip is connected in series with resistors R9, R8, R7, R6, R5 and R4, and the other end of the resistor R4 is connected with a live line L; the C pole of a triode in the U7 chip is connected with a +3.3V power supply, the E pole is connected with a resistor R10 in series, and a capacitor C8 is connected at two ends of the resistor R10 in parallel; the E pole of the triode Q4 is grounded, the C pole is connected with the resistor R12 in series, the other end of the resistor R12 is connected with a +3.3V power supply, the b pole is connected with the resistor R11 in series, and the other end of the resistor R11 is connected with the resistor R10 in parallel;
the 2 nd pin and the 3 rd pin of the U8 chip are connected with an RXD interface and a TXD interface of a power carrier slave module, the 4 th pin of the U8 chip is connected with an NRST end, the 4 th pin of the U8 chip is connected with a capacitor C10 in parallel, the capacitor C10 is connected with a resistor R13 in series, and the other end of the resistor R13 is connected with a +3.3V power supply; the 8 th pin of the U8 chip is connected with a capacitor C8 in series, and the other end of the capacitor C8 is connected with the 7 th pin of the U8 chip in series; one end of a capacitor C11 is connected in parallel with the 9 th pin of the U8 chip, one end of a capacitor C11 is connected with a +3.3V power supply, and the other end of a capacitor C11 is grounded; the 11 th pin of the U8 chip is connected with a ZERO end, the 13 th pin is connected with a B end, and the 16 th pin-18 th pin is connected with an R end, a G end and a SWIM end;
the PLC _ IN end and the PLC _ OUT end of the power carrier slave module are connected with a secondary coil of a transformer T1, one end of a primary coil of the transformer T1 is connected with a capacitor C9 IN series, the other end of the capacitor C9 is connected with a live wire L, and the other end of the primary coil is connected with a zero line N;
the anodes of the diodes D1 and D2 are connected in parallel and then connected with VDD, the cathode of the diode D1 is connected with a fuse F2, the other end of the fuse F1 is connected with a live wire L, the cathode of the diode D2 is connected with the anode of the diode D4, the anode of the diode D4 is connected with a zero line N, the anode of the diode D3 is connected in parallel with the cathode of the diode D1, the cathode of the diode D3 is connected in parallel with the cathode of the diode D4, and the capacitor C1 is connected in parallel between the anode of the diode D1 and the cathode of the diode D4; the 1 st pin of the socket J2 is connected with a +3.3V power supply, the 2 nd pin is connected with the ground, and the 3 rd and 4 th pins are connected with a SWIM terminal and an NRST terminal.
2. The signal control system according to claim 1, wherein the U1 chip and the U6 chip are voltage regulator chips with model number 78M 12.
3. The signal control system according to claim 1, wherein the U2 chip and the U5 chip are voltage regulator chips with model number LM 1117-ADJ.
4. The signal control system according to claim 1, wherein the U3 chip and the U7 chip are opto-couplers of type EL816 DS.
5. The system of claim 1, wherein the transistors Q1 and Q4 are NPN transistors of type 2N 2222B.
6. The system according to claim 1, wherein the transistor Q2 is an NPN-type medium power transistor of type SS 8050.
7. The signal control system based on carrier wave technology and wireless signal technology as claimed in claim 1, characterized in that the U4 chip is a main controller MCU of model STM8S103F 3.
8. A signal control system based on carrier wave technology and wireless signal technology as claimed in claim 1, characterized in that the U8 chip is a slave controller MCU of model STM8S103F 3.
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