CN212380943U - Power source chronograph and electronic equipment - Google Patents
Power source chronograph and electronic equipment Download PDFInfo
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- CN212380943U CN212380943U CN202021047429.3U CN202021047429U CN212380943U CN 212380943 U CN212380943 U CN 212380943U CN 202021047429 U CN202021047429 U CN 202021047429U CN 212380943 U CN212380943 U CN 212380943U
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Abstract
The utility model discloses a power chronogenesis ware and electronic equipment, wherein this power chronogenesis ware includes voltage protection circuit, voltage conversion circuit, surge suppression circuit and power source. When the voltage of the input initial power supply is greater than a preset voltage threshold value, the voltage conversion circuit stops inputting the initial power supply to the voltage conversion circuit; the voltage conversion circuit converts the voltage of the initial power supply and outputs a target power supply; the surge suppression circuit suppresses surge current, and the power interface is docked with an external device to output the target power to the external device. The utility model discloses technical scheme can guarantee the reliable work of power chronogenesis ware when surge current or the excessive pressure condition appear to the reliability of power chronogenesis ware has been improved.
Description
Technical Field
The utility model relates to a power technical field especially relates to a power chronogenesis ware and electronic equipment.
Background
In most occasions, such as conference rooms of units, background music systems, karaoke business places, middle and low-grade disco, personal home entertainment systems, fixed installations of small and medium-sized venues, sound systems of slow-rocking bars and the like, professional sound operators are rarely operated, and some sound systems, such as stage cars, mobile performance sound systems and school public broadcasting systems, are also used and managed by concurrent staff, so that the normative performance of the operation is not strong, the opening and closing of equipment in a sound amplification system do not follow sequential operation, surge current is easily caused, and a power supply timer in the equipment is damaged.
The above is only for the purpose of assisting understanding of the technical solutions of the present invention, and does not represent an admission that the above is the prior art.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a power sequencer and an electronic apparatus, which solve the technical problem of the prior non-standard operation that the power sequencer is easily damaged.
To achieve the above object, the present invention provides a power sequencer, which includes a voltage protection circuit, a voltage conversion circuit, a surge suppression circuit and a power interface; the input end of the voltage protection circuit receives a power supply, the output end of the voltage protection circuit is connected with the input end of the surge suppression circuit through the voltage conversion circuit, the output end of the surge suppression circuit is connected with the input end of the power interface, and the output end of the power interface outputs a target power supply; wherein
The voltage conversion circuit is used for stopping inputting the initial power supply to the voltage conversion circuit when the voltage of the input initial power supply is greater than a preset voltage threshold;
the voltage conversion circuit is used for converting the voltage of the initial power supply and outputting a target power supply;
the surge suppression circuit is used for suppressing surge current;
the power interface is used for being in butt joint with external equipment so as to output the target power to the external equipment.
Preferably, the power supply timer further comprises a power supply input circuit, and the power supply input circuit is used for filtering the input mains supply and outputting the filtered mains supply to the voltage protection circuit.
Preferably, the power supply sequencer further comprises a current protection circuit, an input end of the current protection circuit is connected with an input end of the voltage protection circuit, and an output end of the current protection circuit is connected with an output end of the voltage protection circuit; the current protection circuit is used for stopping inputting the initial power supply to the voltage conversion circuit when the current of the input initial power supply is larger than a preset current threshold value.
Preferably, the power supply sequencer further includes a power supply output circuit, an input end of the power supply output circuit is connected with an output end of the surge suppression circuit, and an output end of the power supply output circuit is connected with an input end of the power supply interface; and the power supply output circuit is used for filtering the target power supply output by the surge suppression circuit.
Preferably, the current protection circuit is implemented using a fuse.
Preferably, the power interface is a multi-channel power output channel.
Preferably, the surge suppression circuit includes a surge current detection circuit and a bypass circuit; wherein
The surge current detection circuit is used for outputting a trigger signal when the surge current is detected;
the bypass circuit is used for bypassing the target power supply when a trigger signal is received so as to suppress surge current.
Preferably, the detection circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a first IGBT tube and a first diode; wherein.
The first end of the first capacitor is connected with the voltage conversion circuit, and the second end of the first capacitor is grounded; the collector of the first IGBT tube is connected with the voltage conversion circuit, the emitter of the IGBT tube is connected with the first end of the first resistor, and the second end of the first resistor is grounded; the grid electrode of the IGBT tube is connected with the anode of the first diode, the cathode of the first diode is connected with the first end of the second resistor, and the second end of the second resistor is grounded; the first end of the second capacitor is connected with the collector of the first IGBT tube, and the second end of the second capacitor is connected with the emitter of the first IGBT tube.
Preferably, the bypass circuit includes a third resistor and a first thyristor; the first end of the third resistor is connected with the collector of the first IGBT tube, and the second end of the third resistor is grounded; the anode of the first thyristor is grounded, the cathode of the first thyristor is connected with the first end of the third resistor, and the control electrode of the first thyristor is connected with the first end of the first resistor.
To achieve the above object, the present invention also provides an electronic device, which includes the power sequencer as described above.
The utility model provides a power chronograph, this power chronograph include voltage protection circuit, voltage conversion circuit, surge suppression circuit and power source. When the voltage of the input initial power supply is greater than a preset voltage threshold value, the voltage conversion circuit stops inputting the initial power supply to the voltage conversion circuit; the voltage conversion circuit converts the voltage of the initial power supply and outputs a target power supply, wherein the target power supply can comprise multiple output voltages to match with multiple loads; the surge suppression circuit suppresses surge current, and the power interface is docked with an external device to output the target power to the external device. The utility model discloses technical scheme can guarantee the reliable work of power chronogenesis ware when surge current or the excessive pressure condition appear to the reliability of power chronogenesis ware has been improved.
Drawings
Fig. 1 is a schematic block diagram of an embodiment of a power sequencer according to the present invention;
FIG. 2 is a block diagram of another embodiment of the power sequencer of the present invention;
fig. 3 is a circuit diagram of the power source sequencer according to an embodiment of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 10 | |
60 | Power |
| 20 | |
70 | |
| 30 | Voltage conversion circuit | R1～R3 | First to |
| 40 | Current protection circuit | C1～C2 | First to |
| 50 | Surge suppression circuit | D1 | |
| 51 | Surge current detection circuit | Q1 | |
| 52 | Bypass circuit | SCR1 | First thyristor |
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as upper, lower, left, right, front and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, it should be considered that the combination of the technical solutions does not exist, and is not within the protection scope of the present invention. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
The utility model provides a power chronogenesis ware.
Referring to fig. 1, the present invention provides a power sequencer. The power supply timer comprises a voltage protection circuit 20, a voltage conversion circuit 30, a surge suppression circuit 50 and a power supply interface 70; the input end of the voltage protection circuit 20 receives a power supply, the output end of the voltage protection circuit 20 is connected with the input end of the surge suppression circuit 50 through the voltage conversion circuit 30, the output end of the surge suppression circuit 50 is connected with the input end of the power interface 70, and the output end of the power interface 70 outputs a target power supply.
The voltage protection circuit 20 is configured to stop inputting the initial power to the voltage conversion circuit 30 when the voltage of the input initial power is greater than a preset voltage threshold. It is easy to understand that the voltage protection circuit 20 can limit the voltage of the initial power source to a safe voltage, which is used as the preset voltage threshold in this embodiment.
The voltage conversion circuit 30 is configured to convert the voltage of the initial power supply and output a target power supply. It should be noted that the voltage converting circuit 30 includes a transformer and a controller, the transformer converts the voltage of the input initial power source under the driving of the controller, and the voltage converting circuit 30 can be implemented by using a conventional voltage converting circuit 30.
The surge suppression circuit 50 is used for suppressing surge current. The surge protector has the function that when spike current or voltage is suddenly generated in an electric loop or a communication line due to external interference, the surge protector can conduct and shunt in a very short time, so that damage of surge to other equipment in the loop is avoided. The circuit can be disconnected in time when the current suddenly exceeds a rated value, and the circuit is protected.
The power interface 70 is configured to interface with an external device to output the target power to the external device. In this embodiment, the power interface 70 includes a plurality of power output channels to meet the power requirements of a plurality of loads.
The utility model provides a power chronograph, this power chronograph includes voltage protection circuit 20, voltage conversion circuit 30, surge suppression circuit 50 and power source 70. When the voltage of the input initial power supply is greater than the preset voltage threshold, the voltage conversion circuit 30 stops inputting the initial power supply to the voltage conversion circuit 30; the voltage converting circuit 30 converts the voltage of the initial power supply to output a target power supply, and it is understood that the target power supply may include multiple output voltages to match multiple loads; the surge suppression circuit 50 suppresses the surge current, and the power interface 70 interfaces with an external device to output the target power to the external device. The utility model discloses technical scheme can guarantee the reliable work of power chronogenesis ware when surge current or the excessive pressure condition appear to the reliability of power chronogenesis ware has been improved.
Referring to fig. 2, further, the power supply timer further includes a power supply input circuit 10, where the power supply input circuit 10 is configured to filter the input mains supply and output the filtered mains supply to the voltage protection circuit 20. Through power input circuit 10, effectively filter the ripple in the commercial power to promote the stability of voltage.
Further, the power supply timer further comprises a current protection circuit 40, an input end of the current protection circuit 40 is connected with an input end of the voltage protection circuit 20, and an output end of the current protection circuit 40 is connected with an output end of the voltage protection circuit 20; the current protection circuit 40 is configured to stop inputting the initial power to the voltage conversion circuit 30 when the current of the input initial power is greater than a preset current threshold. It is readily understood that the current protection circuit 40 is capable of limiting the current in the electrical circuit to a safe current to prevent damage to the electronics in the electrical circuit from high currents.
Further, the power supply timer further includes a power supply output circuit 60, an input end of the power supply output circuit 60 is connected with an output end of the surge suppression circuit 50, and an output end of the power supply output circuit 60 is connected with an input end of the power supply interface 70; the power output circuit 60 is configured to filter the target power output by the surge suppression circuit 50.
Similar to the power input circuit 10, the power output circuit 60 functions to filter the ripple in the target power supply, thereby improving the stability of the target power supply.
Further, the current protection circuit 40 is implemented by a fuse. The fuse has simple structure and stable and reliable performance.
Further, the power interface 70 is a multi-channel power output channel. In this embodiment, the power interface 70 includes 8 power output channels.
Referring to fig. 3, the surge suppressing circuit 50 includes a surge current detecting circuit 51 and a bypass circuit 52; wherein
The inrush current detection circuit 51 is configured to output a trigger signal when an inrush current is detected. It should be noted that the inrush current detection circuit 51 serves as a trigger for sending a high signal when an inrush current occurs in the electrical circuit.
The bypass circuit 52 is configured to bypass the target power supply when receiving the trigger signal, so as to suppress the inrush current. In this embodiment, when the trigger signal is at a high level, the bypass circuit 52 is activated to bleed off and dissipate the inrush current.
Specifically, the surge current detection circuit 51 includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a first IGBT Q1, and a first diode D1; wherein.
A first end of the first capacitor C1 is connected to the voltage conversion circuit 30, and a second end of the first capacitor C1 is grounded; a collector of the first IGBT is connected to the voltage conversion circuit 30, an emitter of the IGBT is connected to a first end of the first resistor R1, and a second end of the first resistor R1 is grounded; the gate of the IGBT tube is connected with the anode of the first diode D1, the cathode of the first diode D1 is connected with the first end of the second resistor R2, and the second end of the second resistor R2 is grounded; a first end of the second capacitor C2 is connected to the collector of the first IGBT Q1, and a second end of the second capacitor C2 is connected to the emitter of the first IGBT Q1.
Specifically, the bypass circuit 52 includes a third resistor R3 and a first thyristor SCR 1; a first end of the third resistor R3 is connected to the collector of the first IGBT Q1, and a second end of the third resistor R3 is grounded; the anode of the first thyristor SCR1 is grounded, the cathode of the first thyristor SCR1 is connected to the first end of the third resistor R3, and the gate of the first thyristor SCR1 is connected to the first end of the first resistor R1.
It should be noted that, at the moment the power supply timer is started, a large inrush current is generated, and at this moment, the voltage drop across the third resistor R3 is large. The first diode D1 is broken down, the gate of the first IGBT Q1 reaches the on condition, the first IGBT Q1 is turned on, the control electrode of the first thyristor SCR1 is shorted, the first thyristor SCR1 is turned off, and all the current in the loop passes through the third resistor R3. The third resistor R3 is a current limiting resistor.
To achieve the above object, the present invention also provides an electronic device, which includes the power sequencer as described above.
It should be understood that the above is only an example, and the technical solution of the present invention is not limited in any way, and in the specific application, those skilled in the art can set the solution as required, and the present invention is not limited thereto.
It should be noted that the above-described work flow is only illustrative, and does not limit the scope of the present invention, and in practical applications, a person skilled in the art may select some or all of them to achieve the purpose of the solution of the embodiment according to practical needs, and the present invention is not limited herein.
Further, it is to be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above embodiment numbers of the present invention are only for description, and do not represent the advantages and disadvantages of the embodiments.
The above is only the preferred embodiment of the present invention, and not the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or the direct or indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. A power supply chronograph device is characterized by comprising a voltage protection circuit, a voltage conversion circuit, a surge suppression circuit and a power supply interface; the input end of the voltage protection circuit receives a power supply, the output end of the voltage protection circuit is connected with the input end of the surge suppression circuit through the voltage conversion circuit, the output end of the surge suppression circuit is connected with the input end of the power interface, and the output end of the power interface outputs a target power supply; wherein
The voltage conversion circuit is used for stopping inputting the initial power supply to the voltage conversion circuit when the voltage of the input initial power supply is greater than a preset voltage threshold;
the voltage conversion circuit is used for converting the voltage of the initial power supply and outputting a target power supply;
the surge suppression circuit is used for suppressing surge current;
the power interface is used for being in butt joint with external equipment so as to output the target power to the external equipment.
2. The power sequencer of claim 1, further comprising a power input circuit for filtering the incoming mains power and outputting the filtered mains power to the voltage protection circuit.
3. The power sequencer of claim 1 further comprising a current protection circuit, an input of said current protection circuit being coupled to an input of said voltage protection circuit, an output of said current protection circuit being coupled to an output of said voltage protection circuit; the current protection circuit is used for stopping inputting the initial power supply to the voltage conversion circuit when the current of the input initial power supply is larger than a preset current threshold value.
4. The power sequencer of any one of claims 1 through 3, further comprising a power output circuit, an input of said power output circuit being connected to an output of said surge suppression circuit, an output of said power output circuit being connected to an input of said power interface; and the power supply output circuit is used for filtering the target power supply output by the surge suppression circuit.
5. The power sequencer of any one of claims 1 through 3, wherein the current protection circuit is implemented using a fuse.
6. The power sequencer of claim 1 wherein said power interface is a multiplexed power output channel.
7. The power sequencer of claim 1, wherein said surge suppression circuit comprises an inrush current detection circuit and a bypass circuit; wherein
The surge current detection circuit is used for outputting a trigger signal when the surge current is detected;
the bypass circuit is used for bypassing the target power supply when a trigger signal is received so as to suppress surge current.
8. The power sequencer according to claim 7, wherein said detection circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a first IGBT element, and a first diode; the first end of the first capacitor is connected with the voltage conversion circuit, and the second end of the first capacitor is grounded; the collector of the first IGBT tube is connected with the voltage conversion circuit, the emitter of the IGBT tube is connected with the first end of the first resistor, and the second end of the first resistor is grounded; the grid electrode of the IGBT tube is connected with the anode of the first diode, the cathode of the first diode is connected with the first end of the second resistor, and the second end of the second resistor is grounded; the first end of the second capacitor is connected with the collector of the first IGBT tube, and the second end of the second capacitor is connected with the emitter of the first IGBT tube.
9. The power sequencer of claim 8 wherein said bypass circuit comprises a third resistor and a first thyristor; the first end of the third resistor is connected with the collector of the first IGBT tube, and the second end of the third resistor is grounded; the anode of the first thyristor is grounded, the cathode of the first thyristor is connected with the first end of the third resistor, and the control electrode of the first thyristor is connected with the first end of the first resistor.
10. An electronic device, characterized in that it comprises a power sequencer according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021047429.3U CN212380943U (en) | 2020-06-09 | 2020-06-09 | Power source chronograph and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021047429.3U CN212380943U (en) | 2020-06-09 | 2020-06-09 | Power source chronograph and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212380943U true CN212380943U (en) | 2021-01-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021047429.3U Active CN212380943U (en) | 2020-06-09 | 2020-06-09 | Power source chronograph and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212380943U (en) |
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- 2020-06-09 CN CN202021047429.3U patent/CN212380943U/en active Active
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