CN212367442U - Four-way H.265 codec - Google Patents

Four-way H.265 codec Download PDF

Info

Publication number
CN212367442U
CN212367442U CN202021016946.4U CN202021016946U CN212367442U CN 212367442 U CN212367442 U CN 212367442U CN 202021016946 U CN202021016946 U CN 202021016946U CN 212367442 U CN212367442 U CN 212367442U
Authority
CN
China
Prior art keywords
module
interface
coding
audio
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202021016946.4U
Other languages
Chinese (zh)
Inventor
闫志宏
唐庆光
王威
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Jeki Technology Development Co ltd
Original Assignee
Guangdong Jeki Technology Development Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Jeki Technology Development Co ltd filed Critical Guangdong Jeki Technology Development Co ltd
Priority to CN202021016946.4U priority Critical patent/CN212367442U/en
Application granted granted Critical
Publication of CN212367442U publication Critical patent/CN212367442U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The utility model discloses a four ways H.265 codec, include: the system comprises a main control panel, wherein an H.265 coding and decoding module, a storage module, an audio and video input module, an audio and video output module, a power supply module, a peripheral interface module, a network interface module and a serial interface module are arranged on the main control panel; the output ends of the audio and video input module and the serial interface module are connected with an H.265 coding and decoding module, the H.265 coding and decoding module is connected with a storage module, the output end of the H.265 coding and decoding module is connected with an audio and video output module, a peripheral interface module and a network interface module, and the output end of the H.265 coding and decoding module is connected with a DSP + FPGA processing module through the network interface module; the power supply module is connected with the H.265 coding and decoding module, the audio and video input module and the audio and video output module. The utility model discloses support multiple video interface, support the transmission mode of multiple network communication agreement, multiple code stream. The coding mode is flexible, and the network routing function is strong; and the video compression ratio is improved on the premise of ensuring the video quality.

Description

Four-way H.265 codec
Technical Field
The utility model relates to a video encoder technical field, concretely relates to four ways H.265 codec.
Background
In recent years, with the proposal of a 5G network and the overall upgrade and coverage of a 4G network, a network video live broadcast platform based on a mobile intelligent terminal is rapidly started because high-quality images, videos and the like can be transmitted at a higher speed. With the trend of VR technology, the requirements of people on video quality and the visual experience of users are higher and higher. And the traditional video is comprehensively upgraded from standard definition video to high-definition ultrahigh-definition video such as 720P, 1080P, 4K, 8K and the like.
With the increase of encoded video data streams, the use of the existing bandwidth poses a major challenge for the storage and transmission of compressed video streams, if the current h.264/AVC (hereinafter referred to as h.264) video compression coding standard is still adopted.
To deal with this problem, bandwidth can be upgraded or the efficiency of video compression coding can be improved. Because the existing network bandwidth is fixed and cannot be easily upgraded, and the cost for improving the bandwidth is high. The better method is to increase the compression ratio of the video, but if only the compression ratio is simply increased without the improvement of the encoding technology, the quality of the encoded video cannot be guaranteed.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that to the not enough among the above-mentioned prior art, provide a four-way H.265 codec.
The utility model provides a technical scheme that its technical problem adopted is:
a four-way h.265 codec comprising: the system comprises a main control panel, wherein the main control panel is provided with an H.265 coding and decoding module, a storage module, an audio and video input module, an audio and video output module, a power supply module, a peripheral interface module, a network interface module and a serial interface module; the output ends of the audio and video input module and the serial interface module are connected with an H.265 coding and decoding module, the H.265 coding and decoding module is connected with a storage module, the output end of the H.265 coding and decoding module is connected with an audio and video output module, a peripheral interface module and a network interface module, and the output end of the H.265 coding and decoding module is connected with a DSP + FPGA processing module through the network interface module; and the power supply module is connected with the H.265 coding and decoding module, the audio and video input module and the audio and video output module.
As a further technical solution of the utility model is: the memory module adopts an SPI NAND flash structure, wherein the memory chip is a K4B4G1646E-BCNB model memory chip of high-bandwidth DDR 3L.
As a further technical solution of the utility model is: the H.265 coding and decoding module is a Hi3531D coding and decoding chip.
As a further technical solution of the utility model is: the network interface module adopts a network interface chip with RTL8211E model.
As a further technical solution of the utility model is: the serial port interface module comprises an RS232 interface and an RS-485 serial port, wherein the RS232 serial port adopts a chip with an SP3232EEN model, and the RS485 serial port module adopts a chip with an MX3078EISA model.
As a further technical solution of the utility model is: the peripheral interface module includes: HDMI, DVI, SDI, CVBS output interface, IO control interface, hard disk mount interface and USB interface.
Further, the HDMI output module includes an HDMI control chip and an HDMI interface, the HDMI interface is connected to the HDMI control chip, and the HDMI control chip is an ESD5344D chip.
Further, the SDI interface is a GS2972 chip.
Further, the audio and video output module adopts a PCM5100A chip.
The utility model has the advantages that:
the utility model discloses support multiple video interface, support the transmission mode of multiple network communication agreement, multiple code stream. The coding mode is flexible, and the network routing function is strong; on the premise of ensuring video quality, the video compression ratio is improved, and the acquisition, encoding, decoding, multi-path synthesis and distribution of video and audio, sip and other protocol adaptation, multi-network adaptation and multi-service processing are realized.
Drawings
Fig. 1 is a structural diagram of a four-way h.265 codec according to the present invention;
fig. 2 is a structural diagram of a four-way h.265 codec main control board according to the present invention;
fig. 3 is a circuit diagram of an h.265 codec module system provided by the present invention;
fig. 4a is a circuit diagram of a memory module according to the present invention;
fig. 4b is a circuit diagram of a memory module according to the present invention;
FIG. 5a is a schematic diagram of an HMDI circuit according to the present invention;
fig. 5b is a structural diagram of an HMDI interface according to the present invention;
fig. 6 is the circuit diagram of the audio/video output module provided by the utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
H.265 is a new video coding standard established after h.264 by ITU-T VCEG, a considerable improvement over the previous h.264 standard. The new technology uses advanced technology to improve the relationship among code stream, coding quality, time delay and algorithm complexity, and achieves optimal setting, thereby improving compression efficiency, robustness and error recovery capability, reducing real-time delay, reducing channel acquisition time and random access time delay, reducing complexity and the like.
Referring to fig. 1 and fig. 2, wherein fig. 1 is a structural diagram of a four-way h.265 codec proposed by the present invention; fig. 2 is a structural diagram of a four-way h.265 codec main control board according to the present invention;
as shown in fig. 1 and fig. 2, the four-way h.265 codec provided by the present invention includes: the device comprises a main control panel 1, wherein an H.265 coding and decoding module 2, a storage module, an audio and video input module 3, an audio and video output module 4, a power supply module, a peripheral interface module 5, a network interface module 6 and a serial interface module 7 are arranged on the main control panel 1; the output ends of the audio and video input module and the serial interface module are connected with an H.265 coding and decoding module, the H.265 coding and decoding module is connected with a storage module, the output end of the H.265 coding and decoding module is connected with an audio and video output module, a peripheral interface module and a network interface module, and the output end of the H.265 coding and decoding module is connected with a DSP + FPGA processing module through the network interface module; and the power supply module is connected with the H.265 coding and decoding module, the audio and video input module and the audio and video output module.
The four-path H.265 coder-decoder is designed based on a DSP + FPGA framework video processing system of H.265 coding. The system is composed of a high-performance DSP processing system, a high-performance FPGA, a high-bandwidth DDR3L, an SRIO interface, a PCIe high-speed serial bus and the like, and forms an H.265 video coding, transmission and storage video processing system. The serial interface module is connected with the H.265 coding module through a PCIe high-speed serial bus; the power supply module adopts an MP1495S conversion chip to convert direct current 12V into 3.3V, 1.5V, 1.8V and 5V to be supplied to an H.265 codec for use.
Referring to fig. 3 to fig. 6, wherein fig. 3 is a circuit diagram of an h.265 codec module system according to the present invention; fig. 4a is a circuit diagram of a memory module according to the present invention; FIG. 4b is a circuit diagram of a memory module according to the present invention; FIG. 5a is a schematic diagram of an HMDI circuit according to the present invention; fig. 5b is a structural diagram of an HMDI interface according to the present invention; fig. 6 is the circuit diagram of the audio/video output module provided by the utility model.
The embodiment of the utility model provides an in, memory module adopts SPI NAND flash structure, and wherein memory chip is the memory chip of K4B4G1646E-BCNB model of high bandwidth DDR 3L. By adopting the scheme of SPI NAND flash, a controller with a traditional NAND can be omitted in the H265 codec, and only an SPI interface is needed, so that the cost of master control is reduced. In addition, the packaging form of the SPI NAND flash adopts WSON packaging, the size of the SPI NAND flash is much smaller than that of the traditional NAND flash TSOP packaging, the space of a PCB is fully saved, the size and the number of layers of the PCB can be reduced, the cost is reduced, and the size is saved.
The peripheral interface module includes: HDMI, DVI, SDI, CVBS output interface, IO control interface, hard disk mount interface and USB interface. The HDMI output module comprises an HDMI control chip and an HDMI interface, the HDMI interface is connected with the HDMI control chip, and the HDMI control chip is an ESD5344D chip. The SDI interface is a GS2972 chip. An SDI output module, wherein the BT1120 signal is converted into an SDI signal to be output,
the embodiment of the utility model provides an in, audio and video output module adopts PCM5100A chip. The audio and video output module can adopt an SDI output module, and SDI signals are converted into BT1120 signals through the SDI output module to enter the host; the SDI output module converts the BT1120 signal inside the host into an SDI signal to be output; the 1-way SDI signal is divided into 4 ways SDI to be output.
Similarly, VGA, HDMI and CVBS input modules are used for converting signals of VGA, HDMI and CVBS at the periphery into BT1120 signals and inputting the signals into the host.
The H.265 codec module adopts a Haisi Hi3531D chip, the Haisi Hi3531D chip integrates a power interface, a static storage unit, a reset unit and a control system are arranged in the Hi3531D chip, and the audio and video information of the audio and video input module is transmitted to the H265 codec module; the peripheral interface module includes: HDMI, DVI, SDI, CVBS output interface, RJ45 network port input interface, IO control interface, hard disk mounting interface and USB interface; the audio/video input module comprises one or more of HDMI, DVI, SDI and CVBS interfaces; the input end of the audio and video output module is connected with the output end of the H265 coding and decoding module, and the output end of the audio and video output module is connected with the peripheral interface module.
The network interface module adopts a network port chip with RTL8211E model, the serial port module comprises an RS232 interface and an RS-485 serial port, the RS232 serial port adopts a chip with SP3232EEN model, and the RS485 serial port module adopts a chip with MX3078EISA model.
The utility model provides a four-way H.265 codec supports 8-way video input, can input through arbitrary interface (DVI/SDI/CVBS); 2 paths of USB2.0 are supported, and the USB interface can be used for IPC input and other functions; 4 paths of independent high-definition output are supported, output can be realized through any interface (HDMI, DVI, VGA and SDI), and 1 CVBS standard definition output is realized; 2 paths of MIC input are supported, an echo cancellation function is supported, and 2 paths of audio output are supported; the 2-path 1000/100/10Mbps self-adaptive Ethernet full duplex interface is supported; and the functions of video splicing, superposition, OSD, scaling, transcoding, multi-code stream distribution and the like are supported.
The utility model provides a four ways H.265 codec is based on the multipurpose codec equipment of embedded hardware platform development, based on latest platforms such as haisi, adopts Linux operating system, and the operation is reliable and stable. The video streaming media server supports various video interfaces, various network communication protocols and various code stream transmission modes. The coding mode is flexible, and the network routing function is strong. The method realizes the collection, coding, decoding, multi-path synthesis and distribution of video and audio, protocol adaptation such as sip, multi-network adaptation, multi-service processing and the like. The product is a series of products, comprises a plurality of products and can be customized according to the needs of users; the equipment supports high-definition audio and video signal acquisition, H.265 coding and decoding and high-definition video transmission. The method can support real-time encoding and decoding of 1080P30fps by H.265. And the functions of video splicing and overlaying, OSD, scaling, transcoding, multi-code stream distribution, audio echo cancellation and the like are supported. The method is suitable for transmission of videos among nodes, coding, decoding, conversion, control, transmission and the like of videos of a multimedia conference or a control center, and can be widely applied to the fields of military, public security, army, telecommunication, finance, traffic, electric power, education, water conservancy and the like.
The utility model discloses an integrated circuit chip builds audio frequency and video collection, network transmission system, and the concrete performance is: and the analog signal of the camera is converted into a digital signal by an AD conversion chip and enters an arm system for processing. The analog audio signal is converted into a digital signal through the AD conversion chip, and the digital signal enters an arm system for processing. Video data is compressed into H264 coding data stream after being subjected to operations such as screen combination, amplification, reduction and the like through an arm chip, and the H264 coding data stream is sent to an opposite terminal system through a network. After audio data is subjected to operations such as sound mixing, noise reduction, echo cancellation and the like through an arm chip, the audio data is compressed into G711U or G711A coded data and then is sent to a peer-to-peer system through a network. And G711 decoding and H264 decoding are carried out on the network audio and video data sent by the opposite terminal system through the network chip. And after sound mixing and silencing treatment, the decoded audio and video data are output to a local DA conversion chip for analog output. And after being processed, the video data are output to a local DA conversion chip for HDMI output, SDI output and VGA output.
The utility model provides a four ways H.265 codec is favorable to high-efficient video compression coding standard's popularization and application, passes through high definition monitored control system stage with the present general clear monitored control system product, can show reduction storage cost through its higher compression ratio. The method is beneficial to promoting the rapid development of company products in the fields of 4K and 8K ultra-high definition movies, television programs, ultra-high definition televisions, displays and the like. The method is favorable for further promoting the development of a network video live broadcast platform based on the mobile intelligent terminal, and ensures that the ultrahigh-definition video is smoothly popularized under the 4G condition.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the gist of the present invention within the knowledge of those skilled in the art.
Many other changes and modifications can be made without departing from the spirit and scope of the invention. It is to be understood that the invention is not to be limited to the specific embodiments, and that the scope of the invention is defined by the appended claims.

Claims (9)

1. A four-way h.265 codec, characterized by: the method comprises the following steps: the system comprises a main control panel, wherein the main control panel is provided with an H.265 coding and decoding module, a storage module, an audio and video input module, an audio and video output module, a power supply module, a peripheral interface module, a network interface module and a serial interface module; the output ends of the audio and video input module and the serial interface module are connected with an H.265 coding and decoding module, the H.265 coding and decoding module is connected with a storage module, the output end of the H.265 coding and decoding module is connected with an audio and video output module, a peripheral interface module and a network interface module, and the output end of the H.265 coding and decoding module is connected with a DSP + FPGA processing module through the network interface module; and the power supply module is connected with the H.265 coding and decoding module, the audio and video input module and the audio and video output module.
2. The four-way h.265 codec of claim 1, wherein: the memory module adopts an SPI NAND flash structure, wherein the memory chip is a K4B4G1646E-BCNB model memory chip of high-bandwidth DDR 3L.
3. The four-way h.265 codec of claim 1, wherein: the H.265 coding and decoding module is a Hi3531D coding and decoding chip.
4. The four-way h.265 codec of claim 1, wherein: the network interface module adopts a network interface chip with RTL8211E model.
5. The four-way h.265 codec of claim 1, wherein: the serial interface module comprises an RS232 interface and an RS-485 serial port, the RS232 serial port adopts a chip of SP3232EEN type, and the RS485 serial port module adopts a chip of MX3078EISA type.
6. The four-way h.265 codec of claim 1, wherein: the peripheral interface module includes: HDMI, DVI, SDI, CVBS output interface, IO control interface, hard disk mount interface and USB interface.
7. The four-way h.265 codec of claim 6, wherein: the HDMI output module comprises an HDMI control chip and an HDMI interface, the HDMI interface is connected with the HDMI control chip, and the HDMI control chip is an ESD5344D chip.
8. The four-way h.265 codec of claim 6, wherein: the SDI interface is a GS2972 chip.
9. The four-way h.265 codec of claim 1, wherein: the audio and video output module adopts a PCM5100A chip.
CN202021016946.4U 2020-06-05 2020-06-05 Four-way H.265 codec Active CN212367442U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021016946.4U CN212367442U (en) 2020-06-05 2020-06-05 Four-way H.265 codec

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021016946.4U CN212367442U (en) 2020-06-05 2020-06-05 Four-way H.265 codec

Publications (1)

Publication Number Publication Date
CN212367442U true CN212367442U (en) 2021-01-15

Family

ID=74153185

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202021016946.4U Active CN212367442U (en) 2020-06-05 2020-06-05 Four-way H.265 codec

Country Status (1)

Country Link
CN (1) CN212367442U (en)

Similar Documents

Publication Publication Date Title
CN1976429B (en) Video frequency transmitting system and method based on PC and high-resolution video signal collecting card
CN1863281A (en) Multifunctional television
CN110958431A (en) Multi-channel video compression post-transmission system and method
CN102883150A (en) Wireless audio and video transmission system
CN212367442U (en) Four-way H.265 codec
CN111787358A (en) IP stream HDMI media codec
CN104767957A (en) Video capture coding method, system and device based on embedded type dual-core processor
WO2013170765A1 (en) Video signal transmission method, device, system and terminal
CN110798688A (en) High-definition video compression coding system based on real-time transmission
CN201528404U (en) Video encoding and decoding system and video encoder and video decoder thereof
CN212660275U (en) IP stream HDMI media codec
CN206042200U (en) Digit high definition video monitored control system
CN215222346U (en) MIPI protocol-based SDI receiving and encoding device and electronic equipment
CN212463401U (en) Encoding and decoding device and video monitoring system
CN201774633U (en) Video encoder
CN209949313U (en) Signal transmission system, signal encoding device, and signal decoding device
CN101742220B (en) System and method for realizing multi-picture based on serial differential switch
CN207638799U (en) Video encoder
CN106412684A (en) High-definition video wireless transmission method and system
US20100037281A1 (en) Missing frame generation with time shifting and tonal adjustments
CN212367441U (en) Single-path H.265 codec
CN102647613B (en) Internet protocol video coding box
CN207802170U (en) A kind of multi-path HDMI interfaces codec terminal system
CN111343457A (en) Audio and video processing system and method
CN217825146U (en) Ultra-high-definition video wireless transmitting device, wireless receiving device and wireless transmission system applying compression algorithm

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant