CN212342617U - Semiconductor packaging part, motor controller and new energy automobile - Google Patents
Semiconductor packaging part, motor controller and new energy automobile Download PDFInfo
- Publication number
- CN212342617U CN212342617U CN202022176766.9U CN202022176766U CN212342617U CN 212342617 U CN212342617 U CN 212342617U CN 202022176766 U CN202022176766 U CN 202022176766U CN 212342617 U CN212342617 U CN 212342617U
- Authority
- CN
- China
- Prior art keywords
- metal layer
- metal
- conducting strip
- semiconductor package
- conductive sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 79
- 238000004806 packaging method and process Methods 0.000 title claims description 22
- 239000002184 metal Substances 0.000 claims abstract description 328
- 229910052751 metal Inorganic materials 0.000 claims abstract description 328
- 239000000758 substrate Substances 0.000 claims abstract description 62
- 150000001875 compounds Chemical class 0.000 claims 2
- 238000000465 moulding Methods 0.000 claims 2
- 230000017525 heat dissipation Effects 0.000 description 15
- 238000003466 welding Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 238000005245 sintering Methods 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000010248 power generation Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a semiconductor package, machine controller and new energy automobile. Wherein, this semiconductor package includes: the substrate comprises a substrate, a first conducting strip, a second conducting strip and a third conducting strip; the substrate is provided with a first metal layer and a second metal layer which are arranged at intervals, the first metal layer and the second metal layer are arranged in an insulating manner, the first metal layer is provided with a first chip set, and the second metal layer is provided with a second chip set; the first conducting sheet is electrically connected with the first metal layer; the second conducting sheet is connected with the surface of the first chip group, which is far away from the first metal layer, and is also connected with the second metal layer; the third conducting strip is connected with the surface of the second chip group departing from the second metal layer. The utility model discloses semiconductor package reduces semiconductor package's size, improves semiconductor package's power density.
Description
Technical Field
The utility model relates to the field of semiconductor technology, in particular to semiconductor packaging part, applied this semiconductor packaging part's machine controller and new energy automobile.
Background
Generally, in the packaging of a semiconductor device with a half-bridge/full-bridge function, most of the semiconductor devices adopt a connection process of binding wires or metal strips to enable an upper bridge arm and a lower bridge arm to be electrically connected, so that the increase of process flows, the increase of materials and the increase of material cost are brought; secondly, when the electrical connection function is realized, materials are required to be led out from the chip and then are connected to the substrate, so that the size of the heat dissipation substrate is increased, the heat dissipation surface of the chip is reduced, the size of the semiconductor packaging part is increased due to the problems, and finally the power density of the semiconductor packaging part is reduced.
SUMMERY OF THE UTILITY MODEL
The present invention is directed to a semiconductor package, which is to reduce the size of the semiconductor package and improve the power density of the semiconductor package.
To achieve the above object, the present invention provides a semiconductor package comprising:
the chip comprises a substrate, wherein a first metal layer and a second metal layer are arranged on one surface of the substrate, the first metal layer and the second metal layer are arranged at intervals, a first chip set is installed on the first metal layer, and a second chip set is installed on the second metal layer;
the first conducting strip is electrically connected with the first metal layer and is used for inputting and outputting direct current signals;
the second conducting strip is connected with the surface of the first chip group, which is far away from the first metal layer, and is also connected with the second metal layer, and the second conducting strip is used for outputting an alternating current signal flowing through the first chip group and inputting the alternating current signal to the second metal layer; and
and the third conductive sheet is connected with the surface of the second chipset departing from the second metal layer and is used for outputting a direct current signal flowing through the second chipset or inputting a direct current signal to the second chipset.
In an embodiment of the present invention, the first metal layer includes a first metal part and a second metal part, the first metal part and the second metal part are disposed at an included angle, and the first metal part and the second metal part are both disposed at an interval from the second metal layer and are disposed along two adjacent sides of the second metal layer;
the first metal piece is provided with the first chip set, and the second metal piece is connected with the first conducting strip.
In an embodiment of the present invention, the first metal layer further includes a third metal part, the third metal part is connected to the first metal part, the third metal part and the second metal part are disposed at an interval, and the third metal part and the second metal part are respectively located at two sides of the second metal layer;
the semiconductor packaging piece comprises two first conducting strips, wherein one first conducting strip is connected with the second metal piece, and the other first conducting strip is connected with the third metal piece.
In an embodiment of the present invention, an end of the second metal piece away from the first metal piece extends to a side edge to form a first connection plate, and the first connection plate is connected to the first conductive sheet;
and/or one end of the third metal piece, which is far away from the first metal piece, extends to the side edge to form a second connecting plate, and the second connecting plate is connected with the other first conducting strip.
In an embodiment of the present invention, a first positioning plate is further disposed on the substrate, the first positioning plate is disposed adjacent to the first metal layer, and the first positioning plate is connected to the second conductive sheet;
and/or a second positioning plate is further arranged on the substrate, the second positioning plate is adjacent to the second metal layer, and the second positioning plate is connected with the third conducting strip.
In an embodiment of the present invention, the second conductive sheet has a first protrusion corresponding to the first chip group and the second metal layer;
and/or the third conducting strip is provided with a second convex part corresponding to the second chip group.
In an embodiment of the present invention, a third metal layer is further disposed on the other surface of the substrate, and the third metal layer is used for improving the overall strength of the semiconductor package.
In an embodiment of the present invention, the semiconductor package includes a plastic package layer, the plastic package layer is connected to a side of the substrate and covers the first metal layer, the second metal layer, the first conductive sheet, the second conductive sheet, and the third conductive sheet.
The utility model also provides a motor controller, including total control circuit board with the semiconductor packaging part, total control circuit board's direct current generating line anodal with the first conducting strip of semiconductor packaging part is connected, total control circuit board's direct current generating line negative pole with the third conducting strip of semiconductor packaging part is connected, total control circuit board's alternating current generating line output pole is connected with the second conducting strip.
The utility model also provides a new energy automobile, include machine controller.
The technical scheme of the utility model is that the first metal layer and the second metal layer which are arranged at intervals and insulated are arranged on the substrate, so that the first chip group is arranged on the first metal layer, and the second chip group is arranged on the second metal layer; meanwhile, the first conducting plate is connected with the first metal layer, the second conducting plate is connected to the surface of the first chip set, which is opposite to the first metal layer, the second conducting plate is electrically connected with the first chip set and the second metal layer, the third conducting plate is connected with the surface of the second chip set, which is opposite to the second metal layer, and the third conducting plate is electrically connected with the second chip set. Therefore, two surfaces of the first chip set can be attached to the first metal layer and the second conducting strip, and two surfaces of the second chip set are attached to the second metal layer and the third conducting strip, so that the two surfaces of the first chip set and the second chip set are both attached to the metal material, and the heat dissipation of the first chip set and the second chip set is improved; meanwhile, the adoption of a binding line or a metal strip connection process is avoided, the space of the substrate is effectively saved, the purpose of miniaturizing the semiconductor packaging part is realized, and the power density on the substrate is improved. When the semiconductor packaging piece is applied to an electric state, the positive direct current signal can be transmitted to the first metal layer from the first conducting strip, and then is converted into an alternating signal from the first metal layer through the first chip set, and then is output from the second conducting strip; after another alternating signal is input from the second conducting strip, the second chip set converts the alternating signal into a negative direct current signal, and then the negative direct current signal is transmitted to the third conducting strip through the second metal layer, so that the output of the negative direct current signal is realized. When the semiconductor packaging part is applied to a power generation state, the alternating signal is output and transmitted from the second conducting strip, is converted into a direct current signal after passing through the first chip set, and is transmitted from the first conducting strip; another direct current signal can be transmitted from the third conducting strip to the second chip set, and the second chip set converts the direct current signal into an alternating signal and then transmits the alternating signal from the second conducting strip. The utility model discloses semiconductor package reduces semiconductor package's size, improves semiconductor package's power density.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an embodiment of a semiconductor package according to the present invention;
fig. 2 is a side view of the semiconductor package of fig. 1;
fig. 3 is a side view of another possible implementation of the semiconductor package of fig. 1;
fig. 4 is a schematic structural diagram of a second embodiment of the semiconductor package of the present invention;
fig. 5 is a schematic structural diagram of a semiconductor package according to a third embodiment of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | |
14 | Second chip set |
| 11 | A |
15 | First positioning plate |
| 111 | |
16 | |
| 112 | Second metal piece | 17 | A |
| 114 | First connecting |
2 | First |
| 113 | |
3 | Second |
| 115 | Second connecting |
31 | First convex |
| 12 | Second metal layer | 4 | Third |
| 13 | First chipGroup of | 41 | Second convex part |
The implementation, functional features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the meaning of "and/or" appearing throughout is to include three juxtapositions, exemplified by "A and/or B," including either the A or B arrangement, or both A and B satisfied arrangement. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a semiconductor packaging part. Referring specifically to fig. 1, a schematic structural diagram of an embodiment of a semiconductor package according to the present invention is shown; referring to fig. 2, a side view of the semiconductor package of fig. 1 is shown; referring to fig. 3, a side view of another possible implementation of the semiconductor package of fig. 1 is shown; fig. 4 is a schematic structural diagram of a semiconductor package according to a second embodiment of the present invention; referring to fig. 5, a schematic structural diagram of a third embodiment of the semiconductor package of the present invention is shown.
In an embodiment of the present invention, as shown in fig. 1 and shown in fig. 2, fig. 3, fig. 4 and fig. 5, the semiconductor package includes: the substrate comprises a substrate 1, a first conducting strip 2, a second conducting strip 3 and a third conducting strip 4; a first metal layer 11 and a second metal layer 12 are arranged on one surface of the substrate 1, the first metal layer 11 and the second metal layer 12 are arranged at intervals, a certain insulation distance is reserved between the first metal layer 11 and the second metal layer 12, a first chipset 13 is arranged on the first metal layer 11, and a second chipset 14 is arranged on the second metal layer 12; the first conducting strip 2 is electrically connected with the first metal layer 11, and the first conducting strip 2 is used for inputting and outputting direct current signals; the second conducting strip 3 is connected with the surface of the first chip group 13 departing from the first metal layer 11, the second conducting strip 3 is also connected with the second metal layer 12, and the second conducting strip 3 is used for outputting an alternating current signal flowing through the first chip group 13 and inputting the alternating current signal to the second metal layer 12; the third conductive plate 4 is connected to a surface of the second chip set 14 away from the second metal layer 12, and the third conductive plate 4 is configured to output a dc signal flowing through the second chip set 14 or input the dc signal to the second chip set 14. That is, under the premise that the first metal layer 11 and the second metal layer 12 are spaced and insulated, the outline shapes of the first metal layer 11 and the second metal layer 12 can be adjusted to a desired shape according to specific requirements, and the outline shapes of the first metal layer 11 and the second metal layer 12 are not limited herein.
In this embodiment, a first metal layer 11 and a second metal layer 12 are disposed on a substrate 1 at an interval and are insulated from each other, so that a first chip set 13 is disposed on the first metal layer 11, and a second chip set 14 is disposed on the second metal layer 12; meanwhile, the first conducting plate 2 is connected with the first metal layer 11, the second conducting plate 3 is connected with the surface of the first chip set 13, which is opposite to the first metal layer 11, the second conducting plate 3 is electrically connected with the first chip set 13 and the second metal layer 12, the third conducting plate 4 is connected with the surface of the second chip set 14, which is opposite to the second metal layer 12, and the third conducting plate 4 is electrically connected with the second chip set 14. Therefore, two surfaces of the first chipset 13 can be attached to the first metal layer 11 and the second conductive sheet 3, and two surfaces of the second chipset 14 are attached to the second metal layer 12 and the third conductive sheet 4, so that the two surfaces of the first chipset 13 and the second chipset 14 are both attached to the metal material, and the heat dissipation of the first chipset 13 and the second chipset 14 is improved; meanwhile, the adoption of a binding line or a metal strip connection process is avoided, the space of the substrate 1 is effectively saved, the purpose of miniaturizing the semiconductor packaging part is realized, and the power density on the substrate 1 is improved. When the semiconductor package is applied to an electric state, the positive direct current signal can be transmitted from the first conductive sheet 2 to the first metal layer 11, and then is converted into an alternating signal from the first metal layer 11 through the first chip group 13, and then is output from the second conductive sheet 3; after another alternating signal is input from the second conductive sheet 3, the second chipset 14 converts the alternating signal into a negative dc signal, and transmits the negative dc signal to the third conductive sheet 4 through the second metal layer 12, so as to output the negative dc signal. When the semiconductor package is applied to power generation, the alternating signal is output and transmitted from the second conducting strip 3, is converted into a direct current signal after passing through the first chip group 13, and is transmitted from the first conducting strip 2; another dc signal may be transmitted from the third conductive sheet 4 to the second chipset 14, and the second chipset 14 converts the dc signal into an alternating signal and transmits the alternating signal from the second conductive sheet 3. The utility model discloses semiconductor package reduces semiconductor package's size, improves semiconductor package's power density.
In an embodiment of the present invention, as shown in fig. 5, the outlines of the first metal layer 11 and the second metal layer 12 may be rectangular, and the first metal layer 11 and the second metal layer 12 may be disposed in parallel.
In an embodiment of the present invention, as shown in fig. 1 and 4, the outline of one of the first metal layer 11 and the second metal layer 12 may be rectangular, and the outline of the other of the first metal layer 11 and the second metal layer 12 may be a frame or a bent multi-section shape. For example: the outline of the first metal layer 11 is a frame body with full edge covering, and the second metal layer 12 is positioned in the middle of the frame body; alternatively, the outline of the first metal layer 11 is a frame body with an opening at the edge, and the second metal layer 12 is located in the middle of the frame body.
In an embodiment of the present invention, referring to fig. 1, 4 and 5, in order to improve the structural rationalization of the semiconductor package, it is defined that the substrate 1 has a left-right direction, and the substrate 1 has a left end and a right end; that is to say, the first conducting strip 2 is connected to the first metal layer 11, the third conducting strip 4 is connected to the second chip set 14, and after the second conducting strip 3 is connected to the first chip set 13 and the second metal layer 12, the first conducting strip 2 and the third conducting strip 4 are located at the left end of the substrate 1, and the second conducting strip 3 is located at the right end of the substrate 1.
Alternatively, the first conductive sheet 2 and the first metal layer 11 are connected by soldering, laser welding, ultrasonic welding, or silver sintering.
Alternatively, the third conductive sheet 4 and the second chip set 14 are connected by soldering, laser welding, ultrasonic welding, or silver sintering.
Alternatively, the second conductive sheet 3 is connected to the first chip group 13 and the second metal layer 12 by soldering, or by laser welding, ultrasonic welding, or silver sintering.
Optionally, the substrate 1 is made of an insulating material. For example: and (3) ceramic materials.
Alternatively, the process of providing the first metal layer 11 and the second metal layer 12 on the substrate 1 may be: metal deposition, etching, carving and other processes.
In an embodiment of the present invention, a whole metal layer may be covered on the substrate 1, the metal layer is etched by an etching process, the first metal layer 11 and the second metal layer 12 are formed on the substrate 1, and the first chip set 13 and the second chip set 14 are correspondingly soldered on the first metal layer 11 and the second metal layer 12.
Optionally, in order to improve the signal transmission efficiency of the first chip set 13 and the second chip set 14, the first metal layer 11 and the second metal layer 12 are made of copper.
Optionally, the first conductive sheet 2, the second conductive sheet 3, and the third conductive sheet 4 are made of materials with good conductive effects, for example: copper material.
Optionally, the first chip group 13 includes a plurality of chips.
Optionally, the second chipset 14 comprises a plurality of chips.
In an embodiment of the present invention, as shown in fig. 2 and 3, a third metal layer 17 is disposed on a surface of the substrate 1 away from the first metal layer 11 and the second metal layer 12, and the third metal layer 17 can cover the substrate 1 as a whole to enhance the strength of the substrate 1, improve the overall hardness of the semiconductor package, avoid the occurrence of bending accidents of the substrate 1, the first metal layer 11 and the second metal layer 12, and ensure the normal operation of the circuit of the semiconductor package. On the other hand, by the structure in which the third metal layer 17 is further provided on the substrate 1, the third metal layer 17 can also serve as a heat dissipation structure, increasing the heat dissipation efficiency of the substrate 1.
Alternatively, a heat conductive silicone grease may be filled between the third metal layer 17 and the substrate 1 to improve heat dissipation performance.
In an embodiment of the present invention, as shown in fig. 1, the first metal layer 11 includes a first metal part 111 and a second metal part 112, the first metal part 111 and the second metal part 112 are disposed at an included angle, and the first metal part 111 and the second metal part 112 are both disposed at an interval with the second metal layer 12 and are disposed along two adjacent side edges of the second metal layer 12; the first metal piece 111 is provided with a first chip set 13, and the second metal piece 112 is connected with the first conducting strip 2. The first metal part 111 and the second metal part 112 are both insulated from the second metal layer 12.
In the embodiment, the first metal layer 11 includes a first metal part 111 and a second metal part 112 connected to the first metal layer 11, so that the first metal layer 11 is a metal layer with a folded corner. The substrate 1 is defined to have an up-down direction, the up-down direction and a left-right direction are perpendicular to each other, and the first metal layer 11 is a metal layer with a bevel, so that the first metal layer 11 includes the first metal part 111 in the up-down direction, and the first metal layer 11 includes the second metal part 112 in the left-right direction, which effectively increases the coverage area of the first metal layer 11 and improves the connection strength between the first metal layer 11 and the substrate 1. On the other hand, by arranging the first metal part 111 and the second metal part 112 along two adjacent sides of the second metal layer 12, the first conductive plate 2 can be connected to the second metal part 112, so as to adjust the connection position of the second conductive plate 3 according to actual conditions, thereby improving the adaptability of the semiconductor package.
Alternatively, in the manufacturing of the first conductive sheet 2, the second conductive sheet 3 and the third conductive sheet 4, the first conductive sheet 2, the second conductive sheet 3 and the third conductive sheet 4 may be formed by stamping on a metal sheet through a stamping process; because the second conductive sheet 3 and the third conductive sheet 4 are needed to be connected with the first chipset 13 and the second chipset 14 respectively, compared with the existing scheme of connecting the first chipset 13 and the second chipset 14 by wires, the areas of the second conductive sheet 3 and the third conductive sheet 4 are larger, the use efficiency of metal sheets can be improved, and further the consumable material is reduced.
Optionally, as shown in fig. 1, one end of the second metal part 112 away from the first metal part 111 extends to a side edge to form a first connection board 114, and the first connection board 114 is connected to the first conductive plate 2.
In the embodiment, the first connection board 114 is formed by extending from one end of the second metal part 112 far away from the first metal part 111 to a side edge, so as to increase a connection area between the second metal part 112 and the first conductive plate 2 and improve connection stability between the second metal part 112 and the first conductive plate 2. On the other hand, the structure of connecting the second metal part 112 and the first metal part 111 increases the contact area between the first metal layer 11 and the substrate 1, and improves the heat dissipation efficiency.
In an embodiment of the present invention, as shown in fig. 1, the first metal layer 11 further includes a third metal part 113, the third metal part 113 is connected to the first metal part 111, the third metal part 113 and the second metal part 112 are disposed at an interval, and the third metal part 113 and the second metal part 112 are respectively located at two sides of the second metal layer 12; the semiconductor package comprises two first conductive sheets 2, wherein one first conductive sheet 2 is connected with the second metal part 112, and the other first conductive sheet 2 is connected with the third metal part 113. The first metal part 111, the second metal part 112, and the third metal part 113 are insulated from the second metal layer 12.
In this embodiment, the third metal part 113 and the second metal part 112 are respectively located at two sides of the second metal layer 12, and the third metal part 113 and the second metal part 112 are respectively connected to the two first conductive sheets 2, so that the two first conductive sheets 2 can both be connected to a direct current signal, and the stability of signal input is improved. On the other hand, stray inductance of an input system is reduced, and the current sharing capability of the first chip set is improved.
Alternatively, the third metal part 113 and the second metal part 112 may be connected to the same side of the first metal part 111, and the third metal part 113 may be disposed opposite to the second metal part 112 and located at two opposite sides of the second metal layer 12.
Optionally, the third metal part 113 and the second metal part 112 may be connected to two sides of the same back of the first metal part 111, and an extension of the third metal part 113 is parallel to an extension of the second metal part 112.
Optionally, the third metal part 113 and the second metal part 112 may be connected to two sides of the same back of the first metal part 111, and an extension of the third metal part 113 is overlapped with an extension of the second metal part 112.
In an embodiment of the present invention, the third metal part 113 and the second metal part 112 are respectively located on two opposite sides of the second metal layer 12, the third metal part 113 and the second metal part 112 are insulated from the second metal layer 12, as shown in fig. 1, one end of the third metal part 113, which is far away from the first metal part 111, extends to the side to form the second connection board 115, and the second connection board 115 is connected to another first conductive plate 2.
In this embodiment, the second connection board 115 is formed by extending from one end of the third metal part 113 far away from the first metal part 111 to a side edge, so as to increase a connection area between the third metal part 113 and the first conductive plate 2 and improve connection stability between the third metal part 113 and the first conductive plate 2. On the other hand, the second metal part 112 and the third metal part 113 connected to the first metal part 111 increase the contact area between the first metal layer 11 and the substrate 1, thereby improving the heat dissipation efficiency.
In an embodiment of the present invention, referring to fig. 1, a first positioning plate 15 is further disposed on the substrate 1, the first positioning plate 15 is disposed adjacent to the first metal layer 11, and the first positioning plate 15 is connected to the second conductive sheet 3;
in this embodiment, since the second conductive sheet 3 is directly connected to the first chip set 13, when a product applied to the semiconductor package is moved or collided, the second conductive sheet 3 is partially stressed, and the second conductive sheet 3 and the first chip set 13 vibrate with each other, so that the connection between the second conductive sheet 3 and the first chip set 13 is unstable, therefore, the substrate 1 is further provided with the first positioning plate 15 adjacent to the first metal layer 11, and the second conductive sheet 3 is connected to the first positioning plate 15, so as to realize the positioning between the second conductive sheet 3 and the first positioning plate 15, and improve the connection stability between the second conductive sheet 3 and the first chip set 13.
Optionally, the first positioning plate 15 is a metal layer, and can conduct heat with the second conductive sheet 3, so as to improve the heat dissipation efficiency.
Optionally, the first positioning plate 15 is made of metal, for example: copper material.
Optionally, the first positioning plate 15 is connected with the second conductive plate 3 through soldering; alternatively, the first positioning plate 15 and the second conductive plate 3 may be connected by laser welding, ultrasonic welding, or silver sintering.
In an embodiment of the present invention, referring to fig. 1, a second positioning plate 16 is further disposed on the substrate 1, the second positioning plate 16 is disposed adjacent to the second metal layer 12, and the second positioning plate 16 is connected to the third conductive sheet 4.
In this embodiment, since the third conductive plate 4 is directly connected to the second chipset 14, when a product applied to the semiconductor package is moved or collided, the third conductive plate 4 vibrates with the second chipset 14, and thus the connection between the third conductive plate 4 and the second chipset 14 is unstable, a second positioning plate 16 adjacent to the second metal layer 12 is further disposed on the substrate 1, and the third conductive plate 4 is connected to the second positioning plate 16, so as to position the third conductive plate 4 and the second positioning plate 16, and improve the connection stability between the third conductive plate 4 and the second chipset 14.
Optionally, the second positioning board 16 is a metal layer, and can conduct heat with the third conductive sheet 4, so as to improve the heat dissipation efficiency.
Optionally, the second positioning plate 16 is made of metal, for example: copper material.
Optionally, the second positioning plate 16 and the third conductive plate 4 are connected by solder. Alternatively, the second positioning board 16 and the third conductive sheet 4 may be connected by laser welding, ultrasonic welding, or silver sintering.
In an embodiment of the present invention, the substrate 1 may be covered with a metal layer, and the first metal layer 11, the second metal layer 12, the first positioning plate 15 and the second positioning plate 16 are formed on the substrate 1 by an etching process. The first metal layer 11, the second metal layer 12, the first positioning plate 15 and the second positioning plate 16 are spaced from each other.
Optionally, the first positioning plate 15 is located on a side of the first metal layer 11 facing away from the second metal layer 12.
Optionally, the second positioning plate 16 is located on a side of the second metal layer 12 facing away from the first metal layer 11.
In an embodiment of the present invention, as shown in fig. 3, the second conductive sheet 3 is provided with a first protrusion 31 corresponding to the first chip group 13 and the second metal layer 12. On the other hand, the second conductive plate 3 is also provided with a first projection 31 corresponding to the first positioning plate 15.
In the present embodiment, the structure of providing the first protrusion 31 on the second conductive sheet 3 can reduce the pads on the substrate 1 corresponding to the first chip group 13, the second metal layer 12 and the first positioning plate 15, thereby reducing the difficulty in manufacturing the semiconductor package.
Optionally, the second conductive sheet 3 is a sheet metal part formed by metal punch; that is, a part of the region of the second conductive sheet 3 is bent to form the first protrusion 31. By adopting the structure of partially bending the second conductive sheet 3, the pressure resistance in the left-right direction and the up-down direction of the second conductive sheet 3 can be improved, and the connection stability between the second conductive sheet 3 and the first chip group 13 can be improved.
Based on the above, the second conductive sheet 3 is a plate structure. At this time, since the first chip has a certain thickness, the second conductive sheet 3 has a certain distance from the second metal layer 12 and the first positioning plate 15, and the connection can be realized by filling copper sheets or solder between the second conductive sheet 3 and the second metal layer 12 and the first positioning plate 15.
In an embodiment of the present invention, as shown in fig. 3, the third conductive sheet 4 is provided with a second protrusion 41 corresponding to the second chip set 14. On the other hand, the third conductive plate 4 is also provided with second protrusions 41 corresponding to the second positioning plate 16.
In this embodiment, the structure in which the second protrusion 41 is disposed on the third conductive sheet 4 can reduce the pads on the substrate 1 corresponding to the second chip group 14 and the second positioning board 16, thereby reducing the difficulty in manufacturing the semiconductor package.
Optionally, the third conductive sheet 4 is a sheet metal part formed by metal punch; that is, a part of the region of the third conductive sheet 4 is bent to form the second protrusion 41. By adopting the structure of partially bending the third conductive plate 4, the pressure resistance in the left-right direction and the up-down direction of the third conductive plate 4 can be improved, and the connection stability between the third conductive plate 4 and the second chip set 14 can be improved.
Based on the above, when the third conductive sheet 4 is a plate structure. At this time, since the second chip has a certain thickness, the third conductive plate 4 and the second positioning plate 16 have a certain distance, and the connection can be realized by filling a copper sheet or solder between the third conductive plate 4 and the second positioning plate 16.
In an embodiment of the present invention, as shown in fig. 2 and fig. 3, the third metal layer 17 is further disposed on the other surface of the substrate 1, so as to avoid the situation that the single surface of the substrate 1 is covered with the first metal layer 11 and the second metal layer 12, which causes the substrate 1 to be damaged due to uneven stress, and the third metal layer 17 is used to improve the overall strength of the semiconductor package. On the other hand, by the structure in which the third metal layer 17 is further provided on the substrate 1, the third metal layer 17 can also serve as a heat dissipation structure, increasing the heat dissipation efficiency of the substrate 1.
In an embodiment of the present invention, the semiconductor package includes a plastic package layer (not shown), which is connected to a side surface of the substrate 1 and covers the first metal layer 11, the second metal layer 12, the first conductive sheet 2, the second conductive sheet 3, and the third conductive sheet 4. Meanwhile, the plastic package layer also covers the first positioning plate 15 and the second positioning plate 16. The plastic package layer integrally packages the first metal layer 11, the second metal layer 12, the first conductive sheet 2, the second conductive sheet 3, the third conductive sheet 4, the first positioning plate 15 and the second positioning plate 16 to form a package, so that an external conductive material is prevented from entering the substrate 1, and the overall stability of the semiconductor package is improved.
It can be understood that the third metal layer 17 is for improving the heat dissipation efficiency of the semiconductor package, and when the plastic package layer covers the substrate 1, the third metal layer 17 is not covered, so that the third metal layer 17 can be exposed, and the heat dissipation effect is improved.
The utility model also provides a motor controller, this motor controller include total control circuit board and semiconductor package, and above-mentioned embodiment is referred to this semiconductor package's concrete structure, because this motor controller has adopted the whole technical scheme of above-mentioned all embodiments, consequently has all beneficial effects that the technical scheme of above-mentioned embodiment brought at least, and the repeated description is no longer given here. The anode of the direct current bus of the master control circuit board is connected with the first conducting strip 2 of the semiconductor packaging piece, the cathode of the direct current bus of the master control circuit board is connected with the third conducting strip 4 of the semiconductor packaging piece, and the output electrode of the alternating current bus of the master control circuit board is connected with the second conducting strip 3.
It can be understood that the general control circuit board is provided with a micro control unit, and the micro control unit is electrically connected with the first conductive sheet 2, the second conductive sheet 3 and the third conductive sheet 4 of the conductor package to realize signal conversion. That is, the motor controller may be brought into an electromotive state or a power generation state according to the control of the micro control unit.
In this embodiment, the positive electrode of the dc bus of the general control circuit board is connected to the first metal layer 11 through the first conductive sheet 2. The first metal layer 11 is connected to the first chip set 13, the emitter E/source S on the upper surface of the first chip set 13 is connected to the second conductive sheet 3, the first chip set 13 is used as an upper bridge switching transistor, and the first metal layer 11 forms a conductive layer of the collector C/drain D of the upper bridge switching transistor.
In this embodiment, the negative electrode of the dc bus is connected to the emitter E/source S on the upper surface of the second chipset 14 through the third conductive sheet 4, the lower surface of the second chipset 14 is connected to the second metal layer 12, the second chipset 14 is used as a bottom bridge switch, and the second metal layer 12 forms a conductive layer of the collector C/drain D of the bottom bridge switch.
In this embodiment, the ac bus output electrode of the general control circuit board is connected to the emitter E/source S on the front surface of the second chipset 14 through the second conductive sheet 3, and is further connected to the second metal layer 12 contacting the lower surface of the second chipset 14.
The utility model discloses still provide a new energy automobile, this new energy automobile include motor controller, and this motor controller's concrete structure refers to above-mentioned embodiment, because this new energy automobile has adopted the whole technical scheme of above-mentioned all embodiments, consequently has all beneficial effects that the technical scheme of above-mentioned embodiment brought at least, and the repeated description is no longer given here.
In this embodiment, this new energy automobile includes automobile body and machine controller, and machine controller locates automobile body to be connected with each components and parts electricity of automobile body, in order to obtain automobile body's running state. Wherein, each component includes motor and battery.
The above is only the optional embodiment of the present invention, and not therefore the scope of the present invention is limited, all under the inventive concept, the equivalent structure transformation made by the contents of the specification and the drawings is utilized, or the direct/indirect application is included in other related technical fields in the patent protection scope of the present invention.
Claims (10)
1. A semiconductor package, comprising:
the chip comprises a substrate, wherein a first metal layer and a second metal layer are arranged on one surface of the substrate, the first metal layer and the second metal layer are arranged at intervals, the first metal layer and the second metal layer are arranged in an insulating manner, a first chip set is installed on the first metal layer, and a second chip set is installed on the second metal layer;
the first conducting strip is electrically connected with the first metal layer and is used for inputting and outputting direct current signals;
the second conducting strip is connected with the surface of the first chip group, which is far away from the first metal layer, and is also connected with the second metal layer, and the second conducting strip is used for outputting an alternating current signal flowing through the first chip group and inputting the alternating current signal to the second metal layer; and
and the third conductive sheet is connected with the surface of the second chipset departing from the second metal layer and is used for outputting a direct current signal flowing through the second chipset or inputting a direct current signal to the second chipset.
2. The semiconductor package part according to claim 1, wherein the first metal layer comprises a first metal part and a second metal part, the first metal part and the second metal part are arranged at an included angle, and the first metal part and the second metal part are both arranged at an interval with the second metal layer and are arranged along two adjacent sides of the second metal layer;
the first metal piece is provided with the first chip set, and the second metal piece is connected with the first conducting strip.
3. The semiconductor package according to claim 2, wherein the first metal layer further comprises a third metal part, the third metal part is connected to the first metal part, the third metal part and the second metal part are disposed at an interval, and the third metal part and the second metal part are respectively located on two sides of the second metal layer;
the semiconductor packaging piece comprises two first conducting strips, wherein one first conducting strip is connected with the second metal piece, and the other first conducting strip is connected with the third metal piece.
4. The semiconductor package according to claim 3, wherein an end of the second metal piece away from the first metal piece extends to a side edge to form a first connection board, and the first connection board is connected to the first conductive sheet;
and/or one end of the third metal piece, which is far away from the first metal piece, extends to the side edge to form a second connecting plate, and the second connecting plate is connected with the other first conducting strip.
5. The semiconductor package according to claim 1, wherein a first positioning plate is further disposed on the substrate, the first positioning plate being disposed adjacent to the first metal layer, the first positioning plate being connected to the second conductive sheet;
and/or a second positioning plate is further arranged on the substrate, the second positioning plate is adjacent to the second metal layer, and the second positioning plate is connected with the third conducting strip.
6. The semiconductor package according to claim 1, wherein the second conductive sheet is provided with a first protrusion corresponding to each of the first chip group and the second metal layer;
and/or the third conducting strip is provided with a second convex part corresponding to the second chip group.
7. The semiconductor package according to any one of claims 1 to 6, wherein the other surface of the substrate is further provided with a third metal layer, and the third metal layer is used for improving the overall strength of the semiconductor package.
8. The semiconductor package according to any one of claims 1 to 6, wherein the semiconductor package comprises a molding compound layer, the molding compound layer is connected to one side surface of the substrate and covers the first metal layer, the second metal layer, the first conductive sheet, the second conductive sheet, and the third conductive sheet.
9. A motor controller is characterized by comprising a master control circuit board and the semiconductor packaging piece as claimed in any one of claims 1 to 8, wherein the positive electrode of a direct current bus of the master control circuit board is connected with a first conducting strip of the semiconductor packaging piece, the negative electrode of the direct current bus of the master control circuit board is connected with a third conducting strip of the semiconductor packaging piece, and the output electrode of an alternating current bus of the master control circuit board is connected with a second conducting strip.
10. A new energy automobile, characterized by comprising the motor controller according to claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022176766.9U CN212342617U (en) | 2020-09-28 | 2020-09-28 | Semiconductor packaging part, motor controller and new energy automobile |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022176766.9U CN212342617U (en) | 2020-09-28 | 2020-09-28 | Semiconductor packaging part, motor controller and new energy automobile |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212342617U true CN212342617U (en) | 2021-01-12 |
Family
ID=74070958
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022176766.9U Active CN212342617U (en) | 2020-09-28 | 2020-09-28 | Semiconductor packaging part, motor controller and new energy automobile |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212342617U (en) |
-
2020
- 2020-09-28 CN CN202022176766.9U patent/CN212342617U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6394489B2 (en) | Semiconductor device | |
| US7535076B2 (en) | Power semiconductor device | |
| JP7393387B2 (en) | Semiconductor device with stacked terminals | |
| JP6610568B2 (en) | Semiconductor device | |
| CN109417066B (en) | Semiconductor device with a plurality of semiconductor chips | |
| CN112185941A (en) | Semiconductor packaging part, motor controller and new energy automobile | |
| CN112543994A (en) | Semiconductor device with a plurality of semiconductor chips | |
| US10389099B2 (en) | Circuit assembly | |
| CN212342617U (en) | Semiconductor packaging part, motor controller and new energy automobile | |
| CN113517244A (en) | Novel packaging structure of power semiconductor module | |
| WO2023202676A1 (en) | Power module and motor controller | |
| CN218123406U (en) | Power device and power equipment | |
| CN115911012A (en) | IGBT module | |
| CN110520987B (en) | Semiconductor device and method for manufacturing semiconductor device | |
| US10772194B2 (en) | Circuit board, circuit assembly, and circuit board manufacturing method | |
| JP2013045847A (en) | Semiconductor module | |
| CN210223999U (en) | Power module and vehicle thereof | |
| CN114899162A (en) | Module and manufacturing method thereof | |
| CN217282763U (en) | Power module and motor controller | |
| JPH0322925Y2 (en) | ||
| CN212113715U (en) | Power semiconductor device | |
| CN216928548U (en) | Copper-clad ceramic plate for IGBT module | |
| CN218071918U (en) | Multi-dimensional intelligent power module packaging structure | |
| CN212161800U (en) | Bridge type IGBT module | |
| CN111341762A (en) | Be used for high-power multitube core packaging structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20240105 Address after: 215104 No. 52, tiandang Road, Yuexi, Wuzhong District, Suzhou City, Jiangsu Province Patentee after: Suzhou Huichuan United Power System Co.,Ltd. Address before: 518000 building e, Hongwei Industrial Park, Liuxian 2nd Road, Bao'an District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN INOVANCE TECHNOLOGY Co.,Ltd. |