CN212210826U

CN212210826U - Power-on delay circuit and audio equipment

Info

Publication number: CN212210826U
Application number: CN202020913702.XU
Authority: CN
Inventors: 姚洪波
Original assignee: Zhuhai Hivi Electronics Co ltd
Current assignee: Zhuhai Hivi Electronics Co ltd
Priority date: 2020-05-26
Filing date: 2020-05-26
Publication date: 2020-12-22
Anticipated expiration: 2030-05-26

Abstract

The utility model discloses a go up electric delay circuit and audio equipment, go up electric delay circuit and include electric connection's multivibrator module, first switching module and first charge pump module in proper order, the multivibrator module is used for exporting oscillating signal, the operating condition of the first switching module of multivibrator module control, and first charge pump module of first switching module control charges or discharges. According to the utility model discloses a go up electric delay circuit, realized going up the electricity to the time delay with electrical apparatus, thereby avoided going up the electricity simultaneously with preceding stage circuit with electrical apparatus such as operational amplification module and leading to operational amplification module to amplify preceding stage circuit's last electric shock signal formation noise, also avoided going up the electric shock damage circuit.

Description

Power-on delay circuit and audio equipment

Technical Field

The utility model relates to a delay circuit field, in particular to go up electric delay circuit and audio equipment.

Background

At present, the power supply of a common operational amplifier is obtained from a main power supply of equipment, and the operational amplifier and a preceding stage circuit are powered on simultaneously, so that a power-on impact signal of the preceding stage circuit is amplified, power-on noise occurs, and user experience is influenced. Meanwhile, in some occasions, because the power supply is a single power supply, the operational amplification chip must work in a single power supply mode, so that the swing range of an output signal is limited, direct current in the output signal is isolated by forced introduction of a coupling capacitor, low-frequency components in the signal are attenuated, and the operational amplification chip can aggravate power-on impact under the work of the single power supply.

SUMMERY OF THE UTILITY MODEL

The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides a go up electric delay circuit can realize the time delay and go up the electricity, establishes another power that lags behind the equipment main power supply to avoid the equipment main power supply to go up electric impulse circuit.

The utility model discloses still provide an audio equipment of time delay circuit on having the aforesaid.

According to the utility model discloses a go up electric delay circuit of first aspect embodiment, including electric connection in proper order: a multivibrator module for outputting an oscillation signal; a first switching module, the multivibrator module controlling an operating state of the first switching module; the first charge pump module is controlled by the first switching module to charge or discharge.

According to the utility model discloses last electric delay circuit has following beneficial effect at least: the multi-harmonic oscillation module generates a first control signal which controls the working state of the first switching module, and the first switching module can control the main power supply to charge or discharge the first charge pump module, so that the first charge pump module forms another power supply lagging behind the main power supply, thereby realizing power-on delay and avoiding a power-on impact circuit of the main power supply.

According to some embodiments of the present invention, further comprising: the second switching module is electrically connected with the multivibrator module, and the multivibrator module controls the working state of the second switching module; and the second charge pump module is electrically connected with the second switching module, and the second switching module controls the second charge pump module to charge or discharge.

According to some embodiments of the invention, the multivibrator module comprises: an inverter U1, wherein a sixth output terminal of the inverter U1 is electrically connected to a fifth input terminal of the inverter U1, a fifth output terminal of the inverter U1 is electrically connected to a second input terminal of the inverter U1 and a first input terminal of the inverter U1, a first output terminal of the inverter U1 is electrically connected to a second output terminal of the inverter U1, a second output terminal of the inverter U1 is electrically connected to the first switching module, a third input terminal of the inverter U1 and a fourth input terminal of the inverter U1, a third output terminal of the inverter U1 is electrically connected to a fourth output terminal of the inverter U1, and a fourth output terminal of the inverter U1 is electrically connected to the second switching module; a resistor R1, wherein a first end of the resistor R1 is electrically connected to a sixth input end of the inverter U1; a resistor R2, wherein a first end of the resistor R2 is electrically connected to a fifth input end of the inverter U1; a capacitor C1, wherein a first end of the capacitor C1 is electrically connected to the second end of the resistor R1 and the second end of the resistor R2, respectively, and a second end of the capacitor C1 is electrically connected to the fifth output end of the inverter U1.

According to some embodiments of the invention, the second switching module comprises: a transistor Q3, wherein the base of the transistor Q3 is electrically connected to the multivibrator module, and the emitter of the transistor Q3 is electrically connected to the second charge pump module; a transistor Q4, wherein the base of the transistor Q4 is electrically connected with the base of the transistor Q3, and the emitter of the transistor Q4 is electrically connected with the emitter of the transistor Q3.

According to some embodiments of the invention, the second charge pump module comprises: a capacitor C5, wherein a first end of the capacitor C5 is electrically connected to the second switching module; the anode of the diode D3 is electrically connected to the second end of the capacitor C5, and the cathode of the diode D3 is grounded; a diode D4, wherein a cathode of the diode D4 is electrically connected to the second end of the capacitor C5; a capacitor C6, wherein a second terminal of the capacitor C6 is electrically connected to the anode of the diode D4, and a first terminal of the capacitor C6 is grounded.

According to some embodiments of the invention, the multivibrator module comprises: the sixth output end of the inverter U1 is electrically connected to the fifth input end of the inverter U1, the fifth output end of the inverter U1 is electrically connected to the second input end of the inverter U1 and the first input end of the inverter U1, the first output end of the inverter U1 is electrically connected to the second output end of the inverter U1, and the second output end of the inverter U1 is electrically connected to the first switching module; a resistor R1, wherein a first end of the resistor R1 is electrically connected to a sixth input end of the inverter U1; a resistor R2, wherein a first end of the resistor R2 is electrically connected to a fifth input end of the inverter U1; a capacitor C1, wherein a first end of the capacitor C1 is electrically connected to the second end of the resistor R1 and the second end of the resistor R2, respectively, and a second end of the capacitor C1 is electrically connected to the fifth output end of the inverter U1.

According to some embodiments of the invention, the first switching module comprises: a transistor Q1, wherein the base of the transistor Q1 is electrically connected to the multivibrator module, and the emitter of the transistor Q1 is electrically connected to the first charge pump module; a transistor Q2, wherein the base of the transistor Q2 is electrically connected with the base of the transistor Q1, and the emitter of the transistor Q2 is electrically connected with the emitter of the transistor Q1.

According to some embodiments of the invention, the first charge pump module comprises: a capacitor C3, wherein a first end of the capacitor C3 is electrically connected with the first switching module; the anode of the diode D1 is electrically connected to the second end of the capacitor C3; a capacitor C4, wherein a first terminal of the capacitor C4 is electrically connected to the cathode of the diode D1, and a second terminal of the capacitor C4 is grounded; a diode D2, a cathode of the diode D2 is electrically connected to the second end of the capacitor C3, and an anode of the diode D2 is grounded.

According to the utility model discloses an audio equipment of second aspect embodiment, include according to the utility model discloses the last electric delay circuit of above-mentioned first aspect embodiment.

According to the utility model discloses audio equipment has following beneficial effect at least: the charge pump power supply lagging behind the main power supply of the audio equipment is established, and the power supply is used for supplying power to the operational amplification module of the audio equipment, so that the operational amplification module of the audio equipment is prevented from being subjected to power-on impact of the main power supply of the audio equipment, and noise or damage to the operational amplification module of the audio equipment caused by the power-on impact is avoided.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

fig. 1 is a schematic block diagram of an upper power delay circuit according to an embodiment of the present invention;

FIG. 2 is a schematic connection diagram of the circuit configuration shown in FIG. 1;

fig. 3 is a schematic block diagram of a power-on delay circuit according to another embodiment of the present invention;

fig. 4 is a connection diagram of the circuit configuration shown in fig. 3.

Reference numerals:

multivibrator module 100, first switching module 200, first charge pump module 300, second switching module 400, second charge pump module 500;

operational amplification module 600, first operational amplification unit 610, second operational amplification unit 620.

Detailed Description

Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present invention, and should not be construed as limiting the present invention.

In the description of the present invention, if there are first and second descriptions for distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or implicitly indicating the precedence of the indicated technical features.

In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.

For example, as shown in fig. 1, the utility model discloses a power-on delay circuit, including multivibrator module 100, first switching module 200 and first charge pump module 300 of electric connection in proper order, multivibrator module 100 is used for exporting the oscillation signal, and multivibrator module 100 controls the operating condition of first switching module 200, and first switching module 200 controls first charge pump module 300 to charge or discharge.

The multivibrator module 100 and the first switching module 200 are connected to a working power supply VDD, the multivibrator module 100 is electrically connected to the first switching module 200, and outputs a first control signal to the first switching module 200, the first switching module 200 controls the on/off state of the working power supply VDD and the first charge pump module 300 according to the first control signal, when the working power supply VDD is in the on state, the first charge pump module 300 charges the first charge pump module 300, when the working power supply VDD is in the off state, the first charge pump module 300 discharges through the first switching module 200, the first charge pump module 300 forms a first power supply V + lagging behind the working power supply VDD during the charging and discharging process, and the first power supply V + is used to supply power to the electrical appliances, thereby realizing the delayed power-up of the electrical appliances, and avoiding the noise caused by the power-up impact signal of the operational amplifier amplifying the pre-stage circuit when the electrical appliances such as the operational amplifier and the pre-stage circuit are powered, and the circuit is prevented from being damaged by power-on impact.

It should be noted that the embodiment of the present invention provides a first control signal which can be a periodic signal or an aperiodic signal, and the first switching module 200 can control the charging or discharging state of the first charge pump module 300 under the effect of the first control signal.

As shown in fig. 1 and 2, in some embodiments of the present invention, the multivibrator module 100 includes an inverter U1, a resistor R1, a resistor R2 and a capacitor C1, a sixth output end and a fifth input end of the inverter U1 are electrically connected, a fifth output end of the inverter U1 is electrically connected to the second input end and the first input end respectively, a first output end of the inverter U1 is electrically connected to the second output end of the inverter U1, a second output end of the inverter U1 is electrically connected to the first switching module 200, a first end of the resistor R1 is electrically connected to the sixth input end of the inverter U1, a first end of the resistor R2 is electrically connected to the fifth input end of the inverter U1, a first end of the capacitor C1 is electrically connected to the second end of the resistor R1 and the second end of the resistor R2 respectively, and a second end of the capacitor C1 is electrically connected to the fifth output end of the inverter U1.

The first input end of the inverter U1 is opposite to the first output end signal, the second input end is opposite to the second output end signal, the sixth input end is opposite to the sixth output end signal, the fifth input end is opposite to the fifth output end signal, the power supply end VDD of the inverter U1 is connected with the working power supply VDD, and the ground end VEE of the inverter U1 is grounded. When the working power supply VDD is used for supplying power to the inverter U1, an interference signal generated by instability at the power-on initial stage of the inverter U1 self-oscillates to form an oscillation source signal. The fifth output end of the phase inverter U1 is electrically connected to the first input end and the second input end respectively, the first output end of the phase inverter U1 is electrically connected to the second output end, the second output end of the phase inverter U1 is electrically connected to the first switching module 200, and after the oscillation source signal is input and amplified from the first input end and the second input end of the phase inverter U1, the first control signal is output from the first output end and the second output end to the first switching module 200.

It is worth mentioning that the utility model provides a 6 way phase inverter chips of phase inverter U1 for model CD4069, in this embodiment, only used 4 way phase inverters in these 6 way phase inverter chips, wherein 2 way phase inverters are used for producing the oscillation source signal, and 2 way phase inverters are used for enlargiing this oscillation source signal in addition with drive load. It is contemplated that, in this embodiment, the function of the multivibrator module 100 according to the embodiment of the present invention may be implemented by using 4 separate inverters, 555 integrated circuits, integrated schmitt trigger, and other circuits or devices in cooperation with peripheral components, and is not limited to the implementation using the 6-way inverter chip of the model CD4069, the resistor R1, the resistor R2, and the capacitor C1.

As shown in fig. 1 and 2, in some embodiments of the present invention, the first switching module 200 includes a transistor Q1 and a transistor Q2, the base of the transistor Q1 is electrically connected to the multivibrator module 100, the emitter of the transistor Q1 is electrically connected to the first charge pump module 300, the base of the transistor Q2 is electrically connected to the base of the transistor Q1, and the emitter of the transistor Q2 is electrically connected to the emitter of the transistor Q1.

Specifically, the base of the transistor Q1 is electrically connected to the multivibrator module 100, the emitter of the transistor Q1 is electrically connected to the first charge pump module 300, the collector of the transistor Q1 is grounded, the base of the transistor Q2 is electrically connected to the base of the transistor Q1, the emitter of the transistor Q2 is electrically connected to the emitter of the transistor Q1, and the collector of the transistor Q2 is connected to the operating power supply VDD.

When the first control signal output by the multivibrator module 100 to the first switching module 200 is positive, the base of the transistor Q1 and the base of the transistor Q2 receive positive signals, so the transistor Q1 is turned off, the transistor Q2 is turned on, the operating power VDD charges the first charge pump module 300 through the transistor Q2, and when the first control signal output by the multivibrator module 100 to the first switching module 200 is negative, the base of the transistor Q1 and the base of the transistor Q2 receive negative signals, so the transistor Q1 is turned on, the transistor Q2 is turned off, and the first charge pump module 300 discharges to ground through the transistor Q1. By such a configuration, the first switching module 200 can realize charging or discharging of the first charge pump module 300 by continuously switching the working state.

It is worth mentioning that, in the embodiment of the present invention, the transistor Q1 is a PNP transistor, and the transistor Q2 is an NPN transistor.

It can be imagined that PNP triode Q1 and NPN triode Q2 are in the embodiment of the utility model provides an effect that mainly plays the switch, consequently can replace PNP triode Q1 with switching components and parts such as P channel field effect transistor or silicon-controlled, replace NPN triode Q2 with switching components and parts such as N channel field effect transistor or silicon-controlled.

As shown in fig. 1 and fig. 2, in some embodiments of the present invention, the first charge pump module 300 includes a capacitor C3, a diode D1, a diode D2 and a capacitor C4, a first end of the capacitor C3 is electrically connected to the first switching module 200, an anode of the diode D1 is electrically connected to a second end of the capacitor C3, a first end of the capacitor C4 is electrically connected to a cathode of the diode D1, a second end of the capacitor C4 is grounded, a cathode of the diode D2 is electrically connected to a second end of the capacitor C3, and an anode of the diode D2 is grounded.

Specifically, the capacitor C3 and the capacitor C4 are both polar capacitors, an anode of the polar capacitor C3 is electrically connected to the first switching module 200, a cathode of the polar capacitor C3 is electrically connected to an anode of the diode D1 and a cathode of the diode D2, a cathode of the diode D1 is electrically connected to an anode of the polar capacitor C4, a cathode of the polar capacitor C4 is grounded, an anode of the diode D2 is grounded, and an anode of the polar capacitor C4 is a first power V + output end.

When the first switching module 200 charges the first charge pump module 300, the power output by the first switching module 200 charges the polarity capacitor C3 and charges the polarity capacitor C4 through the polarity capacitor C3 and the diode D1, and when the first switching module 200 stops charging the first charge pump module 300, the charge stored in the polarity capacitor C3 is discharged through the first switching module 200, but the voltage on the polarity capacitor C4 is constant, and the above process is repeated, so that the voltage on the polarity capacitor C4 is slowly charged to be close to the voltage output by the first switching module 100 and outputs the first power V +.

It is conceivable that, in a general case, the polar capacitor stores more energy than the nonpolar capacitor, and the polar capacitor can be adapted to an electrical appliance with a larger rated voltage, and when the rated voltage of the electrical appliance is smaller, the capacitor C3 and the capacitor C4 may be nonpolar capacitors.

As shown in fig. 3, in some embodiments of the present invention, the second switching module 400 and the second charge pump module 500 are further included, the second switching module 400 is electrically connected to the multivibrator module 100, the multivibrator module 100 controls the operating state of the second switching module 400, the second charge pump module 500 is electrically connected to the second switching module 400, and the second switching module 400 controls the second charge pump module 500 to charge or discharge.

The multivibrator module 100 and the first switching module 200 are connected to a working power supply VDD, the multivibrator module 100 is electrically connected to the first switching module 200, and outputs a first control signal to the first switching module 200, the first switching module 200 controls the on/off state of the working power supply VDD and the first charge pump module 300 according to the first control signal, the working power supply VDD charges the first charge pump module 300 in the on state, the first charge pump module 300 discharges through the first switching module 200 in the off state, and the first charge pump module 300 forms a first power supply V + lagging behind the working power supply VDD in the charging and discharging process; the second switching module 400 is connected to a working power VDD, the multivibrator module 100 is electrically connected to the second switching module 200, and outputs a second control signal to the second switching module 400, the second switching module 400 controls the on/off state of the working power VDD and the second charge pump module 500 according to the second control signal, the working power VDD charges the second charge pump module 500 in the on state, the second charge pump module 500 discharges through the second switching module 400 in the off state, and the second charge pump module 500 forms a second power V-lagging the working power VDD in the charging and discharging process. The power supply device can form two first power supply V + and second power supply V-which lag behind the working power supply VDD to supply power to the electric appliance under the environment of a single working power supply VDD, thereby realizing the delayed power-on of the electric appliance, avoiding the situation that an operational amplification module on an automobile must work under the environment of the single power supply, limiting the swing range of an output signal, attenuating low-frequency components in the signal and avoiding the situation that the operational amplifier aggravates power-on impact under the work of the single power supply to cause circuit damage.

It should be noted that the embodiment of the present invention provides a first control signal and a second control signal which can be periodic signals or non-periodic signals, under the action of the first control signal, the first switching module 200 can control the charging or discharging state of the first charge pump module 300, and under the action of the second control signal, the second switching module 400 can control the charging or discharging state of the second charge pump module 500.

For example, as shown in fig. 3 and 4, in some embodiments of the present invention, the multivibrator module 100 includes an inverter U1, a resistor R1, a resistor R2 and a capacitor C1, a sixth output terminal of the inverter U1 is electrically connected to a fifth input terminal, a fifth output terminal of the inverter U1 is electrically connected to the second input terminal and the first input terminal, a first output terminal of the inverter U1 is electrically connected to the second output terminal of the inverter U1, a second output terminal of the inverter U1 is electrically connected to the first switching module 200, a third input terminal and a fourth input terminal of the inverter U1, a third output terminal of the inverter U1 is electrically connected to the fourth output terminal of the inverter U1, a fourth output terminal of the inverter U1 is electrically connected to the second switching module 400, a first terminal of the resistor R1 is electrically connected to the sixth input terminal of the inverter U1, a first terminal of the resistor R2 is electrically connected to the fifth input terminal of the inverter U1, a first end of the capacitor C1 is electrically connected to the second end of the resistor R1 and the second end of the resistor R2, respectively, and a second end of the capacitor C1 is electrically connected to the fifth output terminal of the inverter U1.

The first input end of the inverter U1 is opposite to the first output end signal, the second input end is opposite to the second output end signal, the third input end is opposite to the third output end signal, the fourth input end is opposite to the fourth output end signal, the sixth input end is opposite to the sixth output end signal, the fifth input end is opposite to the fifth output end signal, the power supply end VDD of the inverter U1 is connected with a working power supply VDD, and the ground end VEE of the inverter U1 is grounded. When the working power supply VDD is used for supplying power to the inverter U1, an interference signal generated by instability at the power-on initial stage of the inverter U1 self-oscillates to form an oscillation source signal. The fifth output end of the phase inverter U1 is electrically connected with the first input end and the second input end respectively, the first output end of the phase inverter U1 is electrically connected with the second output end, the second output end of the phase inverter U1 is electrically connected with the first switching module 200, and after the oscillation source signal is input and amplified from the first input end and the second input end of the phase inverter U1, the first control signal is output from the first output end and the second output end to the first switching module 200; the second output end of the inverter U1 is electrically connected to the third input end and the fourth input end of the inverter U1, the third output end and the fourth output end of the inverter U1 are electrically connected, the fourth output end of the inverter U1 is electrically connected to the second switching module 400, the first control signal output from the first output end and the second output end of the inverter U1 is input to the third input end and the fourth input end of the inverter U1, the first control signal becomes the second control signal after being inverted, and the second control signal is output from the fourth output end and the third output end of the inverter U1 to the second switching module 400.

It is worth mentioning that the utility model provides a phase inverter U1 is model CD 4069's 6 way phase inverter chips, and in this embodiment, 2 way phase inverters of fifth input and sixth input are used for producing the oscillation source signal in this 6 way phase inverters, and 2 way phase inverters of first input and input 2 are used for enlargiing this oscillation source signal and export first control signal, and 2 way phase inverters of third input and fourth input are used for exporting the second control signal with first control signal antiphase. It is contemplated that, in this embodiment, the function of the multivibrator module 100 according to the embodiment of the present invention may be implemented by using 6 separate inverters, 555 integrated circuits, integrated schmitt trigger, and other circuits or devices in cooperation with peripheral components, and is not limited to the implementation using the 6-way inverter chip of the model CD4069, the resistor R1, the resistor R2, and the capacitor C1.

As shown in fig. 3 and 4, in some embodiments of the present invention, the second switching module 400 includes a transistor Q3 and a transistor Q4, the base of the transistor Q3 is electrically connected to the multivibrator module 100, the emitter of the transistor Q3 is electrically connected to the second charge pump module 300, the base of the transistor Q4 is electrically connected to the base of the transistor Q3, and the emitter of the transistor Q4 is electrically connected to the emitter of the transistor Q3.

Specifically, the base of the transistor Q3 is electrically connected to the multivibrator module 100, the emitter of the transistor Q3 is electrically connected to the second charge pump module 500, the collector of the transistor Q3 is grounded, the base of the transistor Q4 is electrically connected to the base of the transistor Q3, the emitter of the transistor Q4 is electrically connected to the emitter of the transistor Q3, and the collector of the transistor Q4 is connected to the working power supply VDD.

When the second control signal output by the multivibrator module 100 to the second switching module 400 is in reverse phase, the base of the transistor Q3 and the base of the transistor Q4 receive the reverse phase signal, so that the transistor Q3 is turned on, the transistor Q4 is turned off, and the second charge pump module 500 discharges to ground through the transistor Q3; when the second control signal output by the multivibrator module 100 to the second switching module 400 is a positive phase, the base of the transistor Q3 and the base of the transistor Q4 receive the positive phase signal, so that the transistor Q3 is turned off, the transistor Q4 is turned on, and the working power VDD is charged to the second charge pump module 500 through the transistor Q4.

It is worth mentioning that, in the embodiment of the present invention, the transistor Q3 is a PNP transistor, and the transistor Q4 is an NPN transistor.

It can be imagined that PNP triode Q3 and NPN triode Q4 are in the embodiment of the utility model provides an effect that mainly plays the switch, consequently can replace PNP triode Q3 with switching components and parts such as P channel field effect transistor or silicon-controlled, replace NPN triode Q4 with switching components and parts such as N channel field effect transistor or silicon-controlled.

As shown in fig. 3 and 4, in some embodiments of the invention, the second charge pump module 500 includes: a capacitor C5, a diode D3, a diode D4 and a capacitor C6, wherein a first end of the capacitor C5 is electrically connected to the second switching module 400, an anode of the diode D3 is electrically connected to a second end of the capacitor C5, a cathode of the diode D3 is grounded, a cathode of the diode D4 is electrically connected to a second end of the capacitor C5, a second end of the capacitor C6 is electrically connected to an anode of the diode D4, and a first end of the capacitor C6 is grounded.

Specifically, the capacitor C5 and the capacitor C6 are both polar capacitors, the anode of the polar capacitor C5 is electrically connected to the second switching module 400, the cathode of the polar capacitor C5 is electrically connected to the anode of the diode D3 and the cathode of the diode D4, the cathode of the diode D3 is grounded, the anode of the diode D4 is electrically connected to the cathode of the polar capacitor C6, the anode of the polar capacitor C6 is grounded, and the cathode of the polar capacitor C6 is a second power V-.

When the second switching module 400 charges the second charge pump module 500, the power output by the second switching module 200 charges the polarity capacitor C5, and when the second switching module 400 stops charging the second charge pump module 500, the charge stored in the polarity capacitor C5 is discharged to the ground through the second switching module 400, and simultaneously the polarity capacitor C6 is charged through the diode D4, and the above process is repeated, so that the voltage on the polarity capacitor C6 is slowly charged to be close to the absolute value of the voltage output by the second switching module 400, and the second voltage V-is output.

It is conceivable that, in a general case, the polar capacitor stores more energy than the nonpolar capacitor, the polar capacitor can be adapted to an electrical appliance with a larger rated voltage, and when the rated voltage of the electrical appliance is smaller, the capacitor C5 and the capacitor C6 may be nonpolar capacitors.

According to the utility model discloses audio equipment of second aspect embodiment, include the utility model discloses the last electric delay circuit of first aspect embodiment.

According to the utility model discloses audio equipment of second aspect embodiment, through establishing lags behind first power V + or first power V + and the second power V-of audio equipment main power, and be used for supplying power to audio equipment's operational amplification module with this first power V + or first power V + and second power V-, thereby realized going up the time delay of operational amplification module, and, to work at single power supply environment like the audio equipment in the car, can be with establishing dual supply in this single power supply environment, avoid operational amplification module work to lead to having restricted output signal's amplitude of oscillation range and having attenuated the low frequency component in the signal at single power supply environment, the power exacerbation impact has also been avoided operational amplifier under single power supply work, lead to the circuit to damage.

The power-on delay circuit of the embodiments of the present invention is described in two specific embodiments with reference to fig. 1, 2, 3 and 4, it is to be understood that the following description is only exemplary and not a specific illustration of the present invention.

The first embodiment is as follows: as shown in fig. 1 and 2, the power-up delay apparatus of the present embodiment includes a multivibrator module 100, a first switching module 200, and a first charge pump module 300. The multivibrator module 100 includes a 6-way inverter U1 (for convenience of description, hereinafter referred to as inverter U1), a resistor R1, a resistor R2, and a capacitor C1, which are of a type CD 4069; the first switching module 100 includes a PNP transistor Q1 and an NPN transistor Q2; the first charge pump 300 circuit includes a polarity capacitor C3, a diode D1, a diode D2, and a polarity capacitor C4. When the present embodiment is applied to an audio device, the present embodiment further includes an operating power supply VDD of the audio device and the first operational amplifier unit 610, where the first operational amplifier unit 610 includes an operational amplifier chip U3, a capacitor C9, a resistor R5 and a resistor R6, and the operating power supply of the first operational amplifier unit 610 is a single power supply.

The connection mode is as follows: the power supply end VDD of the inverter U1 is connected with a working power supply VDD, and the ground end VEE of the inverter U1 is grounded. By electrically connecting the first end of the resistor R1 with the sixth input end of the inverter U1, the sixth output end of the inverter U1 with the fifth input end, the first end of the resistor R2 with the fifth input end of the inverter U1, the first end of the capacitor C1 is electrically connected with the second end of the resistor R1 and the second end of the resistor R2, the second end of the capacitor C1 is electrically connected with the fifth output end of the inverter U1, the fifth output end of the inverter U1 is electrically connected with the first input end and the second input end, the first output end and the second output end of the inverter U1 are electrically connected, and the second output end of the inverter U1 is electrically connected with the base of the PNP triode Q1 and the base of the NPN triode Q2; an emitting electrode of the PNP triode Q1 is electrically connected with the positive electrode of the polar capacitor C3, a collecting electrode of the PNP triode Q1 is grounded, an emitting electrode of the NPN triode Q2 is electrically connected with an emitting electrode of the PNP triode Q1, and a collecting electrode of the NPN triode Q2 is connected with a working power supply VDD; the cathode of the polar capacitor C3 is electrically connected to the anode of the diode D1 and the cathode of the diode D2, respectively, the cathode of the diode D1 is electrically connected to the anode of the polar capacitor C4, the cathode of the polar capacitor C4 is grounded, the anode of the diode D2 is grounded, and the anode of the polar capacitor C4 is a first power supply V + output end; an audio signal is input to a positive input end 3 of an operational amplification chip U3 through a capacitor C9, a first power supply V + supplies power to a power supply end 5 of the operational amplification chip U3, 1/2 of the first power supply V + is electrically connected with a negative input end 2 of the operational amplification chip U3 through a resistor R6, a resistor R6 is electrically connected between the negative input end 2 and an output end 1 of the operational amplification chip U3, and a ground end 4 of the operational amplification chip U3 is grounded.

The working process is as follows: when the working power supply VDD supplies power to the inverter U1, an interference signal generated by instability at the power-on initial stage of the inverter U1 self-oscillates to form an oscillation source signal, the oscillation source signal is inputted from the first input terminal and the second input terminal of the inverter U1 and amplified, and then a first control signal is outputted from the first output terminal and the second output terminal to the base of the PNP transistor Q1 and the base of the NPN transistor Q2, when the first control signal is positive phase, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 receive positive phase signals, so that the PNP transistor Q1 is turned off, the transistor Q2 is turned on, the working power supply VDD charges the polar capacitor C3 and the polar capacitor C4 through the NPN transistor Q2, when the first control signal is reverse phase, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 receive reverse phase signals, so that the PNP transistor Q48 is turned on, the NPN transistor Q2, and the charge stored in the polar capacitor C3 is discharged to the ground through the PNP transistor Q596, however, the voltage on the polarity capacitor C4 is constant, and the above process is repeated, the voltage on the polarity capacitor C4 slowly charges to a voltage close to the operating power supply VDD and outputs the first power supply V +. The first power supply V + supplies power to the operational amplifier chip U3, and due to the hysteresis of the first power supply V +, the operational amplifier chip U3 is powered on slower than other circuits of the audio device, so that the phenomenon that the first operational amplifier unit 610 and a preceding circuit are powered on simultaneously to cause the power-on impact signal of the operational amplifier amplifying the preceding circuit to form noise is avoided, and the circuit is also prevented from being damaged by the power-on impact.

The second embodiment is as follows: as shown in fig. 3 and 4, the power-up delay apparatus of the present embodiment includes a multivibrator module 100, a first switching module 200, a first charge pump module 300, a second switching module 400, and a second charge pump module 500. The multivibrator module 100 includes a 6-way inverter U1 (for convenience of description, hereinafter referred to as inverter U1), a resistor R1, a resistor R2, and a capacitor C1, which are of a type CD 4069; the first switching module 100 includes a PNP transistor Q1 and an NPN transistor Q2; the first charge pump 300 circuit comprises a polar capacitor C3, a diode D1, a diode D2 and a polar capacitor C4; the second switching module 400 includes a PNP transistor Q3 and an NPN transistor Q4; the second charge pump module 500 includes a polarity capacitor C5, a diode D2, a diode D3, and a polarity capacitor C6. When the embodiment is applied to an audio device, the audio device further includes a working power supply VDD of the audio device and a second operational amplifier unit 620, the second operational amplifier unit 620 includes an operational amplifier chip U2, a capacitor C7, a capacitor C8, a resistor R3 and a resistor R4, wherein the working power supply of the second operational amplifier unit 620 is a dual power supply.

The connection mode is as follows: a power supply end VDD of the inverter U1 is connected to a working power supply VDD, a ground terminal VEE of the inverter U1 is grounded, a first end of the resistor R1 is electrically connected to a sixth input terminal of the inverter U1, a sixth output terminal of the inverter U1 is electrically connected to a fifth input terminal, a first end of the resistor R2 is electrically connected to a fifth input terminal of the inverter U1, a first end of the capacitor C1 is electrically connected to a second end of the resistor R1 and a second end of the resistor R2, a second end of the capacitor C1 is electrically connected to a fifth output terminal of the inverter U1, a fifth output terminal of the inverter U1 is electrically connected to a first input terminal and a second input terminal, a first output terminal and a second output terminal of the inverter U1 are electrically connected, a second output terminal of the inverter U1 is electrically connected to a base of the PNP triode Q1 and a base of the NPN transistor Q2, a second output terminal of the inverter U1 is electrically connected to a third input terminal and a fourth input terminal of the inverter U, the third output end and the fourth output end of the inverter U1 are electrically connected, and the fourth output end of the inverter U1 is electrically connected with the PNP triode Q3 and the NPN triode Q4 respectively; an emitting electrode of the PNP triode Q1 is electrically connected with the positive electrode of the polar capacitor C3, a collecting electrode of the PNP triode Q1 is grounded, an emitting electrode of the NPN triode Q2 is electrically connected with an emitting electrode of the PNP triode Q1, and a collecting electrode of the NPN triode Q2 is connected with a working power supply VDD; the cathode of the polar capacitor C3 is electrically connected to the anode of the diode D1 and the cathode of the diode D2, respectively, the cathode of the diode D1 is electrically connected to the anode of the polar capacitor C4, the cathode of the polar capacitor C4 is grounded, the anode of the diode D2 is grounded, and the anode of the polar capacitor C4 is a first power supply V + output end; an emitting electrode of the PNP triode Q3 is electrically connected with the positive electrode of the polar capacitor C5, an emitting electrode of the PNP triode Q3 is grounded, an emitting electrode of the NPN triode Q4 is electrically connected with an emitting electrode of the PNP triode Q3, and a collecting electrode of the NPN triode Q4 is connected with a working power supply VDD; the cathode of the polar capacitor C5 is electrically connected with the anode of the diode D3 and the cathode of the diode D4 respectively, the cathode of the diode D3 is grounded, the anode of the diode D4 is electrically connected with the cathode of the polar capacitor C6, the anode of the polar capacitor C6 is grounded, and the cathode of the polar capacitor C6 is a second power supply V-output end; an audio signal is input to a positive input end 3 of an operational amplification chip U2 through a capacitor C7, a first power supply V + supplies power to a positive power end 5 of the operational amplification chip U2, a second power supply V-supplies power to a negative power end 4 of the operational amplification chip U2, a negative input end 2 of the operational amplification chip U2 is grounded through a resistor R4, a resistor R3 is electrically connected between the negative input end 2 and an output end 1 of the operational amplification chip U2, and the capacitor C8 is connected with a resistor R3 in parallel.

The working process is as follows: when the operating power supply VDD supplies power to the inverter U1, interference signals generated by instability at the power-on initial stage of the inverter U1 self-oscillate to form oscillation source signals. After the oscillation source signal is input and amplified from the first input end and the second input end of the inverter U1, a first control signal is output from the first output end and the second output end to the base of the PNP transistor Q1 and the base of the NPN transistor Q2, a first control signal output from the first output end and the second output end of the inverter U1 is input to the third input end and the fourth input end of the inverter U1, the first control signal is inverted to become a second control signal, and the second control signal is output from the fourth output end and the third output end of the inverter U1 to the base of the PNP transistor Q3 and the base of the NPN transistor Q3. When the first control signal is positive phase, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 receive positive phase signals, so the PNP transistor Q1 is turned off, the transistor Q2 is turned on, the working power VDD charges the polar capacitor C3 and the polar capacitor C4 through the NPN transistor Q2, when the first control signal is negative phase, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 receive inverse phase signals, so the PNP transistor Q1 is turned on, the NPN transistor Q2 is turned off, charges stored in the polar capacitor C3 are discharged to the ground through the PNP transistor Q1, but the voltage on the polar capacitor C4 is constant, the above process is repeated, and the voltage on the polar capacitor C4 is slowly charged to a voltage close to the working power VDD and outputs the first power V +. When the second control signal is inverted, the base of the transistor Q3 and the base of the transistor Q4 receive inverted signals, so that the transistor Q3 is turned on, the transistor Q4 is turned off, the charge stored in the polar capacitor C5 is discharged to the ground through the second switching module 400, and simultaneously, the charge is charged to the polar capacitor C6 through the diode D4; when the second control signal is positive phase, the base of the transistor Q3 and the base of the transistor Q4 receive the positive phase signal, so the transistor Q3 is turned off, the transistor Q4 is turned on, the working power supply VDD charges the polar capacitor C5 through the transistor Q4, the above processes are repeated, the voltage on the polar capacitor C6 is slowly charged to an absolute value close to the voltage of the working power supply VDD, and the second voltage V-is output. The first power supply V + and the second power supply V-supply power to the operational amplifier chip U2, because the hysteresis of the first power supply V + and the second power supply V-, the power-up of the operational amplifier chip U2 is slower than the power-up of other circuits of the audio device, thereby avoiding the noise of the power-up impact signal of the operational amplifier amplifying pre-stage circuit caused by the simultaneous power-up of the second operational amplifier unit 620 and the pre-stage circuit, and avoiding the damage of the circuit caused by the power-up impact, and the power-up delay circuit of the embodiment establishes a double power supply lagging behind the single working power supply VDD in the environment of only the single working power supply VDD, thereby avoiding the operational amplifier chip only working in the environment of the single working power supply VDD, thereby avoiding the limitation of the swing range of the output signal and the attenuation of the low-frequency component in the signal caused by the operation of the operational amplifier module in the environment of the single power supply, and avoiding the aggravat, resulting in circuit failure.

It is worth mentioning that the 6-way inverter U1 of model CD4069 has a first input terminal of pin 1, a first output terminal of pin 2, a second input terminal of pin 3, a second output terminal of pin 4, a third input terminal of pin 5, a third output terminal of pin 6, a fourth input terminal of pin 9, a fourth output terminal of pin 8, a fifth input terminal of pin 11, a fifth output terminal of pin 10, a sixth input terminal of pin 13, a sixth output terminal of pin 12, a ground terminal VEE of pin 7, and a power supply terminal VDD of pin 14.

The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A power-on delay circuit is characterized by comprising the following components which are electrically connected in sequence:

a multivibrator module for outputting an oscillation signal;

a first switching module, the multivibrator module controlling an operating state of the first switching module;

the first charge pump module is controlled by the first switching module to charge or discharge.

2. The power-on delay circuit of claim 1, further comprising:

the second switching module is electrically connected with the multivibrator module, and the multivibrator module controls the working state of the second switching module;

and the second charge pump module is electrically connected with the second switching module, and the second switching module controls the second charge pump module to charge or discharge.

3. The power-on delay circuit of claim 2, wherein the multivibrator module comprises:

an inverter U1, wherein a sixth output terminal of the inverter U1 is electrically connected to a fifth input terminal of the inverter U1, a fifth output terminal of the inverter U1 is electrically connected to a second input terminal of the inverter U1 and a first input terminal of the inverter U1, a first output terminal of the inverter U1 is electrically connected to a second output terminal of the inverter U1, a second output terminal of the inverter U1 is electrically connected to the first switching module, a third input terminal of the inverter U1 and a fourth input terminal of the inverter U1, a third output terminal of the inverter U1 is electrically connected to a fourth output terminal of the inverter U1, and a fourth output terminal of the inverter U1 is electrically connected to the second switching module;

a resistor R1, wherein a first end of the resistor R1 is electrically connected to a sixth input end of the inverter U1;

a resistor R2, wherein a first end of the resistor R2 is electrically connected to a fifth input end of the inverter U1;

a capacitor C1, wherein a first end of the capacitor C1 is electrically connected to the second end of the resistor R1 and the second end of the resistor R2, respectively, and a second end of the capacitor C1 is electrically connected to the fifth output end of the inverter U1.

4. The power-on delay circuit of claim 2, wherein the second switching module comprises:

a transistor Q3, wherein the base of the transistor Q3 is electrically connected to the multivibrator module, and the emitter of the transistor Q3 is electrically connected to the second charge pump module;

a transistor Q4, wherein the base of the transistor Q4 is electrically connected with the base of the transistor Q3, and the emitter of the transistor Q4 is electrically connected with the emitter of the transistor Q3.

5. The power-on delay circuit of claim 2, wherein the second charge pump module comprises:

a capacitor C5, wherein a first end of the capacitor C5 is electrically connected to the second switching module;

the anode of the diode D3 is electrically connected to the second end of the capacitor C5, and the cathode of the diode D3 is grounded;

a diode D4, wherein a cathode of the diode D4 is electrically connected to the second end of the capacitor C5;

a capacitor C6, wherein a second terminal of the capacitor C6 is electrically connected to the anode of the diode D4, and a first terminal of the capacitor C6 is grounded.

6. The power-on delay circuit of claim 1, wherein the multivibrator module comprises:

the sixth output end of the inverter U1 is electrically connected to the fifth input end of the inverter U1, the fifth output end of the inverter U1 is electrically connected to the second input end of the inverter U1 and the first input end of the inverter U1, the first output end of the inverter U1 is electrically connected to the second output end of the inverter U1, and the second output end of the inverter U1 is electrically connected to the first switching module;

7. The power-on delay circuit of claim 1, wherein the first switching module comprises:

a transistor Q1, wherein the base of the transistor Q1 is electrically connected to the multivibrator module, and the emitter of the transistor Q1 is electrically connected to the first charge pump module;

a transistor Q2, wherein the base of the transistor Q2 is electrically connected with the base of the transistor Q1, and the emitter of the transistor Q2 is electrically connected with the emitter of the transistor Q1.

8. The power-on delay circuit of claim 1, wherein the first charge pump module comprises:

a capacitor C3, wherein a first end of the capacitor C3 is electrically connected with the first switching module;

the anode of the diode D1 is electrically connected to the second end of the capacitor C3;

a capacitor C4, wherein a first terminal of the capacitor C4 is electrically connected to the cathode of the diode D1, and a second terminal of the capacitor C4 is grounded;

a diode D2, a cathode of the diode D2 is electrically connected to the second end of the capacitor C3, and an anode of the diode D2 is grounded.

9. Audio device, characterized in that it comprises a power-on delay circuit according to any of claims 1 to 8.