CN212183802U - Printed circuit board - Google Patents

Printed circuit board Download PDF

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Publication number
CN212183802U
CN212183802U CN202020451906.6U CN202020451906U CN212183802U CN 212183802 U CN212183802 U CN 212183802U CN 202020451906 U CN202020451906 U CN 202020451906U CN 212183802 U CN212183802 U CN 212183802U
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layer
speed signal
printed circuit
circuit board
laser
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CN202020451906.6U
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卫文斌
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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Abstract

A printed circuit board comprising: the first layer part and the second layer part are respectively provided with a first laser hole and a second laser hole; a third layer portion stacked between the first layer portion and the second layer portion and having a mechanical hole; the first transition layer part is stacked between the first layer part and the third layer part and is provided with a third laser hole and the mechanical hole; and the second transition layer part is stacked between the second layer part and the third layer part and is provided with a fourth laser hole and the mechanical hole.

Description

Printed circuit board
Technical Field
The present application relates to a printed circuit board.
Background
In order to meet the high frequency requirement of mobile equipment, a high-density interconnection technology is usually adopted on each layer of a printed circuit board to realize the stacking of the printed circuit boards, but the high-density interconnection technology has high manufacturing cost, so that the problem that how to meet the high frequency requirement of the mobile equipment and reduce the manufacturing cost is solved at present is solved.
SUMMERY OF THE UTILITY MODEL
In view of the above, embodiments of the present application are directed to a printed circuit board, including:
the first layer part and the second layer part are respectively provided with a first laser hole and a second laser hole;
a third layer portion stacked between the first layer portion and the second layer portion and having a mechanical hole;
the first transition layer part is stacked between the first layer part and the third layer part and is provided with a third laser hole and the mechanical hole;
and the second transition layer part is stacked between the second layer part and the third layer part and is provided with a fourth laser hole and the mechanical hole.
In the above aspect, the first layer portion is disposed next to the electronic device, the second transition layer has a first high-speed signal layer, the first high-speed signal layer is a destination layer of the mechanical via, and the first high-speed signal layer is electrically connected to at least a portion of the electronic device through at least a portion of the mechanical via and at least a portion of the first laser via;
the number of the first laser holes, the second laser holes, the third laser holes, the fourth laser holes, the mechanical holes and the electronic devices is multiple; high speed signals are signals for which the printed circuit board design requires consideration of eliminating the bifurcation (Stub) of high speed signals;
in the above aspect, the first layer portion has at least one second high-speed signal layer, and the second high-speed signal layer is connected to at least a part of the electronic device through at least a part of the first laser via.
In the above solution, the second layer portion has at least one third high-speed signal layer, and the third high-speed signal layer is connected to at least one part of the electronic device through at least one part of the first laser via, at least one part of the mechanical via, and at least one part of the second laser via.
In the above solution, the first transition layer has at least one fourth high-speed signal layer, and the fourth high-speed signal layer is connected to at least one part of the electronic device through at least one part of the first laser via, at least one part of the third laser via, and at least one part of the electronic device.
In the above aspect, the third layer portion has at least one first shielding layer, the second layer portion has at least one second shielding layer, and the first high-speed signal layer is disposed between the first shielding layer and the second shielding layer.
In the foregoing solution, the second layer portion further has a fifth shielding layer, and the third high-speed signal layer is located between the fifth shielding layer and the second shielding layer.
In the above aspect, the first layer further includes a third shielding layer and a fourth shielding layer, and the second high-speed signal layer is located between the third shielding layer and the fourth shielding layer.
In the above aspect, the first layer further includes a top layer stacked above the third shielding layer, and the top layer is disposed next to the electronic device.
In the above scheme, the second layer portion further includes a bottom layer and a power supply layer stacked below the fifth shielding layer, or the bottom layer and the low-speed signal layer, or the bottom layer, the power supply layer and the low-speed signal layer, and is connected to the electronic device through at least a part of the second laser hole.
An embodiment of the present application provides a printed circuit board, including: the first layer part and the second layer part are respectively provided with a first laser hole and a second laser hole; a third layer portion stacked between the first layer portion and the second layer portion and having a mechanical hole; the first transition layer part is stacked between the first layer part and the third layer part and is provided with a third laser hole and the mechanical hole; and the second transition layer part is stacked between the second layer part and the third layer part and is provided with a fourth laser hole and the mechanical hole. Therefore, the printed circuit board manufactured by combining the laser hole and the mechanical hole can reduce the manufacturing cost of the printed circuit board while not reducing the signal transmission of the mobile equipment.
Drawings
FIG. 1 is a first schematic view of a printed circuit board according to the present application;
fig. 2 is a schematic structural diagram of an electronic device according to the present application.
Detailed Description
The technical solution of the present application is further described in detail with reference to the drawings and specific embodiments of the specification.
Fig. 1 is a schematic structural composition diagram of a printed circuit board according to the present application, and as shown in fig. 1, the printed circuit board 10 includes: a first layer portion 100, a second layer portion 200, a third layer portion 300, a first transition layer 400, and a second transition layer 500.
The first layer part 100 and the second layer part 200 are respectively provided with a first laser hole 101 and a second laser hole 201 which are formed in a laser hole-opening mode; a third layer 300 stacked between the first layer 100 and the second layer 200, the third layer 300 having a mechanical hole 301 formed by mechanical drilling;
the first transition layer 400 is stacked between the first layer 100 and the third layer 300, and has a third laser hole 401 formed by the laser drilling method and the mechanical hole 301 formed by the mechanical drilling method;
the second transition layer 500 is stacked between the second layer 200 and the third layer 300, and has a fourth laser hole 501 formed by the laser drilling method and the mechanical hole 301 formed by the mechanical drilling method.
Here, the first layer part 100, the second layer part 200, the third layer part 300, the first transition layer 400 and the second transition layer 500 may be electrically connected to an electronic device (not shown) disposed on the printed circuit board through the mechanical via and the laser via. That is, laser vias and mechanical vias described in this application are both vias that make connections from layer to layer.
For example, for a 10-ply 343+ stack up structure, the middle 4 layers may be mechanically perforated, or the entire 10 layers may be mechanically perforated. According to the printed circuit board, the printed circuit board is manufactured by using different hole opening modes and the laminated structure layout formed by the different hole opening modes, so that the manufacturing cost can be reduced while the requirement of high-speed signals is met.
For example, in the present application, the first layer portion 100 is disposed next to the electronic device, the second transition layer 500 has a first high-speed signal layer 502, and the first high-speed signal layer 502 is the destination layer of the mechanical via 301, and the first high-speed signal layer 502 is electrically connected to at least a portion of the electronic device (not shown) on the printed circuit board through at least a portion of the first laser via 101 and at least a portion of the mechanical via 301.
Here, the first high-speed signal 502 is a signal that needs to be considered to avoid the high-speed signal having (Stub) branch in the printed circuit board design, so, with the design of the printed circuit board provided in the present application, if the high-speed signal is transmitted through the first high-speed signal layer 502 on the second transition layer 500, since the fourth laser hole 501 and the mechanical hole 301 are both provided on the second transition layer 500, the requirement of transmitting the first high-speed signal through the first high-speed signal layer 502 on the second transition layer 500 can be satisfied, and the manufacturing cost of the printed circuit board can be reduced.
In this application, the first laser via 101, the second laser via 201, the third laser via 401, the fourth laser via 501, the mechanical via 301 and the electronic device may be multiple.
In the present application, the first layer portion 100 of the printed circuit board may further have at least one second high-speed signal layer 102, and the second high-speed signal layer 102 is connected to at least a portion of the electronic device on the printed circuit board through at least a portion of the first laser via 101. Thus, by providing the high-speed signal layers for transmitting high-speed signals on the first layer portion 100 and the second transition layer 500, not only can the transmission requirements of multiple paths of high-speed signals be satisfied, but also the manufacturing cost can be reduced.
Here, the second high-speed signal 102 is a signal that is considered to avoid high-speed signal (Stub) branching in the printed circuit board design,
when the first layer portion 100 has the second high-speed signal layer 102 thereon, the first layer portion 100 may further have a third shielding layer 103 and a fourth shielding layer 104 thereon, wherein the second high-speed signal layer 102 is located between the third shielding layer 103 and the fourth shielding layer 104. In this way, the signal on the second high-speed signal layer 102 can be shielded by the third shielding layer 103 and the fourth shielding layer 104 to avoid the signal from being transmitted to other layers, thereby causing a problem of signal attenuation on the second high-speed signal layer 102.
In this application, the second layer portion 200 may also have at least one third high-speed signal layer 202 thereon, and the third high-speed signal layer 202 is connected to at least one portion of the electronic device on the printed circuit board through at least one portion of the first laser via 101, at least one portion of the mechanical via 301, and at least one portion of the second laser via 201.
Here, the third high speed signal 202 is a signal that is considered to avoid high speed signal (Stub) branching in the printed circuit board design,
when the second layer portion 200 has the third high-speed signal layer 202 thereon, the second layer portion 200 also has a second shielding layer 203 and a fifth shielding layer 204 thereon, and the third high-speed signal layer 202 is located between the fifth shielding layer 204 and the second shielding layer 203. The signal on the third high-speed signal layer 202 can be shielded by the fifth shielding layer 204 and the second shielding layer 203.
In this application, the first transition layer 400 on the printed circuit board has at least one fourth high speed signal layer 402 thereon, and the fourth high speed signal layer 402 is connected to at least one part of the electronic device on the printed circuit board through at least one part of the first laser via 101, at least one part of the third laser via 401.
Here, the fourth high speed signal 402 is a signal that is considered to avoid high speed signal (Stub) branching in the printed circuit board design,
when the fourth high-speed signal layer 402 is disposed on the first transition layer 400, at least one first shielding layer 302 may be disposed on the third layer 300, wherein the fourth high-speed signal layer 402 is disposed between the first shielding layer 302 and the fourth shielding layer 104, and the first shielding layer 302 and the fourth shielding layer 104 shield signals on the fourth high-speed signal layer 402.
In this application, when the second transition layer 500 has the first high-speed signal layer 502, the first high-speed signal layer 502 is disposed between the first shielding layer 302 and the second shielding layer 203, and the signal on the first high-speed signal layer 502 can be shielded by the first shielding layer 302 and the second shielding layer 203. That is, the signals of the first high-speed signal layer 502 can be made interference-free.
In the present application, the second layer portion 200 may further include a power supply layer and/or a low-speed signal layer (not shown). When the second layer portion 200 has only a power supply layer, the power supply layer can be stacked under the fifth shielding layer 204, and the power supply layer can be used to supply power to the electronic devices on the printed circuit board.
In the present application, when only the low-speed signal layer is disposed on the second layer portion 200, the low-speed signal layer may be stacked below the fifth shielding layer 204, so that the signal on the low-speed signal layer may be shielded by the fifth shielding layer 204.
In the present application, the first layer 100 further has a top layer 105 for drawing electrical connection lines between electronic devices, and the top layer 105 is stacked on the third shielding layer 103 and disposed next to the electronic devices.
Here, the electronic devices disposed on the top layer 105 include, but are not limited to: memory, processor, thunderbolt interface, TYPE-C interface, and so forth.
In the present application, the second layer portion 200 may also have a bottom layer 205 for supporting the layers and for drawing electrical connections between the electronic devices; the bottom layer 205 is stacked under the fifth shielding layer 204 and connected to the electronic device through the second laser via 201.
This application can make things convenient for follow-up installation electronic component on printed circuit board through setting up top layer and bottom on printed circuit board, through the electric connecting wire between the component of drawing on top layer and the bottom, can clearly know the mounted position of each component.
In this application, because laser drilling is more nimble, can beat the laser hole on the board of every layer, but the mechanical hole just can not go, must be earlier several boards suppression back rethread mechanical punching mode get through. Therefore, when processing the printed circuit board, it is necessary to press several layers of boards to be mechanically punched in the middle, and then press other boards to be laid out on both sides of the mechanically punched boards.
As shown in fig. 1, the printed circuit board has an 11-layer structure, and when the printed circuit board is processed, the middle three layers (e.g., 5 th to 7 th layers) can be laminated first, and mechanical through holes are punched on the middle three layers after the lamination is finished. Then, 1 to 4 layers and 8 th to 11 th layers are laminated, respectively.
Of course, the printed circuit board is not limited to the 11-layer structure illustrated in fig. 1, but may be a 10-layer structure, a 12-layer structure, or the like. The number of layers of the board is not particularly limited, as long as high-speed signals can be distributed in a combined mode of mechanical punching and laser punching, and the problem of signal bifurcation can not be caused.
For example, when the printed circuit board has a 10-layer structure, the four intermediate layers (e.g., layers 4 to 7) may be laminated first, and mechanical vias may be punched through the 4 th to 7 th layers. Then, layers 1 to 3 and layers 8 to 10 are laminated, respectively. And laser drilling is carried out on each of the 1 st to 4 th layers and the 7 th to 10 th layers in a laser mode, and in this case, high-speed signals are distributed by using the three layers of the 3 th layer, the 5 th layer and the 7 th layer, so that the 3 th layer and the 5 th layer do not generate the signal branching problem because the 3 th layer is connected with an electric device through a laser hole, the 5 th layer is connected with the electric device through a laser hole on the 4 th layer, the 7 th layer is a target layer of a mechanical hole, and the 7 th layer is connected with the electric device through the mechanical hole and does not generate the signal branching problem either, therefore, the transmission requirement of the high-speed signals can be met in a light and thin/or small scene of a printed circuit board, and meanwhile.
In the present application, the first high-speed signal layer 502, the second high-speed signal layer 102, the third high-speed signal layer 202, and the fourth high-speed signal layer 40 all satisfy the impedance continuity condition for transmitting high-speed signals. For example, the impedance continuity condition means that the line width and the line distance of the first high-speed signal layer 502, the second high-speed signal layer 102, the third high-speed signal layer 202 and the fourth high-speed signal layer 40 are the same.
Here, the line width \ line distance may be determined again according to parameters such as thickness and area between the layers, so that the line width \ line distance between the first high-speed signal layer 502, the second high-speed signal layer 102, the third high-speed signal layer 202, and the fourth high-speed signal layer 40 is consistent. In this way, impedance continuity can be maintained when the main speed signal is transmitted between the first high-speed signal layer 502, the second high-speed signal layer 102, the third high-speed signal layer 202, and the fourth high-speed signal layer 40.
In the present application, an insulating dielectric layer (not shown) is further provided between the layers of the printed circuit board.
The latest prior art TGL platform of Intel requires the highest 4267MT/s of support X64 LPDDR4, which requires laser drilling for each layer of the printed circuit board, but this results in a very high price if laser drilling for each layer of the printed circuit board is used. The printed circuit board design structure provided by the application can meet the memory highest frequency requirement of 4267MT/s in the light and thin/or small scene of the printed circuit board, and can reduce the manufacturing cost.
The present application also provides an electronic device comprising a printed circuit board, a processor and a memory for storing a degree to which a computer can be run on the processor, wherein the processor and the memory are both disposed on the printed circuit board.
Here, the printed circuit board is specifically the printed circuit board described in fig. 1.
Fig. 2 is a schematic structural component diagram of an electronic device in the present application, and as shown in fig. 2, the electronic device 1 includes the printed circuit board 10 shown in fig. 1, a processor 20, and a memory 30 for storing a computer program capable of running on the processor 20, wherein the processor 20 and the memory 30 may be both disposed on the printed circuit board 10.
In this application, the electronic device 1 further includes: at least one network interface 40 and a user interface 50. The various components in the electronic device 1 are coupled together by a bus system 60. It will be appreciated that the bus system 60 is used to enable communications among the components of the connection. The bus system 60 includes a power bus, a control bus, and a status signal bus in addition to a data bus. For clarity of illustration, however, the various buses are labeled as bus system 60 in fig. 2.
The user interface 50 may include, among other things, a display, a keyboard, a mouse, a trackball, a click wheel, a key, a button, a touch pad, or a touch screen.
It will be appreciated that the memory 30 can be either volatile memory or nonvolatile memory, and can include both volatile and nonvolatile memory. Among them, the nonvolatile Memory may be a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read-Only Memory (EPROM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), a magnetic random access Memory (FRAM), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical disk, or a Compact Disc Read-Only Memory (CD-ROM); the magnetic surface storage may be disk storage or tape storage. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration and not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Enhanced Synchronous Dynamic Random Access Memory (Enhanced DRAM), Synchronous Dynamic Random Access Memory (SLDRAM), Direct Memory (DRmb Access), and Random Access Memory (DRAM). The memory 30 described in the embodiments of the present application is intended to comprise, without being limited to, these and any other suitable types of memory.
The memory 30 in the embodiment of the present application is used to store various types of data to support the operation of the electronic apparatus 1. Examples of such data include: any computer program for operating on the electronic device 1, such as an operating system 31 and application programs 32; contact data; telephone book data; a message; a picture; video, etc. The operating system 31 includes various system programs, such as a framework layer, a core library layer, a driver layer, and the like, for implementing various basic services and processing hardware-based tasks. The application 32 may include various applications such as a Media Player (Media Player), a Browser (Browser), etc. for implementing various application services. A program for implementing the method of the embodiment of the present application may be included in the application 32.
The method disclosed in the above embodiments of the present application may be applied to the processor 20, or implemented by the processor 20. The processor 20 may be an integrated circuit chip having signal processing capabilities. The Processor 20 may be a general purpose Processor, a Digital Signal Processor (DSP), or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. A general purpose processor may be a microprocessor or any conventional processor or the like.
In an exemplary embodiment, the electronic Device 1 may implement the execution of the corresponding signals by one or more Application Specific Integrated Circuits (ASICs), DSPs, Programmable Logic Devices (PLDs), Complex Programmable Logic Devices (CPLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, Micro Controllers (MCUs), microprocessors (microprocessors), or other electronic elements.
Here, the electronic apparatus 1 may be a notebook computer, a tablet computer, a watch, a mobile phone, a computer, a digital broadcasting terminal, an information transceiving apparatus, a game console, a tablet apparatus, a medical apparatus, a fitness apparatus, a personal digital assistant, or the like.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and the coupling, direct coupling or communication between the components shown or discussed may be through some interfaces, indirect coupling or communication between the apparatuses or units, and may be electrical, mechanical or other forms.
Features disclosed in several of the electronic device embodiments provided herein may be combined in any combination to yield new product embodiments without conflict.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A printed circuit board, comprising:
the first layer part and the second layer part are respectively provided with a first laser hole and a second laser hole;
a third layer portion stacked between the first layer portion and the second layer portion and having a mechanical hole;
the first transition layer part is stacked between the first layer part and the third layer part and is provided with a third laser hole and the mechanical hole;
and the second transition layer part is stacked between the second layer part and the third layer part and is provided with a fourth laser hole and the mechanical hole.
2. The printed circuit board of claim 1, wherein the first layer is disposed immediately adjacent to an electronic device, the second transition layer having a first high speed signal layer, the first high speed signal layer being a destination layer of the mechanical via, the first high speed signal layer being electrically connected to at least a portion of the electronic device through at least a portion of the mechanical via and at least a portion of the first laser via;
the number of the first laser holes, the second laser holes, the third laser holes, the fourth laser holes, the mechanical holes and the electronic devices is multiple; high speed signals are signals that require consideration in the printed circuit board design to eliminate the bifurcation (Stub) of the high speed signals.
3. The printed circuit board of claim 2, wherein the first layer portion has at least one second high speed signal layer, the second high speed signal layer being connected to at least a portion of the electronic device through at least a portion of the first laser via.
4. The printed circuit board of claim 2, wherein the second layer portion has at least one third high speed signal layer connected through at least a portion of the first laser via, at least a portion of the mechanical via, and at least a portion of the second laser via, and at least a portion of the electronic device.
5. The printed circuit board of claim 2, wherein the first transition layer has at least one fourth high speed signal layer connected through at least a portion of the first laser via, at least a portion of the third laser via, and at least a portion of the electronic device.
6. The printed circuit board of claim 4, wherein the third layer portion has at least one first shielding layer, the second layer portion has at least one second shielding layer, and the first high-speed signal layer is disposed between the first shielding layer and the second shielding layer.
7. The printed circuit board of claim 6, wherein the second layer portion further has a fifth shield layer, and the third high speed signal layer is located between the fifth shield layer and the second shield layer.
8. The printed circuit board of claim 3, wherein the first layer portion further has a third shield layer and a fourth shield layer, and the second high-speed signal layer is located between the third shield layer and the fourth shield layer.
9. The printed circuit board of claim 8, wherein the first layer further has a top layer overlying the third shield layer, the top layer being disposed immediately adjacent to the electronic device.
10. The printed circuit board of claim 7, wherein the second layer part further has a bottom layer and a power supply layer stacked below the fifth shielding layer, or a bottom layer and a low-speed signal layer, or a bottom layer, a power supply layer and a low-speed signal layer, and is connected to an electronic device through at least a portion of the second laser via.
CN202020451906.6U 2020-03-31 2020-03-31 Printed circuit board Active CN212183802U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020451906.6U CN212183802U (en) 2020-03-31 2020-03-31 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020451906.6U CN212183802U (en) 2020-03-31 2020-03-31 Printed circuit board

Publications (1)

Publication Number Publication Date
CN212183802U true CN212183802U (en) 2020-12-18

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Application Number Title Priority Date Filing Date
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CN (1) CN212183802U (en)

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