CN212163732U - LoraWan gateway module - Google Patents

LoraWan gateway module Download PDF

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Publication number
CN212163732U
CN212163732U CN201922477322.6U CN201922477322U CN212163732U CN 212163732 U CN212163732 U CN 212163732U CN 201922477322 U CN201922477322 U CN 201922477322U CN 212163732 U CN212163732 U CN 212163732U
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lora
radio frequency
gateway module
lorawan gateway
interface
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孙丽芳
陈宇
王学丹
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Jiangsu Xueli Information Technology Co ltd
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Jiangsu Xueli Information Technology Co ltd
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Abstract

The utility model discloses a LoRaWan gateway module includes 4 parts of MiniPCie interface, antenna interface, metallic shield cover, module core circuit and constitutes. The module core circuit comprises a Lora baseband processor, a Lora radio frequency front-end chip, a matching circuit, a power divider, a band-pass filter, a power amplifier, a low-pass filter, a low-noise amplifier, an SPDT radio frequency switch, an SPI-to-USB circuit, a switching circuit, a DC-DC power supply and the like. The LoRaWan gateway module supports two bus communication protocols of SPI/USB, supports eight channels to receive orthogonal lora wireless signals in parallel, is convenient for integrated development, and solves the problems of long research and development test and project implementation period of the LoRawan gateway caused by the problems of high technical threshold, high research and development cost and the like of the wireless communication technology industry.

Description

LoraWan gateway module
Technical Field
The utility model relates to a LoraWan gateway module.
Background
The LoRa technology is proposed by the alt corporation, combines technologies such as digital spread spectrum, digital signal processing, forward error correction coding and the like, and is suitable for application scenarios with long distance, low power consumption and low speed requirement. Compared with the traditional spread spectrum modulation technology, the LoRa technology increases the link budget and the anti-interference capability to the in-band interference, and enlarges the communication range and the robustness of the wireless communication link.
LoraWan is an open standard that defines the communication protocol for low power wan technologies based on LoRa chips. LoraWan defines the Medium Access Control (MAC) at the data link layer, maintained by the LoRa alliance. The LoraWan technology has the advantages of long distance, large capacity, interference resistance, low power consumption and the like, and is widely applied to meter reading concentrators, industrial control concentrators, safety alarm system gateways and LPWAN base station scenes.
Due to the fact that the LoraWan technology system is complex in structure, especially the performance requirement of the LoraWan gateway is high, the LoraWan gateway is difficult to develop. And because the radio frequency circuit has high design difficulty, complex debugging, few professionals and the like, the wireless communication technology industry has the problems of high technical threshold, high research and development cost and the like. In order to promote related enterprises to rapidly complete LoraWan gateway research and development tests and project implementation, the LoraWan gateway module is specially provided, wherein the LoraWan gateway module is provided with eight channels for receiving orthogonal lora wireless signals in parallel, supports two bus communication protocols of SPI/USB and is convenient to integrate and develop.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to overcome prior art's defect, provide a LoraWan gateway module.
In order to solve the technical problem, the utility model provides a following technical scheme:
the utility model discloses a LoraWan gateway module, which comprises a MiniPCIE interface, an antenna interface, a metal shielding cover and a module core circuit;
the module core circuit comprises a Lora baseband processor, and the Lora baseband processor is sequentially connected with a Lora radio frequency front-end chip, a matching circuit, a power divider, a band-pass filter, a power amplifier, a low-pass filter, a low-noise amplifier, an SPDT radio frequency switch, an SPI-to-USB circuit, a switching circuit and a DC-DC power supply; the DC-DC power supply is connected to a 5V power supply through a MiniPCie interface and then converted into a 3.3V power supply to supply power to other circuits.
Furthermore, the DC-DC power supply is composed of a single chip and is of the type AAT2603 INJ-1-T1.
Furthermore, the chip model of the Lora baseband processor is SX1301 of the liter company, eight channels are supported to receive orthogonal Lora wireless signals in parallel, and one channel sends the orthogonal Lora wireless signals in a downlink mode; the Lora baseband processor is connected to the switching circuit through the SPI interface, and the switching circuit realizes switching the corresponding pin of SPI signal connection to MiniPCie interface or is connected to SPI and changes the USB circuit.
Further, the switching circuit realizes the SPI switching function through a plurality of 0-ohm resistance welding different welding pads.
Further, the Lora baseband processor is sequentially connected with a first Lora radio frequency front-end chip, a matching circuit, a first band-pass filter, a power amplifier, a low-pass filter, an SPDT radio frequency switch and an antenna interface, and the whole components form a wireless transmission path.
Furthermore, the antenna interface is sequentially connected with the SPDT radio frequency switch, the third band-pass filter, the low-noise amplifier, the second band-pass filter, the power divider, the first and second Lora radio frequency front-end chips, and the Lora baseband processor, and the whole components form a wireless receiving path.
Furthermore, the antenna interface of the LoraWan gateway module comprises an SMA interface and an i-PEX interface, the two interfaces are universal standard antenna interfaces, and a customer can freely select the interfaces according to the requirements of self projects.
Further, the metal shielding case shape of LoraWan gateway module is the cuboid, the metal shielding case surrounds the core circuit of whole LoraWan gateway module, and cover thickness is 2 mm.
The utility model discloses the beneficial effect who reaches is:
the utility model discloses a LoraWan gateway module, the orthogonal lora radio signal is received in parallel to eight passageways, supports two kinds of bus communication agreement of SPI/USB.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a control system of the present invention;
fig. 2 is a schematic structural diagram of the metal shielding case of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are presented herein only to illustrate and explain the present invention, and not to limit the present invention.
As shown in fig. 1, the utility model provides a LoraWan gateway module includes MiniPCIe interface 1, antenna interface, metallic shield cover 3, module core circuit 4.
The module core circuit of the LoraWan gateway module comprises a Lora baseband processor, wherein the Lora baseband processor is sequentially connected with a Lora radio frequency front-end chip, a matching circuit, a power distributor, a band-pass filter, a power amplifier, a low-pass filter, a low-noise amplifier, an SPDT radio frequency switch, an SPI-to-USB circuit, a switching circuit and a DC-DC power supply. The DC-DC power supply is connected to a 5V power supply through a MiniPCie interface and then converted into a 3.3V power supply to supply power to other circuits. Preferably, the DC-DC power supply is formed by a single chip, and the model is AAT2603 INJ-1-T1.
The Lora baseband processor is preferably provided with an SX1301 of a liter company, and supports eight channels to receive orthogonal Lora wireless signals in parallel, and one channel sends the orthogonal Lora wireless signals downwards. The Lora baseband processor is connected to the switching circuit through the SPI interface, and the switching circuit realizes switching the corresponding pin of SPI signal connection to MiniPCie interface or is connected to SPI and changes the USB circuit.
The switching circuit realizes the SPI switching function by welding different welding pads through a plurality of 0 ohm resistors. For example, at this time, the SPI signal is switched to be connected to the SPI-to-USB circuit, and the signal is converted to the USB signal and connected to the corresponding pin of MiniPCIe. The user only needs the usb driver software to communicate with the Lora baseband processor.
The Lora baseband processor is sequentially connected with a first Lora radio frequency front-end chip, a matching circuit, a first band-pass filter, a power amplifier, a low-pass filter, an SPDT radio frequency switch and an antenna interface, and the whole components form a wireless transmission path. According to the LoraWan protocol specification CN 470-510 standard frequency band division, the frequency range of the transmitted wireless signal is 500 MHZ-520 MHZ. When a user needs to control the LoraWan gateway module to send a wireless signal, the user Linux host controls the Lora baseband processor to send a 500M-520 MHZ frequency band radio analog signal to the first Lora radio frequency front-end chip through the SPI/USB bus protocol, and the first Lora radio frequency front-end chip receives the radio analog signal and converts the radio analog signal into an orthogonal Lora wireless signal of a corresponding frequency band. Orthogonal lora wireless signals are transmitted to a matching circuit and a first band-pass filter, the signals are matched and filtered, the frequency of the matching circuit and the frequency of the first band-pass filter are controlled to be 500 MHZ-520 MHZ, the attenuation of the input wireless signals can be reduced to the maximum degree, and the minimum enough resolution of a chip is guaranteed. Meanwhile, the condition of overlarge harmonic waves can be avoided to the maximum degree while the emission performance is ensured by emitting signals. The orthogonal lora wireless signals are then transmitted to a power amplifier, and the signal strength is amplified to 24 ± 1dBm to satisfy the long-distance communication requirement. Then, the signal is transmitted to a low-pass filter to filter out noise waves larger than 52 OM. Then the signal is transmitted to the SPDT radio frequency switch, and the Lora baseband processor changes the connection mode according to different sending and receiving states. The signal is then transmitted to an antenna for transmission.
The antenna interface is sequentially connected with the SPDT radio frequency switch, the third band-pass filter, the low-noise amplifier, the band-pass filter 2, the power divider, the first and second Lora radio frequency front-end chips and the Lora baseband processor, and the whole parts form a wireless receiving access. According to LoraWan protocol specification CN470_510standard frequency band division, the frequency range of wireless receiving signals is 470M-490 MHZ.
Orthogonal Lora wireless signals are received through an antenna, pass through an SPDT radio frequency switch, a Lora baseband processor changes the connection mode according to different sending and receiving states, the signals are transmitted to a third band-pass filter, a low-noise amplifier and a second band-pass filter, and clutter outside 470M-490 MHZ is filtered. Then the signal is transmitted to the power divider, the signal is divided into two paths with equal power, the two paths are respectively transmitted to the first Lora radio frequency front end chip and the second Lora radio frequency front end chip, the orthogonal Lora wireless signal is converted into a radio analog signal, and the radio analog signal is transmitted to the Lora baseband processor. The Lora baseband processor can process eight channel receiving signals in parallel and send data signals to the user Linux host through the SPI/USB.
The antenna interface of the LoraWan gateway module comprises an SMA antenna interface 5 and an i-PEX antenna interface 6, the two interfaces are universal standard antenna interfaces, and customers can freely select the interfaces according to the requirements of self projects.
The metal shielding case shape of LoraWan gateway module is the cuboid, the metal shielding case surrounds the core circuit of whole LoraWan gateway module, and cover thickness is about 2 mm. And the mode of multi-point welding pads is adopted to finish welding with the module, so that the installation is simpler and more convenient, and the production and the processing are more facilitated. In performance, the maximum possibility of the metal shielding cover reduces the influence of the external environment on the module in the use process of the module, and greatly reduces the radiation influence of the radio frequency circuit of the module on the outside.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. A LoraWan gateway module is characterized by comprising a MiniPCie interface, an antenna interface, a metal shielding case and a module core circuit;
the module core circuit comprises a Lora baseband processor, a Lora radio frequency front-end chip, a matching circuit, a power divider, a band-pass filter, a power amplifier, a low-pass filter, a low-noise amplifier, an SPDT radio frequency switch, an SPI-to-USB circuit, a switching circuit and a DC-DC power supply; the DC-DC power supply is connected to a 5V power supply through a MiniPCie interface and then converted into a 3.3V power supply to supply power to other circuits;
the Lora baseband processor is sequentially connected with the first Lora radio frequency front-end chip, the matching circuit, the first band-pass filter, the power amplifier, the low-pass filter, the SPDT radio frequency switch and the antenna interface, and a wireless transmitting channel is formed;
the antenna interface is sequentially connected with the SPDT radio frequency switch, the third band-pass filter, the low-noise amplifier, the second band-pass filter, the power divider, the first Lora radio frequency front-end chip, the second Lora radio frequency front-end chip and the Lora baseband processor, and a wireless receiving access is formed.
2. The LoraWan gateway module as claimed in claim 1, wherein the DC-DC power supply is formed by a single chip, and the type of the DC-DC power supply is AAT2603 INJ-1-T1.
3. The LoraWan gateway module according to claim 1, wherein the chip type of the Lora baseband processor is SX1301 of Litter corporation, eight channels are supported to receive orthogonal Lora wireless signals in parallel, and one channel sends the orthogonal Lora wireless signals in a downlink manner;
the Lora baseband processor is connected to the switching circuit through the SPI interface, and the switching circuit realizes switching the corresponding pin of SPI signal connection to MiniPCie interface or is connected to SPI and changes the USB circuit.
4. The LoraWan gateway module according to claim 3, wherein the switching circuit implements SPI switching functionality by means of several 0 ohm resistance welds to different pads.
5. The LoraWan gateway module according to claim 1, wherein the antenna interface of the LoraWan gateway module comprises an SMA interface and an i-PEX interface, and both interfaces are universal standard antenna interfaces.
6. The LoraWan gateway module according to claim 5, wherein the metallic shield of the LoraWan gateway module is rectangular, the metallic shield encloses the core circuit of the LoraWan gateway module, and the thickness of the metallic shield is 2 mm.
CN201922477322.6U 2019-12-31 2019-12-31 LoraWan gateway module Active CN212163732U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201922477322.6U CN212163732U (en) 2019-12-31 2019-12-31 LoraWan gateway module

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Application Number Priority Date Filing Date Title
CN201922477322.6U CN212163732U (en) 2019-12-31 2019-12-31 LoraWan gateway module

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CN212163732U true CN212163732U (en) 2020-12-15

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113691274A (en) * 2021-09-07 2021-11-23 芯朴科技(上海)有限公司 Radio frequency front end module with shielding case and shielding test method thereof
CN113922838A (en) * 2021-10-20 2022-01-11 四川灵通电讯有限公司 Multi-channel LoRa gateway communication system based on SX1276/7/8 and application method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113691274A (en) * 2021-09-07 2021-11-23 芯朴科技(上海)有限公司 Radio frequency front end module with shielding case and shielding test method thereof
CN113922838A (en) * 2021-10-20 2022-01-11 四川灵通电讯有限公司 Multi-channel LoRa gateway communication system based on SX1276/7/8 and application method
CN113922838B (en) * 2021-10-20 2023-04-07 四川灵通电讯有限公司 Multi-channel LoRa gateway communication system based on SX1276/7/8 and application method

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