CN212060796U

CN212060796U - System for self-adaptively adjusting flicker degree of liquid crystal panel

Info

Publication number: CN212060796U
Application number: CN201922218547.XU
Authority: CN
Inventors: 奚杰
Original assignee: Suzhou Jieyu Electronic Co ltd
Current assignee: Suzhou Jieyu Technology Co.,Ltd.
Priority date: 2019-12-12
Filing date: 2019-12-12
Publication date: 2020-12-01
Anticipated expiration: 2029-12-12

Abstract

The utility model discloses a system for self-adaptation adjustment liquid crystal panel scintillation degree, including MCU control module and all connect on it be used for the system power supply voltage conversion module, be used for converting the data conversion module of external data format, be used for the FLASH module of storage parameter, be used for encrypting the encryption module of key program, be used for instructing the state indication screen of system state, be used for adjusting the order and write in and read the button module of data and be used for with the output interface of client PWB communication, inquiry and configuration; the MCU control module comprises an MCU, a reset circuit, a filter circuit and a clock circuit, wherein the reset circuit, the filter circuit and the clock circuit are connected to the MCU and used for resetting the MCU, the filter circuit is used for filtering power supply ripples, and the clock circuit is used for providing clock signals. The VCOM output voltage value can be quickly adjusted for the PWB, the adjusting speed is high, the operation is simple and convenient, the universality is strong, and the VCOM output voltage value adjusting device can be suitable for large-batch operation.

Description

System for self-adaptively adjusting flicker degree of liquid crystal panel

Technical Field

The utility model relates to a system, concretely relates to system of self-adaptation regulation liquid crystal panel scintillation degree.

Background

After the liquid crystal display screen is produced, the Flicker value of the liquid crystal display screen needs to be measured. During measurement, the VCOM voltage value needs to be continuously adjusted to change the Flicker value. Typically, the PWB output VCOM voltage values are divided into the following three types: 1) the signal is provided by external through TTL signal in real time; 2) the PWB-loaded Gamma chip is changed by reading VCOM setting parameters stored in the peripheral EEPROM/EPROM chip; 3) the PWB-loaded Gamma chip changes the VCOM output value by controlling the registers of the chip that generates VCOM. The general test system has complex structure and operation and cannot be well suitable for large-batch operation.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to provide a system of self-adaptation regulation liquid crystal panel scintillation degree, its can be quick carry out VCOM output voltage value's regulation to the PWB, and the governing speed is fast, and easy operation is convenient, and the commonality is strong, can be suitable for large batch operation.

In order to solve the technical problem, the utility model provides a system for self-adaptation adjustment liquid crystal display panel degree of scintillation, including MCU control module and all connect on it be used for the system power supply voltage conversion module, be used for converting the data conversion module of external data format, be used for the FLASH module of storage parameter, be used for encrypting the encryption module of key program, be used for instructing the state indication screen of system state, be used for adjusting the order and write in and read the button module of data and be used for with client PWB communication, inquiry and the output interface who disposes; the MCU control module comprises an MCU, a reset circuit, a filter circuit and a clock circuit, wherein the reset circuit, the filter circuit and the clock circuit are connected to the MCU and used for resetting the MCU, the filter circuit is used for filtering power supply ripples, and the clock circuit is used for providing clock signals.

Preferably, the data conversion module includes a conversion chip U1, the request transmitting port RTS # of the conversion chip U1 is connected to the base of a transistor Q6 after a series resistor R13, the emitter of the transistor Q6 is connected to a power supply of 3.3V, the collector of the transistor Q14 is connected to a start mode selection port BOOT0 of the MCU after a series resistor R13, the data terminal ready port DTR # of the conversion chip U1 is connected to the base of a transistor Q5 after a series resistor R12, the emitter of the transistor Q5 is connected between the request transmitting port RTS # and a resistor R13, the collector of the transistor is connected to a power supply of +3.3V after a series resistor R10, the reset port NRST of the MCU is connected between the collector of a transistor Q5 and a resistor R10 after a series diode D1, the transmitting port TXD and the receiving port RXD of the conversion chip U1 are respectively connected to a data receiving port rt2 and a TX 2 TX port of the MCU through an add-in an add-drop P2, and the data ports CH 340D + and CH 340D-of the conversion chip U1 are externally connected with USB interfaces.

Preferably, the model of the conversion chip U1 may be CH 340G.

Preferably, the KEY module includes KEY switches SW1 to SW4 and triodes Q1 to Q4, LC terminals of the KEY switches SW1 to SW4 are respectively connected in series with resistors R6 to R9 and then connected to a power supply of +3.3V, a light emitting diode RED is connected in series between the LC terminal and the L1 terminal, a light emitting diode GREEN is connected in series between the LC terminal and the L2 terminal, input terminals 2 of the KEY switches SW1 to SW4 are connected to a power supply of +3.3V, input terminals 3 are connected to GND, output terminals 1 are respectively connected to bases of the triodes Q1 to Q4 and respective L2 terminals, L1 terminals and WRITE terminals of the KEY switches SW1 to SW4 are respectively connected to collector and emitter terminals of the triodes Q1 to Q4, and L1 terminals of the KEY switches SW1 to SW4 are respectively connected to a reduction port KEY, an addition KEY INC, a WRITE KEY input port and an exit port of ESC.

Preferably, the voltage conversion module comprises conversion chips U3-U4, an input socket CN3, an input socket CN4 and a key self-locking switch SW6, the types of the conversion chips U3-U4 are MP2359, the input socket CN3 and the input socket CN4 are both connected to the conversion chip U3, and the self-locking switch SW6 is connected between the conversion chip U4 and a +5V power supply.

Preferably, a resistor R28 and a light emitting diode D4 are connected in series between the +5V power supply and GND in sequence, and a resistor R29 and a light emitting diode D5 are connected in series between the +3.3V power supply and GND in sequence.

Preferably, the FLASH module includes a FLASH chip U5, a clock port CLK of the FLASH chip U5 is connected to a synchronous clock port SPI1 SCK of the MCU, an input port of the FLASH chip U5 is connected to a master-output slave input port SPI1 MOSI of the MCU, an output port DO of the FLASH chip U5 is connected to a master-input slave output port SPI1 MISO of the MCU, and a chip select port CS # of the FLASH chip U5 is connected to a chip select port SPI1 NSS of the MCU.

Preferably, the model of the FLASH chip U5 is W25Q64 WSSIG.

Preferably, the encryption module includes an encryption chip U6, a clock port SCL of the encryption chip U6 is connected to a clock port I2C1 SCL of the MCU after being connected to a resistor R36 in series, a bidirectional data port SDA of the encryption chip U6 is connected to a clock port I2C1 SDA of the MCU after being connected to a resistor R37 in series, and the clock port SCL and the bidirectional data port SDA are both connected to a patch P4.

Preferably, the model of the MCU is STM32F103C8T6, the common ports VSSA, VSS _1 and VSS _3 of the MCU are all connected to GND, the battery voltage port VBAT, the device voltage ports VDD _1, VDD _2 and VDD _3 of the MCU are all connected to the power supply of 3.3V, the capacitor C16 is connected between the connection point of the power supplies of the device voltage ports VDD _1 and 3.3V and GND, the capacitor C9 is connected between the connection point of the power supplies of the device voltage ports VDD _2 and 3.3V and GND, and the capacitor C7 is connected between the connection point of the power supplies of the device voltage ports VDD _3 and 3.3V and GND; the reset circuit comprises a light touch switch SW5,

pins

1 and 2 of the light touch switch SW5 are connected to be a first communication group,

pins

3 and 4 are connected to be a second communication group, the second communication group is grounded, a capacitor C8 is connected between the first communication group and the second communication group, the first communication group is connected to a reset port NRST of the MCU and a 3.3V power supply, and a resistor R15 is arranged between the 3.3V power supply and the first communication group; the filter circuit comprises an inductor L1 connected in series between a power supply of 3.3V and an analog power supply port VDDA, and capacitors C14 and C15 are connected in parallel between a connection point of the inductor L1 and the analog power supply port VDDA and GND; the MCU indicator lamp comprises a resistor R23, a light emitting diode LED1 and a triode Q7 which are sequentially connected in series between a 3.3V power supply and GND, wherein the base electrode of the triode Q7 is connected with a resistor R24, and the other end of the resistor R24 is connected to a standby awakening port WKUP; the clock circuit comprises a crystal resonator Y2 and a crystal resonator Y3, wherein the crystal resonator Y2 is connected between oscillator ports OSC32_ IN and OSC32_ OUT IN series, the crystal resonator Y3 is connected between the oscillator ports OSC _ IN and OSC _ OUT IN series, capacitors C10 and C11 are connected between two ends of the crystal resonator Y2 and GND IN series respectively, and capacitors C12 and C13 are connected between two ends of the crystal resonator Y3 and GND IN series respectively.

Compared with the prior art, the beneficial effects of the utility model are that:

the utility model discloses can be quick carry out the regulation of VCOM output voltage value to the PWB, the governing speed is fast, and easy operation is convenient, and the commonality is strong, can be suitable for large batch operation.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a schematic connection diagram of the present invention;

FIG. 2 is a schematic circuit connection diagram of the MCU module;

FIG. 3 is a schematic circuit diagram of the voltage conversion module;

FIG. 4 is a schematic circuit diagram of a data conversion module;

FIG. 5 is a schematic circuit diagram of a FLASH module;

FIG. 6 is a schematic diagram of the circuit connections of the encryption module;

FIG. 7 is a schematic circuit diagram of the key module;

fig. 8 is a circuit connection diagram of the output interface.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments obtained by a person skilled in the art without any inventive work based on the embodiments of the present invention belong to the protection scope of the present invention.

Examples

Referring to fig. 1-2, the utility model discloses a system for self-adaptation adjustment liquid crystal display panel scintillation degree, including MCU control module, voltage conversion module, data conversion module, FLASH module, encryption module, status indication screen, button module and output interface.

The MCU control module:

the MCU control module comprises an MCU, a reset circuit, a filter circuit, an MCU indicator light and a clock circuit.

The model of the MCU is STM32F103C8T 6. The common ports VSSA, VSS _1 and VSS _3 of the MCU are all connected to GND. The battery voltage port VBAT, the device voltage ports VDD _1, VDD _2, and VDD _3 of the MCU are all connected to a 3.3V power supply. A capacitor C16 is connected between the GND and the connection point of the power supplies of the device voltage ports VDD _1 and 3.3V. A capacitor C9 is connected between the GND and the connection point of the power supplies of the device voltage ports VDD _2 and 3.3V. A capacitor C7 is connected between the GND and the connection point of the power supplies of the device voltage ports VDD _3 and 3.3V. The capacitors C16, C9, and C7 can filter out ripples in the power supply.

The reset circuit includes a tact switch SW 5. No. 1 and No. 2 pins of the tact switch SW5 are connected as a first communication group, and No. 3 and No. 4 pins are connected as a second communication group. The second communication group is grounded. And a capacitor C8 is connected between the first communication group and the second communication group. And the communication group is connected with the reset port NRST of the MCU and a 3.3V power supply. A resistor R15 is provided between the 3.3V power supply and the first pass group. By pressing the tact switch SW5, the reset port NRST changes from high to low, and reset is realized.

The filter circuit described above includes an inductor L1 connected in series between the 3.3V power supply and the analog power supply port VDDA. Capacitors C14 and C15 are connected in parallel between the connection point of the inductor L1 and the analog power supply port VDDA and GND. The filter circuit can filter the alternating current part in the power supply of 3.3V, reserve the direct current part, reduce the power ripple, improve MCU's stability.

The MCU indicating lamp comprises a resistor R23, a light emitting diode LED1 and a triode Q7 which are sequentially connected in series between a 3.3V power supply and GND. The base of the transistor Q7 is connected with a resistor R24. The other end of the resistor R24 is connected to the standby wake-up port WKUP. Under the normal working state, the light emitting diode LED1 flickers at regular time intervals, and if the light is on or off normally, the abnormal working of the MCU is indicated.

The clock circuit described above includes a crystal resonator Y2 connected IN series between oscillator ports OSC32_ IN and OSC32_ OUT, and a crystal resonator Y3 connected IN series between oscillator ports OSC _ IN and OSC _ OUT. Capacitors C10 and C11 are respectively connected in series between the two ends of the crystal resonator Y2 and GND. Capacitors C12 and C13 are respectively connected in series between the two ends of the crystal resonator Y3 and GND. The crystal resonator Y2 is used to generate a low-speed clock, and the crystal resonator Y3 is used to generate a high-speed clock. The capacitors C10-C13 can play a resonance function and assist the crystal oscillator to start oscillation when the capacitance of an external load in the circuit is insufficient; while filtering can be performed.

High frequency interference is filtered.

A voltage conversion module:

the voltage conversion module comprises conversion chips U3-U4, an input socket CN3, an input socket CN4 and a key self-locking switch SW 6. The conversion chips U3-U4 are MP 2359. Input socket CN3 and input socket CN4 are both connected to conversion chip U3. The latching switch SW6 is connected between the power source of the switch chip U4 and + 5V. The inductance values of the inductors L2 and L3 were both 4.7 uH. The resistances of the resistors R25, R26, R27, R30, R31 and R32 are respectively 9.53K, 100K, 49.9K, 16.2K, 100K and 49.9K. The capacitance values of the capacitors C19 and C24 are both 0.01 uF. After the input socket CN3 or the input socket CN4 is connected with an external power supply, it can provide a +5V power supply at the conversion chip U3 and a +3.3V power supply at the conversion chip U4, so as to provide an operating voltage for the components of the whole system.

As a further improvement of the utility model, a resistor R28 and a light emitting diode D4 are sequentially connected in series between the +5V power supply and the GND. A resistor R29 and a light emitting diode D5 are connected in series between the +3.3V power supply and GND in sequence. The light emitting diodes D4 and D5 can indicate the power supply operating state.

The data conversion module:

the data conversion module comprises a conversion chip U1. The request transmitting port RTS # of the conversion chip U1 is connected to the base of the transistor Q6 after the series resistor R13. An emitter of the triode Q6 is connected with a 3.3V power supply, and a collector of the triode Q6 is connected with a resistor R14 in series and then connected with a starting mode selection port BOOT0 of the MCU. The data terminal ready port DTR # of the switch chip U1 is connected to the base of the transistor Q5 after the series resistor R12. The emitter of the transistor Q5 is connected between the request transmission port RTS # and the resistor R13, and the collector is connected to the +3.3V power supply after being connected in series with the resistor R10. The reset port NRST of the MCU is connected in series with the diode D1 between the collector of the transistor Q5 and the resistor R10. The transmitting port TXD and the receiving port RXD of the conversion chip U1 are connected to the data receiving port USART2 RX and the data transmitting port USART2 TX of the MCU respectively through the patch board P2. And data ports CH 340D + and CH 340D-of the conversion chip U1 are externally connected with USB interfaces. The USB interface can be connected with a computer through a USB so as to download programs and update machine type information, and can convert TTL signals into serial port signals and perform ISP downloading.

As a further improvement of the present invention, the model of the conversion chip U1 may be CH 340G.

A FLASH module:

the FLASH module comprises a FLASH chip U5. The clock port CLK of the FLASH chip U5 is connected to the synchronous clock port SPI1 SCK of the MCU. The input port of the FLASH chip U5 is connected to the master output slave input port SPI1 MOSI of the MCU. The output port DO of the FLASH chip U5 is connected to the master input slave output port SPI1 MISO of the MCU. And the chip selection port CS # of the FLASH chip U5 is connected with the chip selection port SPI1 NSS of the MCU. Which is able to store and make calls to some parameters involved in the program.

As a further improvement of the utility model, the model of the FLASH chip U5 is W25Q64 WSSIG.

An encryption module:

the encryption module comprises an encryption chip U6. The clock port SCL of the encryption chip U6 is connected to the clock port I2C1 SCL of the MCU after the resistor R36 is connected in series. The bidirectional data port SDA of the encryption chip U6 is connected to the clock port I2C1 SDA of the MCU after the resistor R37 is connected in series. A patch board P4 is connected to both the clock port SCL and the bidirectional data port SDA. The system can be encrypted, and key programs can be stored to prevent the system from being copied.

A status indication screen:

the state indication screen is connected to the MCU. Which can indicate the status of the system.

A key module:

the key module comprises key switches SW 1-SW 4 and triodes Q1-Q4. LC terminals of the key switches SW 1-SW 4 are connected in series with resistors R6-R9 and then connected to a +3.3V power supply. The LED RED is connected in series between the LC terminal and the terminal L1, and the LED GREEN is connected in series between the LC terminal and the terminal L2. The input ends 2 of the key switches SW 1-SW 4 are all connected to a +3.3V power supply, the input ends 3 are all connected to GND, and the output ends 1 are respectively connected to the bases of the triodes Q1-Q4 and the respective ends L2. The L1 ends and GND ends of the key switches SW 1-SW 4 are respectively connected with the collector and the emitter of the triodes Q1-Q4. The L1 ends of the KEY switches SW 1-SW 4 are respectively connected to the decrease port KEY DEC, the increase port KEY INC, the write port KEYWRITE and the exit port KEY ESC of the MCU. Which can control the MCU to perform order reduction, order increase, write and read data, and exit, respectively.

An output interface:

the output interface includes output socket CN 2. The output socket CN2 is connected to the bidirectional data port SDA2 and the clock port SCL2H of the MCU. The output interface can communicate with relevant modules of the client PWB, and can be queried and configured.

As a further improvement of the utility model, the output socket CN2 has a PH 2.0-6.

The embodiment needs to be supplemented with that: the utility model discloses constitute by concrete hardware structures such as MCU, FLASH module, encryption module, some hardware have the participation of software program in the operation process, and the software program of supplementary local operation is current software program that can duplicate, does not constitute the innovation point of this application.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A system for self-adaptively adjusting the flicker degree of a liquid crystal panel is characterized by comprising an MCU control module, a voltage conversion module, a data conversion module, a FLASH module, an encryption module, a state indication screen, a key module and an output interface, wherein the voltage conversion module, the data conversion module, the FLASH module, the encryption module, the state indication screen, the key module and the output interface are connected to the MCU control module and are used for supplying power to the system;

the MCU control module comprises an MCU, a reset circuit, a filter circuit and a clock circuit, wherein the reset circuit, the filter circuit and the clock circuit are connected to the MCU and used for resetting the MCU, the filter circuit is used for filtering power supply ripples, and the clock circuit is used for providing clock signals.

2. The system for adaptively adjusting a flicker level of a liquid crystal panel according to claim 1, wherein the data conversion module comprises a conversion chip U1, the request transmitting port RTS # of the conversion chip U1 is connected to a base of a transistor Q6 after being connected to a series resistor R13, an emitter of the transistor Q6 is connected to a power supply of 3.3V, a collector of a series resistor R14 is connected to a start mode selection port BOOT0 of the MCU, the data terminal ready port DTR # of the conversion chip U1 is connected to a base of a transistor Q5 after being connected to the series resistor R12, an emitter of the transistor Q5 is connected between the request transmitting port RTS # and a resistor R13, a collector of the series resistor R10 is connected to a power supply of +3.3V, a reset port NRST of the MCU is connected between a collector of the transistor Q5 and a resistor R10 after being connected to a series diode D1, a transmitting port RTS D and a receiving port RXD of the conversion chip U1 are respectively connected to a USART2 through a data receiving port R2 RX and data transmitting end USART2 TX, data ports CH 340D + and CH 340D-of the conversion chip U1 are connected with USB interfaces externally.

3. The system for adaptively adjusting the flicker degree of a liquid crystal panel according to claim 2, wherein the model of the conversion chip U1 is CH 340G.

4. The system for adaptively adjusting the flicker degree of a liquid crystal panel as claimed in claim 1, wherein the KEY module comprises KEY switches SW1 to SW4 and triodes Q1 to Q4, LC terminals of the KEY switches SW1 to SW4 are respectively connected to a +3.3V power supply after being respectively connected in series with resistors R6 to R9, led RED is connected in series between the LC terminal and L1 terminal, led GREEN is connected in series between the LC terminal and L2 terminal, input terminals 2 of the KEY switches SW1 to SW4 are respectively connected to a +3.3V power supply, input terminals 3 are respectively connected to GND, output terminals 1 are respectively connected to bases of the triodes Q1 to Q4 and respective L2 terminals, L1 terminals and GND of the KEY switches SW1 to SW4 and MCU are respectively connected to collectors and emitters of the triodes Q1 to Q4, and L599 terminals of the KEY switches SW1 to SW4 are respectively connected to a DEC port for reducing the number of KEYs, and increasing the number of the ports of the KEYs Q599 and increasing the number of the KEYs y, Write port KEYWRITE and exit port KEY ESC.

5. The system for adaptively adjusting the flicker degree of a liquid crystal panel as claimed in claim 1, wherein the voltage conversion module comprises conversion chips U3-U4, an input socket CN3, an input socket CN4 and a key self-locking switch SW6, the types of the conversion chips U3-U4 are MP2359, the input socket CN3 and the input socket CN4 are both connected to a conversion chip U3, and the self-locking switch SW6 is connected between the conversion chip U4 and a +5V power supply.

6. The system for adaptively adjusting the flicker degree of a liquid crystal panel according to claim 5, wherein a resistor R28 and a light emitting diode D4 are sequentially connected in series between the +5V power supply and GND, and a resistor R29 and a light emitting diode D5 are sequentially connected in series between the +3.3V power supply and GND.

7. The system for adaptively adjusting the flicker degree of a liquid crystal panel according to claim 1, wherein the FLASH module comprises a FLASH chip U5, a clock port CLK of the FLASH chip U5 is connected to a synchronous clock port SPI1 SCK of the MCU, an input port of the FLASH chip U5 is connected to a master output slave input port SPI1 MOSI of the MCU, an output port DO of the FLASH chip U5 is connected to a master input slave output port SPI1 MISO of the MCU, and a chip select port CS # of the FLASH chip U5 is connected to a chip select port SPI1 NSS of the MCU.

8. The system for adaptively adjusting the flicker degree of a liquid crystal panel according to claim 7, wherein the FLASH chip U5 is of a type W25Q64 WSSIG.

9. The system for adaptively adjusting the flicker degree of a liquid crystal panel according to claim 1, wherein the encryption module comprises an encryption chip U6, the clock port SCL of the encryption chip U6 is connected to the clock port I2C1 SCL of the MCU after being connected with a resistor R36 in series, the bidirectional data port SDA of the encryption chip U6 is connected to the clock port I2C1 SDA of the MCU after being connected with a resistor R37 in series, and both the clock port SCL and the bidirectional data port SDA are connected with a pin-and-socket P4.

10. The system for adaptively adjusting the flicker degree of a liquid crystal panel as claimed in claim 1, wherein the model of the MCU is STM32F103C8T6, the common ports VSSA, VSS _1 and VSS _3 of the MCU are all connected to GND, the battery voltage port VBAT, the device voltage ports VDD _1, VDD _2 and VDD _3 of the MCU are all connected to a power supply of 3.3V, a capacitor C16 is connected between the connection point of the power supplies of the device voltage ports VDD _1 and 3.3V and GND, a capacitor C9 is connected between the connection point of the power supplies of the device voltage ports VDD _2 and 3.3V and GND, and a capacitor C7 is connected between the connection point of the power supplies of the device voltage ports VDD _3 and 3.3V and GND; the reset circuit comprises a light touch switch SW5, pins 1 and 2 of the light touch switch SW5 are connected to be a first communication group, pins 3 and 4 are connected to be a second communication group, the second communication group is grounded, a capacitor C8 is connected between the first communication group and the second communication group, the first communication group is connected to a reset port NRST of the MCU and a 3.3V power supply, and a resistor R15 is arranged between the 3.3V power supply and the first communication group; the filter circuit comprises an inductor L1 connected in series between a power supply of 3.3V and an analog power supply port VDDA, and capacitors C14 and C15 are connected in parallel between a connection point of the inductor L1 and the analog power supply port VDDA and GND; the MCU indicator lamp comprises a resistor R23, a light emitting diode LED1 and a triode Q7 which are sequentially connected in series between a 3.3V power supply and GND, wherein the base electrode of the triode Q7 is connected with a resistor R24, and the other end of the resistor R24 is connected to a standby awakening port WKUP; the clock circuit comprises a crystal resonator Y2 and a crystal resonator Y3, wherein the crystal resonator Y2 is connected between oscillator ports OSC32_ IN and OSC32_ OUT IN series, the crystal resonator Y3 is connected between the oscillator ports OSC _ IN and OSC _ OUT IN series, capacitors C10 and C11 are connected between two ends of the crystal resonator Y2 and GND IN series respectively, and capacitors C12 and C13 are connected between two ends of the crystal resonator Y3 and GND IN series respectively.