CN212034107U

CN212034107U - Superspeed differential signal isolation circuit

Info

Publication number: CN212034107U
Application number: CN202021161900.1U
Authority: CN
Inventors: 华麟; 黎祥松; 柳晶津; 何欣原
Original assignee: Guangdong Haiwu Technology Co Ltd
Current assignee: Guangdong Haiwu Technology Co Ltd
Priority date: 2020-06-19
Filing date: 2020-06-19
Publication date: 2020-11-27
Anticipated expiration: 2030-06-19

Abstract

The utility model relates to an ultra-high speed differential signal isolation circuit, including difference commentaries on classics TTL module U2, difference commentaries on classics TTL module U4, TTL commentaries on classics difference module U1, TTL commentaries on classics difference module U3 and magnetism isolation module, magnetism isolation module has two way magnetism isolation channel, difference commentaries on classics TTL module U2's output connects to the input foot of one of them way magnetism isolation channel, TTL commentaries on classics difference module U1's input connects to the output foot of this way magnetism isolation channel; the output end of the differential TTL conversion module U4 is connected to the input pin of the other magnetic isolation channel, and the input end of the TTL conversion differential module U1 is connected to the output pin of the magnetic isolation channel. The utility model discloses be used for realizing under the hypervelocity differential transmission, effectively ensure the electromagnetism and keep apart.

Description

Superspeed differential signal isolation circuit

Technical Field

The utility model relates to a signal isolation field especially relates to an hypervelocity difference signal isolation circuit.

Background

Existing signal isolation schemes can be divided into the following:

1. universal passive isolator

For example, the passive 485 isolator belongs to a more classical differential isolation product, specifically adopts an on-line electricity stealing technology, does not need an external power supply, is convenient to install, can meet the situation that the requirement on general communication speed is not high, and has an isolation mode of photoelectric isolation.

For a general passive isolator, the biggest weakness is weak driving capability and slow communication speed, and the highest speed is more than 100 KBPS as can be known by looking up a manual of the passive 485 isolator, and the scheme is enough to be used in the occasions with low general communication speed requirements and only one to two nodes, but cannot be used in special occasions of high-speed and strong-interference isolation application such as frequency conversion debugging and the like.

2. Active isolation module

This type of module needs external power supply, and the driving force is strong, and the comparison of generally protecting all doing is better, for the in service behavior under the adverse conditions of satisfying, all is equipped with anti-surge protection circuit, nevertheless the price is not very. In addition, the communication speed can be very high from several to hundreds of megabytes due to the fact that the communication device is internally provided with a processor and a complex conversion circuit, the communication device is generally used as a collector in a laboratory, and is also used as a repeater when long-line transmission is carried out.

For an active isolation module, the module has two disadvantages, one is high price and not suitable for batch use, and the other is high reliability without a pure hardware isolation circuit in a strong electromagnetic environment, and for an application occasion with strong electromagnetic interference and high speed, an internal chip has a risk of working abnormity, and a certain time delay is caused by the need of data processing and conversion.

3. Universal TTL differential module

Such modules are most commonly used, and are generally integrated with a motherboard and rarely used alone, and such modules do not implement a differential isolation function.

The scheme can not meet the requirements in special occasions of strong electromagnetic interference occasions requiring ultrahigh-speed differential transmission and data eavesdropping, such as data eavesdropping and diagnosis monitoring occasions during variable-frequency drive debugging, and the cost of the optical fiber communication mode is too high, so that a novel ultrahigh-speed differential signal isolation circuit needs to be designed on the basis.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a solve the weak point among the prior art, and provide a hypervelocity differential signal isolating circuit for realize under the hypervelocity differential transmission, effectively ensure the electromagnetism and keep apart.

The ultrahigh-speed differential signal isolation circuit comprises a differential TTL conversion module U2, a differential TTL conversion module U4, a TTL conversion differential module U1, a TTL conversion differential module U3 and a magnetic isolation module, wherein the magnetic isolation module is provided with two magnetic isolation channels, the output end of the differential TTL conversion module U2 is connected to the input pin of one magnetic isolation channel, and the input end of the TTL conversion differential module U1 is connected to the output pin of the magnetic isolation channel; the output end of the differential TTL conversion module U4 is connected to the input pin of the other magnetic isolation channel, and the input end of the TTL conversion differential module U1 is connected to the output pin of the magnetic isolation channel.

Further, the TTL differential module U1 and the differential TTL module U4 obtain a power supply voltage VCC1, and the differential TTL module U2 and the TTL differential module U3 obtain another power supply voltage VCC 2.

Further, the circuit comprises a voltage stabilizing circuit used for stabilizing the power supply voltage VCC1 into a power supply voltage VCC2 and supplying power to the magnetic isolation chip, the TTL differential conversion module and the differential TTL conversion module.

Furthermore, the circuit structures of the differential to TTL module U2 and the differential to TTL module U4 are the same.

Furthermore, the differential TTL conversion module and the TTL conversion differential module are 485 communication circuits.

Furthermore, the differential TTL conversion module is provided with a 485 chip, a resistor R10, a resistor R11, a resistor R12, a bidirectional voltage-stabilizing tube and two signal input terminals, a pin A and a pin B of the 485 chip are respectively connected to the two signal input terminals through the resistor R11 and the resistor R10, the two signal input terminals are connected through the bidirectional voltage-stabilizing tube, pins RE and DE of the 485 chip are connected together and then connected to the ground through the resistor R12, and a pin RO of the 485 chip is used as an output end of the differential TTL conversion module.

Further, a pin A and a pin B of the 485 chip are respectively connected with a pull-up resistor and a pull-down resistor.

Furthermore, the TTL differential conversion module is provided with a 485 chip, a resistor R6, a resistor R8, a resistor R4, a bidirectional voltage-stabilizing tube and two signal output terminals, a pin A and a pin B of the 485 chip are respectively connected to the two signal output terminals through the resistor R6 and the resistor R4, the two signal output terminals are connected through the bidirectional voltage-stabilizing tube, pins RE and DE of the 485 chip are connected together and then connected to corresponding power supply voltage through the resistor R8, and a pin DI of the 485 chip is used as an input end of the TTL differential conversion module.

Further, the magnetic isolation module is specifically a magnetic isolation chip U11, an output end of the differential to TTL module U2 is connected to an INT1 pin of the magnetic isolation chip U11, an input end of the TTL to differential module U1 is connected to an OUT1 pin of the magnetic isolation chip U11, an INT2 pin of the high-speed magnetic isolation chip U11 at an output end of the differential to TTL module U4, and an input end of the TTL to differential module U3 is connected to an OUT2 pin of the magnetic isolation chip U11.

Has the advantages that:

1. u2 and U3 are isolated sides, U4 and U1 are isolated sides, and the magnetic isolation module is used for isolating TTL signals at two sides to ensure effective electromagnetic isolation;

2. u1 and U2 form a half-duplex communication loop for data transmission from left to right, and U3 and U4 form another half-duplex communication loop for data transmission from right to left, so that a full-duplex ultra-high speed differential isolation circuit is completed, and ultra-high speed differential transmission is realized.

The above description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the present invention is given.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 is a schematic circuit structure diagram of a differential to TTL module according to the present invention;

fig. 2 is a schematic circuit diagram of the TTL differential module of the present invention;

fig. 3 is a schematic circuit diagram of the magnetic isolation chip of the present invention;

fig. 4 is a schematic diagram of the circuit structure of the isolated power circuit of the present invention.

Detailed Description

In order to make the technical problem, technical solution and advantageous effects solved by the present invention more clearly understood, the following embodiments and drawings are combined to further explain the present invention in detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The ultra-high speed differential signal isolation circuit of the embodiment comprises, in a hardware level: two groups of differential to TTL modules as shown in fig. 1, two groups of TTL to differential modules as shown in fig. 2, one group of magnetic isolation modules as shown in fig. 3, and one isolated power circuit as shown in fig. 4.

The two differential to TTL modules have the same circuit structure, and are numbered as U2 and U4 for convenience of distinction, and take U2 as an example, the circuit structure is shown in fig. 1, the core of the differential to TTL module is a high-speed 485 chip, pin A, B of the 485 chip is connected to a pull-down resistor, and is connected to two signal input terminals through resistors R11 and R10, the two signal input terminals are connected through a bidirectional voltage regulator tube, pins RE and DE of the high-speed 485 chip are connected together and then connected to the ground through a resistor R12, and pin RO of the high-speed 485 chip is used as an output terminal.

Similarly, the two groups of TTL differential modules have the same circuit structure, and are respectively numbered as U1 and U3, for example, U1, as shown in fig. 2, the core is also a high-speed 485 chip, pin A, B of the 485 chip is connected to two signal output terminals through resistors R6 and R4, the two signal output terminals are connected through a bidirectional voltage regulator tube, pins RE and DE of the high-speed 485 chip are connected together and then connected to VCC through a resistor R8, and pin DI of the high-speed 485 chip is used as an input terminal.

In this embodiment, there are two types of VCC, namely VCC1 and VCC2 with different voltages, among which U1 and U4 take power from VCC1, and U2 and U3 take power from VCC 2.

In the above, the highest communication speed of the 485 chip is a bottleneck of the whole isolation circuit, and generally, the highest allowable communication speed of the chip is at least 1.2 times higher than the actual requirement.

Referring to fig. 3, the magnetic isolation module is a high-speed magnetic isolation chip U11, the output terminal of the differential TTL conversion module U2 is connected to the INT1 pin of the high-speed magnetic isolation chip U11, the input terminal of the TTL conversion differential module U1 is connected to the OUT1 pin of the high-speed magnetic isolation chip U11, the output terminal of the differential TTL conversion module U4 is connected to the INT2 pin of the high-speed magnetic isolation chip U11, and the input terminal of the TTL conversion differential module U3 is connected to the OUT2 pin of the high-speed magnetic isolation chip U11, then:

1. u2 and U3 are isolated sides, U4 and U1 are isolated sides, and U11 is a magnetic isolation chip and is used for isolating TTL signals at two sides and ensuring effective electromagnetic isolation;

2. u1 and U2 form a semi-duplex communication loop for data transmission from left to right, and U3 and U4 form another semi-duplex communication loop for data transmission from right to left, so that a full-duplex differential isolation circuit is completed, and the transmission rate of the whole circuit is determined by the highest allowed transmission rate of the magnetic isolation chip and the 485 communication chip.

The ultra-high speed differential signal isolation circuit of the present embodiment has the following advantages:

1. the system adopts pure hardware and modular design, avoids time delay caused by data processing and conversion, has strong universality and high cost performance, is more suitable for batch compared with an active isolation module, and can improve the communication rate to a high level compared with a general passive isolator under the condition of low cost increase;

2. by using a magnetic isolation chip with mature technology, under the condition of meeting the same transmission rate, the design target can be completed with the cost of only 10 to 20 percent of the active isolation module;

3. by using a 485 chip, the communication speed can reach more than 1M;

4. the full-duplex symmetrical design is realized, and if the actual use needs, only a signal interlocking circuit needs to be added;

5. the method is suitable for special occasions requiring ultrahigh-speed differential isolation transmission and strong electromagnetic interference occasions for eavesdropping data, suitable for data monitoring occasions requiring ultrahigh-speed differential isolation transmission and high real-time requirements, and suitable for occasions requiring ultrahigh-speed differential isolation transmission and repeaters.

Further, as shown in fig. 4, the isolation power supply circuit is composed of a voltage regulator circuit, and is configured to regulate VCC1 to VCC2, so as to supply power to the magnetic isolation chip, the TTL differential module, and the differential TTL module.

It should be noted that, in this embodiment, TTL level isolation of the communication signal is not limited to the magnetic isolation chip, and other magnetic isolation modules such as a high-speed optocoupler may also be used instead.

It should be finally noted that the above embodiments are only intended to illustrate the technical solution of the present invention and not to limit the scope of the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced with other equivalents without departing from the spirit and scope of the technical solution of the present invention.

Claims

1. An ultra-high speed differential signal isolation circuit, comprising:

comprises a differential to TTL module U2, a differential to TTL module U4, a TTL to differential module U1, a TTL to differential module U3 and a magnetic isolation module,

the magnetic isolation module is provided with two magnetic isolation channels, the output end of the differential TTL conversion module U2 is connected to the input pin of one magnetic isolation channel, and the input end of the TTL conversion differential module U1 is connected to the output pin of the magnetic isolation channel;

the output end of the differential TTL conversion module U4 is connected to the input pin of the other magnetic isolation channel, and the input end of the TTL conversion differential module U1 is connected to the output pin of the magnetic isolation channel.

2. The ultra high speed differential signal isolation circuit of claim 1, wherein: the TTL differential conversion module U1 and the differential conversion TTL module U4 obtain power supply self-powered voltage VCC1, and the differential conversion TTL module U2 and the TTL differential conversion module U3 obtain power supply from another power supply voltage VCC 2.

3. The ultra high speed differential signal isolation circuit of claim 2, wherein: the circuit also comprises a voltage stabilizing circuit which is used for stabilizing the power supply voltage VCC1 into a power supply voltage VCC2 and supplying power to the magnetic isolation chip, the TTL differential conversion module and the differential conversion TTL module.

4. The ultra high speed differential signal isolation circuit of claim 1, wherein: the circuit structures of the differential to TTL module U2 and the differential to TTL module U4 are the same.

5. An ultra high speed differential signal isolation circuit according to claim 1 or 2, wherein: the differential TTL conversion module and the TTL conversion differential module are 485 communication circuits.

6. The ultra high speed differential signal isolation circuit of claim 5, wherein: the difference changes TTL module to be equipped with 485 chips, resistance R10, resistance R11, resistance R12, two-way stabilivolt, two signal input terminals, 485 chips ' A foot, B foot are connected to two signal input terminals through resistance R11, resistance R10 respectively, meet through two-way stabilivolt between two signal input terminals, 485 chips ' RE, DE foot connect together after resistance R12 connect to ground, 485 chips ' RO foot is as the output terminal that the difference changes TTL module.

7. The ultra high speed differential signal isolation circuit of claim 6, wherein: a pin A and a pin B of the 485 chip are respectively connected with an upper pull-up resistor and a lower pull-down resistor.

8. The ultra high speed differential signal isolation circuit of claim 5, wherein: the TTL differential conversion module is provided with a 485 chip, a resistor R6, a resistor R8, a resistor R4, a bidirectional voltage regulator tube and two signal output terminals, a pin A and a pin B of the 485 chip are respectively connected to the two signal output terminals through the resistor R6 and the resistor R4, the two signal output terminals are connected through the bidirectional voltage regulator tube, pins RE and DE of the 485 chip are connected together and then connected to corresponding power supply voltage through the resistor R8, and a pin DI of the 485 chip is used as an input end of the TTL differential conversion module.

9. The ultra high speed differential signal isolation circuit of claim 8, wherein: a pin A and a pin B of the 485 chip are respectively connected with an upper pull-up resistor and a lower pull-down resistor.

10. The ultra-high speed differential signal isolation circuit as claimed in claim 1, wherein the magnetic isolation module is a magnetic isolation chip U11, an output terminal of the differential TTL conversion module U2 is connected to an INT1 pin of the magnetic isolation chip U11, an input terminal of the TTL conversion differential module U1 is connected to an OUT1 pin of the magnetic isolation chip U11, an INT2 pin of the high speed magnetic isolation chip U11 at an output terminal of the differential TTL conversion module U4, and an input terminal of the TTL conversion differential module U3 is connected to an OUT2 pin of the magnetic isolation chip U11.