CN212012608U - Frequency signal conversion circuit and electronic device - Google Patents
Frequency signal conversion circuit and electronic device Download PDFInfo
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- CN212012608U CN212012608U CN202020662247.0U CN202020662247U CN212012608U CN 212012608 U CN212012608 U CN 212012608U CN 202020662247 U CN202020662247 U CN 202020662247U CN 212012608 U CN212012608 U CN 212012608U
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Abstract
The utility model provides a frequency signal converting circuit, including input and output, the input is used for inputing first frequency signal, the output is used for exporting the second frequency signal after changing, be provided with first divider circuit between output and the ground, frequency signal converting circuit still includes controllable switch and decoupling capacitor, controllable switch sets up between the first end of the divider point of first divider circuit and decoupling capacitor, decoupling capacitor's second end ground connection, the input is connected with controllable switch's control end, decoupling capacitor's first end is for measuring the acquisition point. The utility model also provides an electron device. The utility model provides a frequency signal conversion circuit and an electronic device, which are provided with a controllable switch, and eliminate the influence of the low-level section of each period of the frequency signal on the frequency signal detection; the delay circuit is arranged, so that the influence of overshoot or interference on the detection of the frequency signal caused by the rising edge of the frequency signal is eliminated, and the detection precision of the frequency signal is ensured.
Description
Technical Field
The utility model relates to an automotive filed, concretely relates to frequency signal converting circuit and electron device.
Background
For the detection of the PWM signal, it is general to detect a value of a high level of the PWM signal.
As shown in fig. 1, the input terminal PI of the PWM signal conversion circuit is used for inputting a PWM1 signal (a first frequency signal) from the controller, T denotes the conversion circuit, and the output terminal PO is used for outputting a converted PWM2 signal (a second frequency signal). A first voltage division circuit is arranged between the output end PO and the ground, a decoupling capacitor C1 is connected between the voltage division point of the first voltage division circuit and the ground in parallel, and the decoupling capacitor C1 is used for stabilizing voltage.
When the PWM signal is detected, the voltage of the connection point between the decoupling capacitor C1 and the voltage dividing point is collected and detected.
However, each period of the PWM signal has a low level segment and the rising edge of the PWM signal may be overshot or interfered, as shown in fig. 2, the voltage value of the voltage division point may fluctuate accordingly, which causes inaccuracy of the detected data, and thus the measurement method cannot ensure the accuracy of the high level detection of the PWM signal.
Disclosure of Invention
Aiming at the problems existing in the prior art, the utility model aims to solve the problem of providing a frequency signal conversion circuit, which is provided with a controllable switch, and eliminates the influence of the low-level section of each period of the frequency signal on the detection of the frequency signal; the delay circuit is arranged, so that the influence of overshoot or interference on the detection of the frequency signal caused by the rising edge of the frequency signal is eliminated, and the detection precision of the frequency signal is ensured.
An aspect of the utility model provides a frequency signal converting circuit, including input and output, the input is used for inputing first frequency signal, the output is used for exporting the second frequency signal after changing, be provided with first divider circuit between output and the ground, frequency signal converting circuit still includes controllable switch and decoupling capacitor, controllable switch sets up between the first end of the divider point of first divider circuit and decoupling capacitor, decoupling capacitor's second end ground connection, the input is connected with controllable switch's control end, decoupling capacitor's first end is for measuring the acquisition point.
A controllable switch is arranged between the voltage dividing point of the first voltage dividing circuit and the first end of the decoupling capacitor, and the controllable switch is disconnected in the low-level section of each period of the PWM signal, namely the measurement acquisition point is disconnected with the voltage dividing point, so that the voltage drop of the voltage dividing point is prevented from influencing the frequency signal detection, and the detection precision is ensured.
The utility model discloses an on the other hand provides a frequency signal converting circuit, and frequency signal converting circuit still includes delay circuit, and delay circuit sets up between input and controllable switch's control end, and delay circuit is used for delaying to input frequency signal.
When the rising edge of the frequency signal is possibly overshot or interfered, the controllable switch is not switched on immediately due to the existence of the delay circuit, but is switched on after delay, the controllable switch is still in a switched-off state at the moment, voltage fluctuation of a voltage dividing point caused by overshooting or interference cannot influence the voltage of a measuring and collecting point, and therefore the influence of overshooting or interference on frequency signal detection is avoided, and the detection precision is guaranteed.
Another aspect of the present invention provides an electronic device, including a housing and a PCB disposed in the housing, the PCB is provided with the frequency signal converting circuit.
Compared with the prior art, the utility model provides a frequency signal converting circuit and electron device has following beneficial effect: the controllable switch is arranged, so that the influence of a low-level segment of each period of the frequency signal on the detection of the frequency signal is eliminated; the delay circuit is arranged, so that the influence of overshoot or interference on the detection of the frequency signal caused by the rising edge of the frequency signal is eliminated, and the detection precision of the frequency signal is ensured.
Drawings
FIG. 1 is a prior art frequency signal conversion circuit;
FIG. 2 is a schematic diagram of a frequency signal;
fig. 3 is a schematic diagram of a frequency signal conversion circuit according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a frequency signal conversion circuit according to another embodiment of the present invention;
fig. 5 is a schematic diagram of a frequency signal conversion circuit according to still another embodiment of the present invention;
fig. 6 is a schematic diagram of a frequency signal conversion circuit according to still another embodiment of the present invention;
fig. 7 is a schematic diagram of a frequency signal conversion circuit according to still another embodiment of the present invention.
Detailed Description
As shown in fig. 3, the frequency signal converting circuit according to an embodiment of the present invention is used in an electronic device, such as a combination meter.
The frequency signal conversion circuit comprises an input end PI and an output end PO, wherein the input end PI is used for inputting a first frequency signal, and the output end PO is used for outputting a converted second frequency signal.
In this embodiment, the first frequency signal is PWM1, and the second frequency signal is PWM2, and is used in a combination meter of a vehicle.
PWM1 is a PWM signal from the controller.
The PWM2 is a PWM signal with the frequency of 100Hz (the error is 95 Hz-105 Hz) in a 12V system (the working voltage range is 9-16V), and the duty ratio range is 20% -100%.
A first voltage division circuit is arranged between the output end PO and the ground, the first voltage division circuit comprises resistors R1 and R2, and the connection point of the resistors R1 and R2 is a voltage division point.
The frequency signal conversion circuit further includes a controllable switch Q1 and a decoupling capacitor C1, in this embodiment, the controllable switch is an NPN transistor Q1. In other embodiments, the controllable switch may be other controllable switches, such as a PNP transistor, a relay, or the like.
The controllable switch Q1 is disposed between the voltage dividing point of the first voltage dividing circuit and the first end of the decoupling capacitor C1, the emitter is connected to the first end of the decoupling capacitor C1, and the collector is connected to the voltage dividing point of the first voltage dividing circuit. The second terminal of the decoupling capacitor C1 is grounded.
The input end PI is connected with the control end of the controllable switch, the base electrode of the NPN type triode Q1 is the control end and is connected with the input end PI, and the first end of the decoupling capacitor C1 is a measurement acquisition point.
When a PWM1 signal is in a low-level segment, a PWM2 is also in the low-level segment, a controllable switch Q1 is arranged between a voltage dividing point of a first voltage dividing circuit and a first end of a decoupling capacitor C1, at the moment, the controllable switch Q1 is disconnected, namely a measurement acquisition point is disconnected with the voltage dividing point, so that the decoupling capacitor C1 cannot discharge through a resistor R2, the voltage of the decoupling capacitor C1 cannot drop, the voltage drop of the voltage dividing point can be prevented from influencing frequency signal detection, namely the voltage of the measurement acquisition point cannot be influenced by the low-level segment, and the detection accuracy is ensured.
The utility model discloses a frequency signal converting circuit of another embodiment still includes delay circuit, and delay circuit sets up between input and controllable switch's control end, and as shown in the part in the virtual frame of fig. 4, delay circuit is used for delaying to input frequency signal.
While the rising edge of the first frequency signal PWM1 will typically overshoot or disturb, the second frequency signal PWM2 will overshoot or disturb accordingly.
Because of the existence of the delay circuit, the controllable switch is not switched on immediately but is switched on after delay, and the controllable switch is still in a switched-off state when overshoot or interference occurs, so that voltage fluctuation of a voltage division point caused by overshoot or interference cannot influence the voltage of a measurement acquisition point, the influence of overshoot or interference on frequency signal detection is avoided, and the detection precision is ensured.
Specifically, as shown in fig. 4, the delay circuit includes a first schmitt trigger U1B, a first diode D1, and a second schmitt trigger U2B connected in series, and further includes a first resistor R3 and a first capacitor C2, a first end of the first resistor R3 and a first end of the first capacitor C2 are connected to a cathode of the first diode, and a second end of the first resistor R3 and a second end of the first capacitor C2 are connected to ground.
The controllable switch Q1 has a base connected to the second terminal of the second schmitt trigger U2B, an emitter connected to the first terminal of the decoupling capacitor C1, and a collector connected to the voltage dividing point of the first voltage dividing circuit.
A Schmitt trigger, wherein when the input voltage is higher than the forward threshold voltage, the output is low; when the input voltage is lower than the negative threshold voltage, the output is high; when the input voltage is between the positive and negative threshold voltages, the output is unchanged, that is, the output is inverted from the high level to the low level, or from the low level to the high level, the corresponding threshold voltages are different. The output will only change when the input voltage changes sufficiently, so this element is named a flip-flop and this dual threshold action is called hysteresis.
When the PWM1 signal changes from low to high, the first terminal of the first schmitt trigger U1B changes from low to high, and the second terminal changes from high to low; the first terminal of the second schmitt trigger U2B remains high and does not go low due to the blocking of the first diode D1.
The discharging loop formed by the first resistor R3 and the first capacitor C1 discharges, the potential of the first end of the second schmitt trigger U2B gradually decreases, and when the potential of the first end of the second schmitt trigger U2B is lower than the negative threshold voltage, the second end of the second schmitt trigger U2B changes from low level to high level, and the NPN type triode Q1 is turned on.
The delay time of the delay circuit depends on the time constant R3C 2 of the discharge loop, and the larger the time constant is, the longer the delay time is, and the parameters of the relevant devices can be determined according to actual needs.
In this embodiment, the trigger level of the first schmitt trigger U1B and the second schmitt trigger U2B is 1.63V, the time constant τ of the discharge loop is 200 μ s, the high level of the PWM1 signal is 5V, the on-state voltage of the NPN transistor Q1 is 0.7V:
1.63V＝(5V-0.7V)e-t/τ
the calculated delay tau is 194 mu s, so that the influence of overshoot or interference on frequency signal detection can be avoided, and the detection precision is ensured.
In another embodiment of the present invention, an adjusting resistor R4 is further disposed between the delay circuit and the controllable switch for adjusting the charging and discharging time constant of the decoupling capacitor C1, as shown in fig. 5.
The time constant of charging and discharging of the decoupling capacitor C1 is R C1, wherein R is the equivalent resistance of the resistors R1, R2 and R4, in the embodiment, the time constant t0 of charging and discharging of the decoupling capacitor C1 is 424 mus, the PWM signal is 105Hz, the duty ratio is 20%, and the high-level duration is 1/105 20% 10%61904 μ s, the time t1 at which the decoupling capacitor C1 can be charged is:
high duration-delay 1904 μ s-194 μ s 1710 μ s t1
t1 is greater than 4 times t0, even under the worst condition, the coupling capacitor C1 can charge the voltage to the highest in one cycle for normal frequency signal detection.
In another embodiment of the present invention, as shown in fig. 6, other delay circuits can be used to ensure the detection accuracy.
The delay circuit comprises a first Schmitt trigger U1B, a second resistor R3 'and a second Schmitt trigger U2B which are connected in series, and further comprises a second diode D1' and a first capacitor C2, wherein the second diode is connected with the second resistor in parallel, a first end of the second resistor R3 'is connected with the anode of the second diode D1', a second end of the second resistor R3 'and a first end of the first capacitor C2 are connected with the cathode of the second diode D1', and a second end of the first capacitor C2 is connected with the ground.
And a time delay chip can be adopted, so that the detection precision can be ensured.
In yet another embodiment, as shown in fig. 7, the controllable switch is a relay RE, a coil of the relay RE is disposed between the delay circuit and the ground, and a normally open contact is disposed between the voltage dividing point and the first end of the decoupling capacitor, when the second end of the second schmitt trigger U2B changes from low level to high level, the coil is energized, the normally open contact is closed, and when the second end of the second schmitt trigger U2B changes from high level to low level, the coil is de-energized, the normally open contact is opened.
Normally open contact disconnection, namely controllable switch Q1 disconnection, also measure the collection point and break off with the partial pressure point, measure the collection point and can not discharge through resistance R2, measure the voltage of collection point and can not descend, therefore can avoid the influence that partial pressure point voltage drop detected frequency signal, measure the voltage of collection point and can not receive the influence of low-level section promptly to guarantee the precision that detects.
Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited thereto. Various changes and modifications can be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention is to be determined by the appended claims.
Claims (10)
1. The frequency signal conversion circuit is characterized by comprising an input end and an output end, wherein the input end is used for inputting a first frequency signal, the output end is used for outputting a converted second frequency signal, a first voltage division circuit is arranged between the output end and the ground, the frequency signal conversion circuit further comprises a controllable switch and a decoupling capacitor, the controllable switch is arranged between the voltage division point of the first voltage division circuit and the first end of the decoupling capacitor, the second end of the decoupling capacitor is grounded, the input end is connected with the control end of the controllable switch, and the first end of the decoupling capacitor is a measurement acquisition point.
2. The frequency signal conversion circuit according to claim 1, wherein the frequency signal conversion circuit further comprises a delay circuit, the delay circuit being disposed between the input terminal and the control terminal of the controllable switch, the delay circuit being configured to delay the input frequency signal.
3. The frequency signal converting circuit according to claim 2, wherein the delay circuit comprises a first schmitt trigger, a first diode, and a second schmitt trigger connected in series, and further comprises a first resistor and a first capacitor, a first terminal of the first resistor and a first terminal of the first capacitor are connected to a negative terminal of the first diode, and a second terminal of the first resistor and a second terminal of the first capacitor are connected to ground.
4. The frequency signal conversion circuit according to claim 2, wherein the delay circuit includes a first schmitt trigger, a second resistor, and a second schmitt trigger connected in series, and further includes a second diode and a first capacitor, the second diode is connected in parallel with the second resistor, a first end of the second resistor is connected to an anode of the second diode, a second end of the second resistor and a first end of the first capacitor are connected to a cathode of the second diode, and a second end of the first capacitor is connected to ground.
5. A frequency signal conversion circuit according to claim 3 or 4, characterised in that an adjusting resistor is arranged between the delay circuit and the controllable switch for adjusting the time constant for charging and discharging the decoupling capacitor.
6. The frequency signal converting circuit according to claim 1, wherein the controllable switch is an NPN-type transistor, a base of the transistor is connected to the second terminal of the second schmitt trigger, an emitter of the transistor is connected to the decoupling capacitor, and a collector of the transistor is connected to the voltage dividing point of the first voltage dividing circuit.
7. The frequency signal converting circuit according to claim 1, wherein the first frequency signal and the second frequency signal are PWM signals.
8. The frequency signal conversion circuit according to claim 1 or 2, wherein the controllable switch is a relay.
9. The frequency signal conversion circuit according to claim 8, wherein the coil of the relay RE is disposed between the input terminal or the output terminal of the delay circuit and the ground, and the normally open contact is disposed between the voltage dividing point and the first terminal of the decoupling capacitor.
10. An electronic device comprising a housing and a PCB disposed in the housing, wherein the PCB is provided with the frequency signal converting circuit according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020662247.0U CN212012608U (en) | 2020-04-27 | 2020-04-27 | Frequency signal conversion circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020662247.0U CN212012608U (en) | 2020-04-27 | 2020-04-27 | Frequency signal conversion circuit and electronic device |
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| Publication Number | Publication Date |
|---|---|
| CN212012608U true CN212012608U (en) | 2020-11-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020662247.0U Active CN212012608U (en) | 2020-04-27 | 2020-04-27 | Frequency signal conversion circuit and electronic device |
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| Country | Link |
|---|---|
| CN (1) | CN212012608U (en) |
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2020
- 2020-04-27 CN CN202020662247.0U patent/CN212012608U/en active Active
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