CN211957687U - Thermopile chip - Google Patents
Thermopile chip Download PDFInfo
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- CN211957687U CN211957687U CN202020762459.6U CN202020762459U CN211957687U CN 211957687 U CN211957687 U CN 211957687U CN 202020762459 U CN202020762459 U CN 202020762459U CN 211957687 U CN211957687 U CN 211957687U
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- substrate
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- thermopile chip
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- thermocouple
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- 239000000758 substrate Substances 0.000 claims abstract description 34
- 238000010521 absorption reaction Methods 0.000 claims abstract description 17
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 12
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 4
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 238000003466 welding Methods 0.000 abstract description 7
- 238000004806 packaging method and process Methods 0.000 abstract description 4
- 238000000034 method Methods 0.000 description 11
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229920002799 BoPET Polymers 0.000 description 1
- 230000005678 Seebeck effect Effects 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 229920006255 plastic film Polymers 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
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Abstract
The application discloses a thermopile chip, which relates to the technical field of integrated circuits, and comprises a substrate, a supporting layer and a thermocouple positioned on the supporting layer, wherein the supporting layer is provided with an infrared absorption layer, the substrate corresponds to the infrared absorption layer, a cavity is etched on the substrate, the thermopile chip is also provided with two grooves used as electrode welding spots, the grooves extend to the supporting layer from the substrate, the two grooves are respectively positioned on two opposite sides of the cavity, the thickness of the substrate is between 20 and 30 mu m, the supporting layer comprises a silicon nitride film or a silicon oxide film, the thickness of the silicon nitride film is between 5 and 10 mu m, the infrared absorption layer is a carbonized photoresist layer, one semiconductor in the thermocouple is a polycrystalline silicon strip, one semiconductor in the thermocouple is an aluminum strip, the scheme provides a surface-mounted thermopile chip, and solves the technical problem that the partial pressure of pins in the existing pin-type chip influences the calibration precision of a sensor, the packaging efficiency of the chip is improved, and the application range of the chip is expanded.
Description
Technical Field
The present application relates generally to the field of integrated circuit technology and, more particularly, to a thermopile chip.
Background
The TPS (thermopile sensor) thermopile sensor chip is an infrared sensor based on the Seebeck effect (two different semiconductor materials are connected end to form a closed loop, and when the temperatures of two nodes are different, a current is generated in the circuit, and a temperature difference electromotive force is generated). When infrared rays irradiate the center of the chip, the temperature of the hot junction of the center rises, the edge of the thermopile chip is a cold junction, namely the ambient temperature, and the cold junction is not changed along with the temperature rise of the center, so that the temperature difference exists between the hot junction of the center and the cold junction of the edge, the thermopile sensor chip can output a voltage value, and the temperature rise is generated by the infrared radiation absorbed by the center of the chip in the process, and finally a voltage signal is output.
The traditional thermocouple chip adopts a DIP packaging form, 4 pins are introduced, and when the device works, partial voltage caused by pin resistance can have certain influence on the calibration of the sensor.
SUMMERY OF THE UTILITY MODEL
In the summary section a series of concepts in a simplified form is introduced, which will be described in further detail in the detailed description section. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In order to solve the technical problem that the calibration precision of the sensor is influenced by the partial pressure of the resistance of the pin, the main purpose of the application is to provide a surface-mounted thermopile chip
In order to realize the purpose of the utility model, the following technical scheme is adopted in the application:
a thermopile chip comprises a substrate, a supporting layer and a thermocouple positioned on the supporting layer;
the supporting layer is provided with an infrared absorption layer, and a cavity is etched on the substrate corresponding to the infrared absorption layer;
the thermopile chip is further provided with grooves serving as electrode pads, the grooves extending from the substrate to the support layer.
Further, in an embodiment of the present invention, the two grooves are respectively located on two opposite sides of the cavity.
The two grooves are respectively used as a negative electrode welding point and a positive electrode welding point of the thermopile.
Further, in an embodiment of the present invention, the thickness of the substrate is between 20 μm and 30 μm.
Further, in an embodiment of the present invention, the supporting layer includes a silicon nitride film or a silicon oxide film.
Further, in an embodiment of the present invention, the silicon nitride film has a thickness of 5 μm to 10 μm.
Further, in an embodiment of the present invention, the infrared absorption layer is a carbonized photoresist layer.
Further, in an embodiment of the present invention, the thermocouple is provided in plurality.
Further, in an embodiment of the present invention, one semiconductor of the thermocouple is a polysilicon strip.
Further, in an embodiment of the present invention, one semiconductor of the thermocouple is an aluminum strip.
Further, in an embodiment of the present invention, two ends of the polysilicon strip are respectively located on the substrate and the supporting layer.
According to the technical scheme, the thermopile chip has the advantages and positive effects that:
the scheme provides a SMD thermopile chip, solves the technical problem that the pin partial pressure influences the calibration precision of a sensor in the existing pin type chip, improves the packaging efficiency of the chip, and enlarges the application range of the chip.
The thermopile chip comprises a substrate, a supporting layer and a thermocouple positioned on the supporting layer, wherein the supporting layer is provided with an infrared absorption layer, a hole is etched on the substrate corresponding to the infrared absorption layer, the thermopile chip is also provided with a groove used as an electrode welding spot, and the groove extends from the substrate to the supporting layer.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive labor.
Fig. 1 is a schematic diagram illustrating a structure of a thermopile chip according to an exemplary embodiment.
Wherein the reference numerals are as follows:
100-a substrate; 200-a support layer; 300-a thermocouple; 400-an infrared absorbing layer; 500-negative electrode connecting wire welding points; 600-positive electrode connection pad.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In this application, the terms "upper", "lower", "inner", "middle", "outer", "front", "rear", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings. These terms are used primarily to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to a particular orientation or to be constructed and operated in a particular orientation. Moreover, some of the above terms may be used to indicate other meanings besides the orientation or positional relationship, for example, the term "on" may also be used to indicate some kind of attachment or connection relationship in some cases. The specific meaning of these terms in this application will be understood by those of ordinary skill in the art as appropriate.
Furthermore, the terms "disposed," "connected," and "secured" are to be construed broadly. For example, "connected" may be a fixed connection, a detachable connection, or a unitary construction; can be a mechanical connection, or an electrical connection; may be directly connected, or indirectly connected through intervening media, or may be in internal communication between two devices, elements or components. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
As shown in fig. 1, the thermopile chip includes a substrate 100, a support layer 200, and a thermocouple 300, the support layer 200 is provided with an infrared absorption layer 400, and a cavity is etched in the substrate 100 corresponding to the infrared absorption layer 400.
Firstly, a semiconductor silicon wafer with two polished surfaces is used as a substrate 100, after the substrate 100 with the thickness of 20-30 μm is subjected to double-surface oxidation, a silicon nitride film is deposited on the front surface of the substrate 100 by adopting an LPCVD (low pressure chemical vapor deposition) method, the thickness of the silicon nitride film is controlled to be between 5 μm and 10 μm, then a supporting layer 200 is deposited on the substrate 100, the supporting layer 200 comprises a silicon nitride film or a silicon oxide film, in the embodiment, the silicon nitride film is taken as an example for description, the supporting layer 200 is subjected to LPCVD (low pressure chemical vapor deposition) method, polysilicon strips with two ends respectively positioned on the silicon nitride film and the substrate 100 are etched, the polysilicon strips are used as one semiconductor in a thermocouple 300, an aluminum strip is manufactured by adopting a detection and photoetching process, the aluminum strip is used as the other semiconductor of the thermocouple 300, and the aluminum strip and.
In this embodiment, the support layer 200 may be formed by mixing a silicon nitride film and a silicon oxide film, or may be formed of an organic material such as a plastic film like a PET film.
Regarding the shape and size of the thermocouple 300, those skilled in the art can determine the design of the thermopile and the size of the window during the manufacturing process, and the present embodiment has a plurality of thermocouples 300, and a plurality of polysilicon and aluminum strips are provided correspondingly.
Silicon dioxide is arranged on the back surface of the substrate 100 to be used as a mask, then a cavity is etched on the substrate 100 through etching, the cavity corresponds to the infrared absorption layer 400, and in order to coat the infrared absorption layer 400 on the thermoelectric core plate at the hot-end infrared radiation receiving region, the infrared absorption layer 400 is prepared by adopting the evaporation and stripping processes of a semiconductor integrated circuit and a micro-electromechanical system.
In this embodiment, the infrared absorbing layer 400 is a carbonized photoresist layer.
Grooves for serving as electrode pads are formed by etching in the side surfaces of the thermopile chip, and two grooves are formed and extend from the substrate 100 to the support layer 200, and are respectively located at opposite sides of the cavity. When the thermopile chip is mounted, the two grooves are respectively used as a positive electrode connecting pad 600 and a negative electrode connecting pad 500, and the grooves are welded in the circuit board in a reflow soldering manner, as shown in fig. 1, after the thermopile chip is mounted on the circuit board, the surface where the grooves are located is attached to the circuit board, and the surface can be called as a bottom surface.
It should be noted that the side surface in this embodiment is determined by the placement shown in fig. 1, and the side surface is the surface of the substrate 100 adjacent to the support layer 200, and when the thermopile chip is mounted on the chip, the placement of the thermopile chip is changed, and the groove faces downward, which can be referred to as the bottom surface.
In conclusion, the scheme provides a thermopile chip of a patch type structure, the thermopile chip comprises a substrate 100, a support layer 200 and a thermocouple 300, the support layer 200 is provided with an infrared absorption layer 400, the substrate 100 is etched with a hole corresponding to the infrared absorption layer 400, the thickness of the substrate 100 is between 20 μm and 30 μm, grooves used as welding spots are arranged on the side surface of the substrate 100, the grooves are provided with two opposite sides which are respectively located in the hole, and the thermopile chip can be used for welding the grooves on the chip when in use, so that the technical problem of inaccurate calibration caused by the partial pressure of the existing pin type thermopile chip is solved.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only exemplary of the invention, and is intended to enable those skilled in the art to understand and implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A thermopile chip, comprising a substrate (100), a support layer (200), and a thermocouple (300) located on the support layer (200);
the supporting layer (200) is provided with an infrared absorption layer (400), and a cavity is etched on the substrate (100) corresponding to the infrared absorption layer (400);
the thermopile chip is further provided with grooves serving as electrode pads, which extend from the substrate (100) to the support layer (200).
2. The thermopile chip of claim 1, wherein there are two of said recesses, one on each of opposite sides of said cavity.
3. Thermopile chip according to claim 1, characterized in that the substrate (100) has a thickness of between 20 μm and 30 μm.
4. The thermopile chip according to claim 1, wherein the support layer (200) comprises a silicon nitride film or a silicon oxide film.
5. The thermopile chip of claim 4, wherein the silicon nitride film is 5 μm-10 μm thick.
6. The thermopile chip of claim 1, wherein the infrared absorbing layer (400) is a carbonized photoresist layer.
7. The thermopile chip according to claim 1, wherein the thermocouple (300) is provided in plurality.
8. The thermopile chip according to claim 1, wherein one semiconductor in the thermocouple (300) is a polysilicon strip.
9. The thermopile chip of claim 8, wherein one semiconductor of the thermocouple (300) is an aluminum strip.
10. Thermopile chip according to claim 8, characterized in that the two ends of the polysilicon strip are located at the substrate (100) and the support layer (200), respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020762459.6U CN211957687U (en) | 2020-05-09 | 2020-05-09 | Thermopile chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020762459.6U CN211957687U (en) | 2020-05-09 | 2020-05-09 | Thermopile chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211957687U true CN211957687U (en) | 2020-11-17 |
Family
ID=73171092
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020762459.6U Active CN211957687U (en) | 2020-05-09 | 2020-05-09 | Thermopile chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211957687U (en) |
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2020
- 2020-05-09 CN CN202020762459.6U patent/CN211957687U/en active Active
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