CN211955708U - Capacitor implosion detection circuit - Google Patents
Capacitor implosion detection circuit Download PDFInfo
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- CN211955708U CN211955708U CN201922494501.0U CN201922494501U CN211955708U CN 211955708 U CN211955708 U CN 211955708U CN 201922494501 U CN201922494501 U CN 201922494501U CN 211955708 U CN211955708 U CN 211955708U
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Abstract
The utility model belongs to the technical field of detection circuits, in particular to a capacitor implosion detection circuit, which comprises a current acquisition circuit, wherein the current acquisition circuit is connected with a capacitor to be detected and is used for acquiring current information flowing through the capacitor to be detected; the voltage acquisition circuit is connected with the capacitor to be detected and is used for acquiring voltage information flowing through the capacitor to be detected; and the master control circuit is connected with the current acquisition circuit and the voltage acquisition circuit and is used for judging whether the detected capacitor is imploded or not according to the current information and the voltage information. The utility model discloses when carrying out the implosion to electric capacity, whether the voltage and the electric current that are surveyed electric capacity through detecting the flow through come the comprehensive judgement to be surveyed electric capacity and take place the implosion, have guaranteed the measuring accuracy, have reduced manufacturing cost.
Description
Technical Field
The utility model belongs to the technical field of the detection circuitry, especially, relate to an electric capacity implosion detection circuitry.
Background
The electrolytic capacitor needs to undergo production and aging tests before leaving the factory. During production, the electrolytic capacitor is inevitably subjected to defects of irregular aluminum foil trimming, burrs, electrolyte impurities and the like, and the withstand voltage value of the position of the electrolytic capacitor with the burrs and the electrolyte impurities is far lower than the normal value.
During aging test, charging voltage needs to be applied to two ends of a capacitor to be tested, the defective capacitor is easy to implode along with the continuous increase of the charging voltage, and when implosion occurs, the voltage at two ends of the capacitor to be tested is rapidly reduced, and the current is rapidly increased. After implosion is finished, the capacitor to be tested is continuously charged, and in the subsequent aging process, the capacitor which has been implosion has high probability and the volt-ampere characteristic is displayed as a normal capacitor due to continuous charging, so that the capacitor which has been implosion is easy to flow into the market, and the use is influenced.
At present, whether implosion happens to a capacitor is difficult to detect in an aging test, and when the capacitor is used, a universal meter is generally adopted for measurement, but the result of universal meter measurement is easy to interfere, so that the measurement result is inaccurate. In addition, special test equipment is available in the market, but only a capacitor with a certain specific internal resistance can be tested, when the capacitors with different capacitance values and internal resistances are measured, the problem of inaccurate measurement is easily caused, the use of customers is influenced, and the problem of overhigh cost is easily caused by testing the implosion of the capacitors through the special equipment.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an electric capacity implosion detection circuitry when aiming at solving among the prior art and carrying out the implosion measurement to electric capacity, measures unsafe technical problem.
In order to achieve the above object, an embodiment of the present invention provides a capacitor implosion detection circuit, including:
the current acquisition circuit is connected with the capacitor to be detected and is used for acquiring current information flowing through the capacitor to be detected;
the voltage acquisition circuit is connected with the capacitor to be detected and is used for acquiring voltage information flowing through the capacitor to be detected;
and the master control circuit is connected with the current acquisition circuit and the voltage acquisition circuit and is used for judging whether the detected capacitor is imploded or not according to the current information and the voltage information.
Optionally, the current collection circuit further comprises a channel switch circuit, an input end of the channel switch circuit is connected with the current collection circuit, and the channel switch circuit is further connected with the main control circuit.
Optionally, the current collecting circuit includes a first differential amplifying circuit and a second differential amplifying circuit, input ends of the first differential amplifying circuit and the second differential amplifying circuit are both connected to the capacitor to be measured, and output ends of the first differential amplifying circuit and the second differential amplifying circuit are both connected to the input end of the channel switch circuit; the first differential amplifier circuit and the second differential amplifier circuit have different amplification factors.
Optionally, the first differential amplifier circuit and the second differential amplifier circuit each include an operational amplifier, input ends of the two operational amplifiers are connected to the capacitor to be tested, and output ends of the two operational amplifiers are connected to the channel switch circuit.
Optionally, the first differential amplifier circuit and the second differential amplifier circuit each include an output filter circuit, and the output filter circuit is connected to the output ends of the first differential amplifier circuit and the second differential amplifier circuit.
Optionally, the output filter circuit includes a filter capacitor and a filter resistor, one end of the filter resistor is connected to the output end of the operational amplifier, the other end of the filter resistor is connected to one end of the filter capacitor, and the other end of the filter capacitor is grounded.
Optionally, the channel switch circuit includes an analog switch chip, a first pin and a second pin of the analog switch chip are respectively connected to the output ends of the two operational amplifiers, and the analog switch chip is further connected to the main control circuit.
Optionally, the main control circuit includes a main control chip, and the fourth pin, the fifteenth pin, the ninth pin, and the tenth pin of the analog switch chip are all connected to the main control chip.
Optionally, the voltage acquisition circuit includes first sampling resistance, second sampling resistance, transient diode and fifth resistance, the first end of first sampling resistance is connected with the measured capacitance, the second end of first sampling resistance with second sampling resistance connects, the second end of first sampling resistance still with the negative pole of transient diode is connected, the anodal ground connection of transient diode, the first end of fifth resistance with the negative pole of transient diode is connected, the second end of fifth resistance with main control circuit connects.
Optionally, the voltage acquisition circuit includes a third sampling resistor, a fourth sampling resistor, a switching diode, and a sixth resistor; the first end of third sampling resistance is connected with the measured capacitor, the second end of third sampling resistance with fourth sampling resistance connects the back ground connection, the second end of third sampling resistance still with switch diode's positive pole is connected, switch diode's positive pole still with sixth ohmic connection, sixth resistance still is connected with main control circuit
The embodiment of the utility model provides an above-mentioned one or more technical scheme in the electric capacity implosion detection circuitry have one of following technological effect at least: the utility model discloses when carrying out the implosion to electric capacity, gather the current information of flowing through by measuring electric capacity through current acquisition circuit, gather the voltage information of flowing through by measuring electric capacity through voltage acquisition circuit, send to at last to master control circuit, master control circuit basis current information with voltage information judges whether the implosion takes place by measuring electric capacity, so, comes the comprehensive judgement by measuring electric capacity whether the implosion takes place through the voltage and the electric current that detect the flowing through by measuring electric capacity, has guaranteed measuring accuracy, has reduced manufacturing cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the embodiments or the prior art descriptions will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive labor.
Fig. 1 is a block diagram of a circuit structure of a capacitor implosion detection circuit provided in an embodiment of the present invention;
fig. 2 is a diagram showing a simulation diagram of a usage status of the capacitor implosion detection circuit provided by the embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a capacitor implosion detection circuit according to an embodiment of the present invention;
fig. 4 is a current-voltage curve diagram of the capacitor implosion test normal capacitor and the implosion capacitor provided by the embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below by referring to the drawings are exemplary and intended to explain the embodiments of the present invention and are not to be construed as limiting the present invention.
In the description of the embodiments of the present invention, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in the orientation or positional relationship indicated in the drawings, which is only for convenience in describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element so indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "fixed" are to be construed broadly, e.g., as fixed or detachable connections or as an integral part; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the embodiments of the present invention can be understood by those skilled in the art according to specific situations.
In an embodiment of the present invention, as shown in fig. 1-4, a circuit for detecting capacitor implosion is provided, which includes a current collecting circuit 100, a voltage collecting circuit 200 and a main control circuit 300.
The current collecting circuit 100 is connected to the capacitor to be measured, and is configured to collect information of a current flowing through the capacitor to be measured.
The voltage acquisition circuit 200 is connected to the measured capacitor and is used for acquiring voltage information flowing through the measured capacitor.
The main control circuit 300 is connected to the current collecting circuit 100 and the voltage collecting circuit 200, and is configured to determine whether the detected capacitor has implosion according to the current information and the voltage information.
When the capacitor is subjected to the implosion test, as shown in fig. 2, a direct current power supply continuously charges the capacitor Ct to be tested, and in the test process, the voltage flowing through the voltage acquisition circuit 200 is the same as the voltage flowing through the capacitor to be tested, so that the voltage acquisition circuit 200 can acquire the voltage information flowing through the capacitor to be tested, and the current flowing through the current acquisition circuit 100 is the same as the current flowing through the capacitor to be tested, so that the current acquisition circuit 100 can acquire the current information flowing through the capacitor to be tested.
The utility model discloses when carrying out the implosion to electric capacity, gather the current information of being surveyed electric capacity through current acquisition circuit 100, gather the voltage information of being surveyed electric capacity through voltage acquisition circuit 200, send to at last to master control circuit 300, master control circuit 300 basis current information with whether voltage information judges to be surveyed electric capacity and take place the implosion, so, whether the voltage and the electric current of being surveyed electric capacity through detecting to flow through come the comprehensive judgement to be surveyed electric capacity and take place the implosion, have guaranteed measuring accuracy, have reduced manufacturing cost.
In another embodiment of the present invention, as shown in fig. 1-3, the capacitor implosion detection circuit further includes a channel switch circuit 400, an input terminal of the channel switch circuit 400 is connected to the current collection circuit 100, and the channel switch circuit 400 is further connected to the main control circuit 300.
The current collecting circuit 100 includes a first differential amplifying circuit 110 and a second differential amplifying circuit 120, wherein input ends of the first differential amplifying circuit 110 and the second differential amplifying circuit 120 are both connected to the capacitor to be detected, and output ends of the first differential amplifying circuit 110 and the second differential amplifying circuit 120 are both connected to an input end of the channel switch circuit 400. Through the arrangement of the first differential amplifier circuit 110 and the second differential amplifier circuit 120, the temperature drift of the circuit caused by temperature in the capacitance test process is suppressed through differential amplification processing, and the stability of the measurement result is ensured.
The first differential amplifier circuit 110 and the second differential amplifier circuit 120 have different amplification factors. By setting the first differential amplifier circuit 110 and the second differential amplifier circuit 120 with different differential coefficients, different accuracies can be obtained by calculation, and various different requirements can be met.
The first differential amplifier circuit 110 and the second differential amplifier circuit 120 each include an operational amplifier, the input terminals of the two operational amplifiers are connected to the capacitor to be tested, and the output terminals of the two operational amplifiers are connected to the channel switch circuit 400.
Specifically, the first differential amplifier circuit 110 includes a first operational amplifier U1A, the type of the first operational amplifier U1A is preferably TLV4333, and by using the TLV4333, the amplification factor of the first differential amplifier circuit 110 can reach 100 times, a current below 200uA can be obtained through test calculation, the accuracy reaches 0.1uA, and the low offset can reach 2 uV. In this embodiment, the output terminal of the first operational amplifier U1A is GEAR-S-1.
The second differential amplifier circuit 120 comprises a second operational amplifier U1B, the type of the second operational amplifier U1B is preferably TLV9604, and by adopting the TLV9604, the amplification factor of the second differential amplifier circuit 120 is 1 time, and the current of 20mA to 200uA can be obtained through test calculation, and the precision reaches 10 uA. In this embodiment, the output terminal of the second operational amplifier U1B is GEAR-M-1.
The first differential amplifier circuit 110 and the second differential amplifier circuit 120 each include an output filter circuit 130, and the output filter circuit 130 is connected to the output ends of the first differential amplifier circuit 110 and the second differential amplifier circuit 120.
Specifically, the output filter circuit 130 includes a filter capacitor and a filter resistor, one end of the filter resistor is connected to the output end of the operational amplifier, the other end of the filter resistor is connected to one end of the filter capacitor, and the other end of the filter capacitor is grounded. In this embodiment, the filter capacitor of the second differential amplifier circuit 120 is labeled CA7, and the filter resistor is labeled RA 39; the filter capacitor of the first differential amplifier circuit 110 is labeled as CA8, and the filter resistor is labeled as RA 40.
The channel switch circuit 400 comprises an analog switch chip U11, a first pin and a second pin of the analog switch chip U11 are respectively connected with the output ends of the two operational amplifiers, and the analog switch chip U11 is further connected with the main control circuit 300. Specifically, in this embodiment, the analog switch chip U11 is preferably a CD4053BM96, and CD4053BM96 is a three-channel digitally controlled analog switch, and has three independent digital control inputs A, B, C and INH input, and has low on-resistance and low off-leakage current. The fourth pin and the fifteenth pin of the analog switch chip U11 are output pins, the tenth pin of the analog switch chip U11 is a control input terminal B, the ninth pin of the analog switch chip U11 is a control input terminal C, and the fourth pin and the fifteenth pin of the analog switch chip U11 are a first ADC output terminal and a second ADC output terminal.
When the required precision reaches 0.1uA, the main control circuit 300 controls the tenth pin of the analog switch chip U11 to enable, the first pin of the analog switch chip U11 is turned on, and a signal output by the first differential amplifier circuit 110 is output to the main control circuit through the fifteenth pin of the analog switch chip U11.
When the required precision reaches 10uA, the master control circuit 300 controls the ninth pin of the analog switch chip U11 to be enabled, the second pin of the analog switch chip U11 is turned on, and a signal output by the second differential amplifier circuit 120 is output to the master control circuit 300 through the fourth fifth pin of the analog switch chip U11.
Therefore, the master control circuit 300 can control one of the signals output by the first differential amplifying circuit 110 and the second differential amplifying circuit 120 to be output to the master control circuit 300 by controlling the ninth pin and the tenth pin of the analog switch chip U11 to be enabled, so that ADC processing is performed, the use requirements on different amplification factors are met, and various capacitors can be measured.
The main control circuit 300 comprises a main control chip, and the fourth pin, the fifteenth pin, the ninth pin and the tenth pin of the analog switch chip U11 are all connected with the main control chip. Specifically, in this embodiment, the selection of main control chip is selected according to the actual demand according to technical staff in the field, to main control chip's model, the utility model discloses do not specifically limit.
In another embodiment of the present invention, as shown in fig. 3, the voltage acquisition circuit 200 includes a first sampling resistor R1, a second sampling resistor R2, a transient diode DC1, and a fifth resistor R5. The first end of first sampling resistance R1 is connected with the measured capacitor, the second end of first sampling resistance R1 with second sampling resistance R2 is connected, the second end of first sampling resistance R1 still with the negative pole of transient diode DC1 is connected, the anodal ground of transient diode DC1, the first end of fifth resistance R5 with the negative pole of transient diode DC1 is connected, the second end of fifth resistance R5 with main control circuit connects. In this embodiment, the first sampling resistor R1 and the second sampling resistor R2 both use a precision resistor of 25 ppm. When the voltage input to the voltage acquisition circuit 200 exceeds the maximum voltage that can be acquired by the main control chip, the transient diode DC1 clamps the voltage to protect the voltage acquisition circuit 200.
In another embodiment of the present invention, as shown in fig. 3, the voltage acquisition circuit 200 includes a third sampling resistor R3, a fourth sampling resistor R4, a switching diode DC2, and a sixth resistor R6. The first end of third sampling resistance R3 is connected with the capacitor to be measured, the second end of third sampling resistance R3 with fourth sampling resistance R4 is connected the back ground connection, the second end of third sampling resistance R3 still with switch diode DC 2's anodal is connected, switch diode DC 2's positive pole still with sixth resistance R6 is connected, sixth resistance R6 still is connected with master control circuit. In this embodiment, when the input voltage is too large, the switching diode DC2 is turned on, and the clamp signal voltage is 3.3+0.7, so as to protect the voltage acquisition circuit 200.
Taking the measured electrolytic capacitor as an example, how the main control chip determines whether the measured capacitor has implosion or not is described below, and after the main control chip obtains the voltage information and the current information of the measured capacitor, curve data of the charging current voltage and the charging current time of the capacitor is generated, as shown in fig. 4, the main control chip processes the data in a mode of Δ y (current/voltage increment)/Δx (time increment), which is convenient for understanding, that is, the main control chip determines whether implosion or not by using the variation of the voltage and the current in unit time, specifically, the following steps:
(1) judging whether implosion occurs or not through current information
In the normal charging process, the slope of the current is certainly less than 0, and the slope of the current infinitely approaches 0 along with the increase of the charging time. However, the current of the implosion capacitor rises sharply at the moment of implosion, at the moment, the slope is larger than 0, and at the beginning of implosion, the slope approaches infinity.
(2) Therefore, the implosion is judged by Δ a (current-voltage increment)/Δt (time increment), and an explosion larger than 0 indicates occurrence of the implosion, and the larger the value is, the more intense the implosion is. Further, different degrees of implosion may also be sorted in this way.
(2) Judging whether implosion occurs or not through voltage information
In the normal charging process, the slope of the voltage is greater than 0, and the slope approaches to 0 infinitely along with the increase of the charging time. The voltage of the implosion capacitor drops sharply at the implosion moment, the slope is smaller than 0, and the slope approaches infinitesimal magnitude at the initial implosion.
(3) Therefore, the implosion is judged by Δ v (current-voltage increment)/Δt (time increment), and an implosion smaller than 0 indicates the occurrence of the implosion, and the smaller the value, the more intense the implosion. Further, different degrees of implosion may also be sorted in this way.
(3) Judging whether implosion occurs or not through current information and voltage information
And (3) judging whether the detected capacitor has implosion by combining the two judging modes in the steps (1) and (2), thereby ensuring the stability of the judgment result.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A capacitor implosion detection circuit is characterized by comprising
The current acquisition circuit is connected with the capacitor to be detected and is used for acquiring current information flowing through the capacitor to be detected;
the voltage acquisition circuit is connected with the capacitor to be detected and is used for acquiring voltage information flowing through the capacitor to be detected;
and the master control circuit is connected with the current acquisition circuit and the voltage acquisition circuit and is used for judging whether the detected capacitor is imploded or not according to the current information and the voltage information.
2. The circuit of claim 1, further comprising a channel switch circuit, wherein an input terminal of the channel switch circuit is connected to the current collection circuit, and the channel switch circuit is further connected to the main control circuit.
3. The circuit for detecting capacitor implosion according to claim 2, wherein the current collection circuit comprises a first differential amplification circuit and a second differential amplification circuit, input ends of the first differential amplification circuit and the second differential amplification circuit are both connected with the capacitor to be detected, and output ends of the first differential amplification circuit and the second differential amplification circuit are both connected with input ends of the channel switch circuit; the first differential amplifier circuit and the second differential amplifier circuit have different amplification factors.
4. The circuit for detecting capacitor implosion according to claim 3, wherein the first differential amplifier circuit and the second differential amplifier circuit each comprise an operational amplifier, input terminals of the two operational amplifiers are connected to the capacitor to be detected, and output terminals of the two operational amplifiers are connected to the channel switch circuit.
5. The circuit of claim 4, wherein the first differential amplifier circuit and the second differential amplifier circuit each comprise an output filter circuit, and the output filter circuit is connected to the output terminals of the first differential amplifier circuit and the second differential amplifier circuit.
6. The circuit of claim 5, wherein the output filter circuit comprises a filter capacitor and a filter resistor, one end of the filter resistor is connected to the output terminal of the operational amplifier, the other end of the filter resistor is connected to one end of the filter capacitor, and the other end of the filter capacitor is grounded.
7. The circuit of claim 4, wherein the channel switch circuit comprises an analog switch chip, a first pin and a second pin of the analog switch chip are respectively connected to the output terminals of the two operational amplifiers, and the analog switch chip is further connected to the main control circuit.
8. The circuit of claim 7, wherein the master control circuit comprises a master control chip, and the fourth pin, the fifteenth pin, the ninth pin and the tenth pin of the analog switch chip are all connected to the master control chip.
9. The capacitor implosion detection circuit according to any one of claims 1-8, wherein the voltage acquisition circuit comprises a first sampling resistor, a second sampling resistor, a transient diode and a fifth resistor, a first end of the first sampling resistor is connected with the capacitor to be detected, a second end of the first sampling resistor is connected with the second sampling resistor, a second end of the first sampling resistor is further connected with a negative electrode of the transient diode, an anode of the transient diode is grounded, a first end of the fifth resistor is connected with a negative electrode of the transient diode, and a second end of the fifth resistor is connected with the main control circuit.
10. The capacitive implosion detection circuit of any of claims 1-8, wherein the voltage acquisition circuit comprises a third sampling resistor, a fourth sampling resistor, a switching diode, and a sixth resistor; the first end of third sampling resistance is connected with the measured capacitor, the second end of third sampling resistance with fourth sampling resistance connects the back ground connection, the second end of third sampling resistance still with switch diode's positive pole is connected, switch diode's positive pole still with sixth resistance connection, sixth resistance still is connected with main control circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922494501.0U CN211955708U (en) | 2019-12-30 | 2019-12-30 | Capacitor implosion detection circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201922494501.0U CN211955708U (en) | 2019-12-30 | 2019-12-30 | Capacitor implosion detection circuit |
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| CN211955708U true CN211955708U (en) | 2020-11-17 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117269704A (en) * | 2023-11-22 | 2023-12-22 | 湖州新江浩电子有限公司 | Method, device, equipment and storage medium for detecting implosion of aluminum capacitor |
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2019
- 2019-12-30 CN CN201922494501.0U patent/CN211955708U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117269704A (en) * | 2023-11-22 | 2023-12-22 | 湖州新江浩电子有限公司 | Method, device, equipment and storage medium for detecting implosion of aluminum capacitor |
| CN117269704B (en) * | 2023-11-22 | 2024-02-20 | 湖州新江浩电子有限公司 | Method, device, equipment and storage medium for detecting implosion of aluminum capacitor |
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