CN211930597U - Signal conditioning module for miniaturized system - Google Patents

Signal conditioning module for miniaturized system Download PDF

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Publication number
CN211930597U
CN211930597U CN202020555172.6U CN202020555172U CN211930597U CN 211930597 U CN211930597 U CN 211930597U CN 202020555172 U CN202020555172 U CN 202020555172U CN 211930597 U CN211930597 U CN 211930597U
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resistor
amplifier
capacitor
signal
electrically connected
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CN202020555172.6U
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史可显
邵乐天
王文勇
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Zhejiang Tianhong Wave Control Electronic Technology Co ltd
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Zhejiang Tianhong Wave Control Electronic Technology Co ltd
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Abstract

The utility model discloses a signal conditioning module for a miniaturized system, which is used for conditioning signals and comprises a signal amplifying circuit, a signal attenuation circuit and a signal filter circuit, wherein the signal amplifying circuit is respectively electrically connected with the signal attenuation circuit and the signal filter circuit; the signal amplification circuit comprises an amplifier A1, wherein one path of the anode of the amplifier A1 is electrically connected with a resistor R3, the other path of the anode of the amplifier A1 is electrically connected with a resistor R1 through a resistor R2, and the cathode of the amplifier A1 is grounded through a resistor R5 and a resistor R4 in sequence. The utility model discloses a signal conditioning module for miniaturized system, it amplifies, attenuation control and segmentation filtering output to the ultrashort wave band signal of input.

Description

Signal conditioning module for miniaturized system
Technical Field
The utility model belongs to the technical field of miniaturized system signal conditioning, concretely relates to signal conditioning module for miniaturized system.
Background
The publication number is: CN108681361A entitled invention patent for detecting low frequency signal processing chip and low frequency signal processing circuit, its technical proposal discloses that the processing chip comprises VDD pin, VCC pin, OUT pin, TXC pin, VSS pin, LS pin, OPO pin and INN pin; the VDD is electrically connected with a state control logic circuit through a current source, the current source i is electrically connected with one end of a fuse FS between the state control logic circuit and the current source i, and the other end of the fuse FS is grounded; the VCC pin is electrically connected with a high-precision band gap reference circuit through a low dropout regulator (LDO) (low dropout regulator) circuit; the OUT pin is electrically connected with the state control logic circuit through a driving circuit; the TXC pin is electrically connected with the state control logic circuit through a delay time timer Tx; the state control logic circuit is electrically connected with a lockout time timer Ti; the VSS pin is grounded, the LS pin is connected with the anode of a trigger prohibition comparator COMP3, and the cathode of the trigger prohibition comparator COMP3 is connected with a reference voltage VR; the INN pin is connected with the negative electrode of an operational amplifier OPA, and the positive electrode of the operational amplifier OPA is connected with a common mode voltage VM; the OPO pin is connected with the output end of the operational amplifier OPA, the input end of a fixed gain amplifier AMP is connected between the OPO pin and the output end of the operational amplifier OPA, the output end of the fixed gain amplifier AMP is connected with the positive pole of a comparator COMP1 and the negative pole of a comparator COMP2, the negative pole of the comparator COMP1 is connected with a reference voltage VH, and the positive pole of the comparator COMP2 is connected with a reference voltage VL; the output end of the comparator COMP1 and the output end of the comparator COMP2 are both connected to the input end of an OR gate G2, the output end of the OR gate G2, the output end of the trigger-forbidden comparator COMP3 and a state control logic circuit are all connected to the input end of an AND gate G1, and the output end of the AND gate G1 is connected to the state control logic circuit; the comparator COMP1 and the comparator COMP2 form a bidirectional amplitude discriminator; the common mode voltage VM, the reference voltage VH, the reference voltage VL, and the reference voltage VR are all generated by the low dropout linear regulator LDO ".
Although the above patent mentioned signal amplification, the signal amplification is not a miniaturized system, and there is no attenuation control and no segmented filtering output.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a signal conditioning module for a miniaturized system, which amplifies the input ultrashort wave band signal, controls attenuation, and outputs the filtered signal in stages.
A primary object of the present invention is to provide a signal conditioning module for a miniaturized system, which has the advantages of stable signal, high efficiency, and fast speed.
In order to achieve the above object, the present invention provides a signal conditioning module for a miniaturized system, for conditioning a signal, comprising a signal amplifying circuit, a signal attenuating circuit and a signal filtering circuit, wherein the signal amplifying circuit is electrically connected to the signal attenuating circuit and the signal filtering circuit respectively;
the signal amplification circuit comprises an amplifier A1, wherein one path of the anode of the amplifier A1 is electrically connected with a resistor R3, the other path of the anode of the amplifier A1 is electrically connected with a resistor R1 through a resistor R2, the cathode of the amplifier A1 is grounded through a resistor R5 and a resistor R4 in sequence, the common end of a capacitor C1 to the resistor R1 and the resistor R2 to the common end of a capacitor C2 to the resistor R4 and the resistor R5 to a capacitor C3 to ground, and a capacitor C4 and a resistor R6 are connected between the cathode of the amplifier A1 and the output end VO1 in parallel;
the signal attenuation circuit comprises a capacitor C101 connected to the ground through one path of 3 pins of an operational amplifier U1, a resistor R51 connected to the ground through the 3 pins of the operational amplifier U1, a capacitor C111 connected to the ground through one path of 4 pins of the operational amplifier U1, a capacitor C121 connected to the ground through the other path of 4 pins of the operational amplifier U1, and a resistor R41 and a capacitor C91 connected to the ground through the 6 pins of the operational amplifier U1.
As a further preferable technical solution of the above technical solution, the output terminal VO1 of the amplifier a1 is electrically connected to the positive electrode of the amplifier A3 through the resistor R13 and the resistor R14 in sequence, the positive electrode of the amplifier A3 is also electrically connected to the resistor R15, the output terminal AO3 of the amplifier A3 is grounded through the resistor R19 and the capacitor C13 in sequence, the capacitor C12 and the resistor R18 are connected between the negative electrode of the amplifier A3 and the output terminal AO3 in parallel, the negative electrode of the amplifier A3 is also electrically connected to the output terminal AO 6 of the amplifier a2 through the resistor R17 and the resistor R16 in sequence, and the capacitor C9 is electrically connected to the common terminal 2 of the resistor R13 and the resistor R14 through the capacitor C10 and the common terminal of the resistor R16 and the resistor R17 through the capacitor C11 to the ground.
As a further preferable technical solution of the above technical solution, an anode of the amplifier a2 is electrically connected with the resistor R7 through the resistor R8, an anode of the amplifier a2 is also electrically connected with the resistor R9, a cathode of the amplifier a2 is grounded through the resistor R11 and the resistor R10 in sequence, the capacitor C8 and the resistor R12 are connected in parallel between the cathode of the amplifier a2 and the output terminal AO2, and a common terminal from the capacitor C5 to the resistor R7 and the resistor R6 is connected to the capacitor C6 and a common terminal from the resistor R10 and the resistor R11 is connected to the capacitor C7 to the ground.
As a further preferable technical solution of the above technical solution, one path of the 7 pins of the op amp U1 is grounded through a capacitor C51, and the other path of the 7 pins of the op amp U1 is grounded through a capacitor C61.
As a further preferable technical solution of the above technical solution, the 6 pin of the operational amplifier U1 is electrically connected to the 2 pin of the operational amplifier U1 through a capacitor C21, the 2 pin of the operational amplifier U1 is also electrically connected to a common terminal of the resistor R41 and the capacitor C91 through a resistor R21, and the 2 pin of the operational amplifier U1 is also electrically connected to the resistor R31 through a capacitor C112 and a resistor R111 in sequence.
Drawings
Fig. 1 is a signal amplification circuit diagram of a signal conditioning module for a miniaturized system according to the present invention.
Fig. 2 is a signal attenuation circuit diagram of a signal conditioning module for a miniaturized system according to the present invention.
Detailed Description
The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents and other technical solutions without departing from the spirit and scope of the invention.
The utility model discloses a signal conditioning module for miniaturized system, below combine preferred embodiment, further describe utility model's concrete embodiment.
Referring to fig. 1 of the drawings, fig. 1 is a signal amplification circuit diagram of a signal conditioning module for a miniaturized system according to the present invention, and fig. 2 is a signal attenuation circuit diagram of a signal conditioning module for a miniaturized system according to the present invention.
In the embodiments of the present invention, those skilled in the art will note that the resistors, capacitors, signal filter circuits, etc. related to the present invention can be regarded as the prior art.
Preferred embodiments.
The utility model discloses a signal conditioning module for a miniaturized system, which is used for conditioning signals and comprises a signal amplifying circuit, a signal attenuation circuit and a signal filter circuit, wherein the signal amplifying circuit is respectively electrically connected with the signal attenuation circuit and the signal filter circuit;
the signal amplification circuit comprises an amplifier A1, wherein one path of the anode of the amplifier A1 is electrically connected with a resistor R3, the other path of the anode of the amplifier A1 is electrically connected with a resistor R1 through a resistor R2, the cathode of the amplifier A1 is grounded through a resistor R5 and a resistor R4 in sequence, the common end of a capacitor C1 to the resistor R1 and the resistor R2 to the common end of a capacitor C2 to the resistor R4 and the resistor R5 to a capacitor C3 to ground, and a capacitor C4 and a resistor R6 are connected between the cathode of the amplifier A1 and the output end VO1 in parallel;
the signal attenuation circuit comprises a capacitor C101 connected to the ground through one path of 3 pins of an operational amplifier U1, a resistor R51 connected to the ground through the 3 pins of the operational amplifier U1, a capacitor C111 connected to the ground through one path of 4 pins of the operational amplifier U1, a capacitor C121 connected to the ground through the other path of 4 pins of the operational amplifier U1, and a resistor R41 and a capacitor C91 connected to the ground through the 6 pins of the operational amplifier U1.
Specifically, an output end VO1 of the amplifier a1 is electrically connected with an anode of an amplifier A3 through a resistor R13 and a resistor R14 in sequence, an anode of the amplifier A3 is also electrically connected with a resistor R15, an output end AO3 of the amplifier A3 is grounded through a resistor R19 and a capacitor C13 in sequence, a capacitor C12 and a resistor R18 are connected between a cathode of the amplifier A3 and the output end AO3 in parallel, a cathode of the amplifier A3 is also electrically connected with an output end AO2 of the amplifier a2 through a resistor R17 and a resistor R16 in sequence, and a common terminal of the capacitor C9 to the resistor R13 and the resistor R14 is connected to a common terminal of the capacitor C10 to the resistor R16 and a common terminal of the resistor R17 is connected to the capacitor C11 to the ground.
More specifically, the anode of the amplifier a2 is electrically connected to the resistor R7 through the resistor R8, the anode of the amplifier a2 is also electrically connected to the resistor R9, the cathode of the amplifier a2 is grounded through the resistor R11 and the resistor R10 in sequence, the capacitor C8 and the resistor R12 are connected between the cathode of the amplifier a2 and the output terminal AO2 in parallel, and the common terminal from the capacitor C5 to the resistor R7 and the resistor R6 is connected to the capacitor C6 to the common terminal from the resistor R10 and the common terminal from the resistor R11 to the capacitor C7 to the ground.
Preferably, one path of the 7 pins of the op-amp U1 is grounded through a capacitor C51 and the other path of the 7 pins of the op-amp U1 is grounded through a capacitor C61.
Preferably, the 6 th pin of the operational amplifier U1 is electrically connected to the 2 nd pin of the operational amplifier U1 through a capacitor C21, the 2 nd pin of the operational amplifier U1 is also electrically connected to a common terminal of the resistor R41 and the capacitor C91 through a resistor R21, and the 2 nd pin of the operational amplifier U1 is also electrically connected to the resistor R31 through a capacitor C112 and a resistor R111 in turn.
It is worth mentioning that the technical features such as the resistor, the capacitor, the signal filter circuit and the like which are related to the patent application of the present invention should be regarded as the prior art, and the specific structure, the working principle of the technical features and the control mode and the space arrangement mode which may be related to adopt the conventional selection in the field, which should not be regarded as the invention point of the present invention, the present invention does not further specifically expand the detailed description.
It will be apparent to those skilled in the art that modifications and variations can be made in the above-described embodiments, or some features of the invention may be substituted or omitted, and any modification, substitution, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.

Claims (5)

1. A signal conditioning module for a miniaturized system is used for conditioning signals and is characterized by comprising a signal amplifying circuit, a signal attenuation circuit and a signal filtering circuit, wherein the signal amplifying circuit is electrically connected with the signal attenuation circuit and the signal filtering circuit respectively;
the signal amplification circuit comprises an amplifier A1, wherein one path of the anode of the amplifier A1 is electrically connected with a resistor R3, the other path of the anode of the amplifier A1 is electrically connected with a resistor R1 through a resistor R2, the cathode of the amplifier A1 is grounded through a resistor R5 and a resistor R4 in sequence, the common end of a capacitor C1 to the resistor R1 and the resistor R2 to the common end of a capacitor C2 to the resistor R4 and the resistor R5 to a capacitor C3 to ground, and a capacitor C4 and a resistor R6 are connected between the cathode of the amplifier A1 and the output end VO1 in parallel;
the signal attenuation circuit comprises a capacitor C101 connected to the ground through one path of 3 pins of an operational amplifier U1, a resistor R51 connected to the ground through the 3 pins of the operational amplifier U1, a capacitor C111 connected to the ground through one path of 4 pins of the operational amplifier U1, a capacitor C121 connected to the ground through the other path of 4 pins of the operational amplifier U1, and a resistor R41 and a capacitor C91 connected to the ground through the 6 pins of the operational amplifier U1.
2. The signal conditioning module of claim 1, wherein the output terminal VO1 of the amplifier a1 is electrically connected to the positive terminal of the amplifier A3 through a resistor R13 and a resistor R14 in sequence, the positive terminal of the amplifier A3 is further electrically connected to a resistor R15, the output terminal AO3 of the amplifier A3 is grounded through a resistor R19 and a capacitor C13 in sequence, a capacitor C12 and a resistor R18 are connected between the negative terminal of the amplifier A3 and the output terminal AO3 in parallel, the negative terminal of the amplifier A3 is further electrically connected to the output terminal AO2 of the amplifier a2 through a resistor R17 and a resistor R16 in sequence, and a capacitor C2 is connected to the common terminal of the resistor R2 and the common terminal of the resistor R2 to the ground.
3. The signal conditioning module of claim 2, wherein the anode of the amplifier a2 is electrically connected to the resistor R7 through the resistor R8 and the anode of the amplifier a2 is further electrically connected to the resistor R9, the cathode of the amplifier a2 is grounded through the resistor R11 and the resistor R10 in turn, the capacitor C8 and the resistor R12 are connected between the cathode of the amplifier a2 and the output terminal AO2 in parallel, and the common terminal of the capacitor C5 to the resistor R7 and the resistor R6 is connected to the common terminal of the capacitor C6 to the resistor R10 and the common terminal of the resistor R11 to the capacitor C7 to the ground.
4. The signal conditioning module for miniaturized systems according to any of claims 1 or 3, characterized in that one of the 7 pins of the op amp U1 is connected to ground through a capacitor C51 and the other of the 7 pins of the op amp U1 is connected to ground through a capacitor C61.
5. The signal conditioning module of claim 4, wherein the pin 6 of the op-amp U1 is electrically connected to the pin 2 of the op-amp U1 through a capacitor C21, the pin 2 of the op-amp U1 is also electrically connected to the common terminal of the resistor R41 and the capacitor C91 through a resistor R21, and the pin 2 of the op-amp U1 is also electrically connected to the resistor R31 through a capacitor C112 and a resistor R111 in sequence.
CN202020555172.6U 2020-04-15 2020-04-15 Signal conditioning module for miniaturized system Active CN211930597U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020555172.6U CN211930597U (en) 2020-04-15 2020-04-15 Signal conditioning module for miniaturized system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020555172.6U CN211930597U (en) 2020-04-15 2020-04-15 Signal conditioning module for miniaturized system

Publications (1)

Publication Number Publication Date
CN211930597U true CN211930597U (en) 2020-11-13

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Application Number Title Priority Date Filing Date
CN202020555172.6U Active CN211930597U (en) 2020-04-15 2020-04-15 Signal conditioning module for miniaturized system

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CN (1) CN211930597U (en)

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