CN109104162B - Computer signal compensation circuit - Google Patents

Computer signal compensation circuit Download PDF

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CN109104162B
CN109104162B CN201810898680.1A CN201810898680A CN109104162B CN 109104162 B CN109104162 B CN 109104162B CN 201810898680 A CN201810898680 A CN 201810898680A CN 109104162 B CN109104162 B CN 109104162B
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resistor
signal
triode
operational amplifier
capacitor
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CN109104162A (en
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曾瑞
王英彦
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Yiwu Industrial and Commercial College
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Yiwu Industrial and Commercial College
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/46One-port networks

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Abstract

The invention discloses a computer signal compensation circuit, which comprises a signal input circuit, an operational amplifier calibration circuit and a voltage-stabilizing filter circuit, wherein the signal input circuit receives an analog signal at an input end in a signal transmission channel for receiving a signal at a computer control terminal, the operational amplifier calibration circuit receives the signal output by the signal input circuit in two paths, one path is input into an in-phase input end of an operational amplifier AR1, the other path is input into a switch circuit consisting of a triode Q2, a triode Q3 and a triode Q9, the operational amplifier AR3 is designed to compare and process the signal and then input into the voltage-stabilizing filter circuit, finally the voltage-stabilizing filter circuit utilizes a voltage stabilizing circuit consisting of a triode Q6 and a voltage stabilizing tube D3, and a pi-type filter circuit consisting of an inductor L3, a capacitor C6 and a capacitor C7 is designed to filter and output the filtered signal, so that the analog signal in the signal transmission channel for receiving the signal at the computer control terminal can be automatically calibrated, the stability of signal and the efficiency of signal transmission have been improved.

Description

Computer signal compensation circuit
Technical Field
The invention relates to the technical field of circuits, in particular to a computer signal compensation circuit.
Background
At present, with the continuous progress of science and technology, computers are favored by people since the coming out of the world, nowadays, the life of people has been changed by computers, especially under the influence of big data of today's computers, the life of people is more completely facilitated by computers, however, analog signals in a signal transmission channel for receiving signals by a computer control terminal need to be ensured to be insufficient in signal potential or to be interfered by other signals with the same frequency in the transmission process, which leads to signal distortion, in order to ensure the smooth operation of computers, the analog signals need to be automatically calibrated in the transmission process, so as to prevent the interference of signals with the same frequency.
The present invention provides a new solution to this problem.
Disclosure of Invention
In view of the above situation, an object of the present invention is to provide a computer signal compensation circuit, which has the characteristics of ingenious design and humanized design, and can automatically calibrate an analog signal in a signal transmission channel for receiving a signal by a computer control terminal, thereby improving the stability of the signal and the anti-interference capability of the signal, and compensating the signal potential.
The technical scheme for solving the problem is that the computer signal compensation circuit comprises a signal receiving circuit, an operational amplifier calibration circuit and a voltage-stabilizing filter circuit, wherein the signal receiving circuit receives an analog signal at an input end in a signal transmission channel for receiving a signal at a computer control terminal, a composite circuit consisting of an inductor L1, a capacitor C1, a capacitor C2 and a triode Q1 is used for completely discharging an abnormal signal to the ground, an LC circuit consisting of the inductor L2 and the capacitor C3 is designed for filtering, the operational amplifier calibration circuit receives signals from the signal receiving circuit in two ways, one way of the signals is input into an AR1 non-inverting input end of an operational amplifier, the other way of the signals is input into a switch circuit consisting of a triode Q2, a triode Q3 and a triode Q9, and the operational amplifier AR3 is designed for comparing and processing the signals and then inputting the signals into the voltage-stabilizing filter circuit, wherein the triode Q4 feeds back the signals to an AR1 inverting input end of the operational amplifier AR1 for stabilizing the output signals of the operational amplifier AR1, the signal that the circuit of the same-phase amplification switch of the fortune amplifier AR4 outputs, it inputs the fortune amplifier AR2 comparison signal after designing at the same time in the inphase input end of fortune amplifier AR3, it inputs the power +5V in the voltage-stabilizing filter circuit through triode Q5 at the same time, play the effect of compensating the signal potential, the said voltage-stabilizing filter circuit uses the voltage-stabilizing circuit that triode Q6 and stabilivolt D3 make up finally, it designs the pi-type filter circuit that inductance L3, electric capacity C6, electric capacity C7 make up to filter and export at the same time, namely input in the signal transmission channel for computer control terminal receiving signal;
the operational amplifier calibration circuit comprises an operational amplifier AR1, wherein the non-inverting input terminal of the operational amplifier AR4 is connected with the collector of a transistor Q2 and the inverting input terminal of an operational amplifier AR2, the non-inverting input terminal of the operational amplifier AR1 is connected with the anode of a diode D1, the cathode of a diode D1 is connected with the base of a transistor Q9 and one end of a resistor R5, the other end of the resistor R5 is grounded, the collector of a transistor Q9 is connected with the base of a transistor Q2, the emitter of the transistor Q9 is connected with the collector of the transistor Q9 and the inverting input terminal of the operational amplifier AR 9 and the non-inverting input terminal of the operational amplifier AR 9, the inverting input terminal of the operational amplifier AR 9 is connected with one end of a resistor R9 and a resistor R9, the other end of the resistor R9 is grounded, the other end of the resistor R9 is connected with the output terminal of the operational amplifier AR 9, the collector of the transistor Q9 and one end of an inductor L9, the emitter of the transistor Q3 is connected with one end of the capacitor C4 and one end of the resistor R6, the other end of the resistor R6 is grounded, the other end of the capacitor C4 is connected with the non-inverting input end of the amplifier AR2 and the collector of the transistor Q7, the output end of the amplifier AR 7 is connected with one end of the resistor R7 and the base of the transistor Q7, the other end of the resistor R7 is connected with the base of the transistor Q7, the emitter of the transistor Q7 is connected with one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the inductor L7 is connected with one end of the capacitor C7, the other end of the capacitor C7 is connected with the collector of the transistor Q7, the base of the transistor Q7, one end of the resistor R7 and one end of the resistor R7, one end of the collector of the resistor R7 and the base of the transistor Q7, the emitter of the transistor Q7 is connected with the inverting input end of the power supply, and the anti-phase of the power supply of the AR 365 + V power supply, The other end of the resistor R14 and the collector of the triode Q5, the emitter of the triode Q5 is connected with one end of the resistor R12, the other end of the resistor R12 is connected with the output end of the amplifier AR3 and one end of the resistor R19, the other end of the resistor R19 is connected with the output end of the amplifier AR4, the inverting input end of the amplifier AR3 is connected with the other end of the resistor R17, and the non-inverting input end of the amplifier AR3 is connected with the other ends of the resistor R8 and the resistor R18.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages;
1, when signal receiving circuit output signal electric potential is low excessively, triode Q9, triode Q2 does not switch on, prevent disturbing normal signal, triode Q3 is used for detecting fortune and puts ware AR1 output signal electric potential simultaneously, when fortune is put ware AR1 output signal electric potential too big, triode Q3 switches on, resistance R6 is divider resistance this moment, play the effect that reduces signal electric potential, it inputs in the steady voltage filter circuit to have designed fortune to put ware AR3 comparison processing signal simultaneously, the effect of stable signal plays, wherein triode Q4 feedback signal is to fortune ware AR1 inverting input, the stability of signal and the interference killing feature of signal have been improved.
2, the operational amplifier AR2, the operational amplifier AR3 are compared and processed to the signal twice, the static operating point of the signal has been stabilized, triode Q8 is in order to prevent the signal from taking place the sudden change in the course of adjusting, play the filtered effect to the signal that the signal potential is too low, designed power +5V at the same time and input in the voltage-stabilizing filter circuit through triode Q5, triode Q5 has guaranteed to compensate under the signal transmission state, therefore realized the automatic calibration to the analog signal in the signal transmission channel for the computer control terminal received signal, to compensating the signal potential at the same time.
Drawings
FIG. 1 is a block diagram of a computer signal compensation circuit according to the present invention.
Fig. 2 is a schematic diagram of a computer signal compensation circuit according to the present invention.
Detailed Description
The foregoing and other technical matters, features and effects of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings of fig. 1 to 2. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.
In the first embodiment, a computer signal compensation circuit comprises a signal receiving circuit, an operational amplifier calibration circuit and a voltage stabilizing filter circuit, wherein the signal receiving circuit receives an analog signal at an input end in a signal transmission channel for receiving a signal at a computer control terminal, a composite circuit consisting of an inductor L1, a capacitor C1, a capacitor C2 and a triode Q1 is used for completely discharging an abnormal signal to the ground, an LC circuit consisting of an inductor L2 and a capacitor C3 is designed for filtering, the operational amplifier calibration circuit receives signals from the signal receiving circuit in two paths, one path is input into an AR1 non-inverting input end, the other path is input into a switch circuit consisting of a triode Q2, a triode Q3 and a triode Q9, and the AR3 is designed for comparing and processing the signals and then inputting into the voltage stabilizing filter circuit, wherein the triode Q4 feeds back the signal to an AR1 inverting input end to stabilize the output signal of the AR1, the signal that the circuit of the same-phase amplification switch of the fortune amplifier AR4 outputs, it inputs the fortune amplifier AR2 comparison signal after designing at the same time in the inphase input end of fortune amplifier AR3, it inputs the power +5V in the voltage-stabilizing filter circuit through triode Q5 at the same time, play the effect of compensating the signal potential, the said voltage-stabilizing filter circuit uses the voltage-stabilizing circuit that triode Q6 and stabilivolt D3 make up finally, it designs the pi-type filter circuit that inductance L3, electric capacity C6, electric capacity C7 make up to filter and export at the same time, namely input in the signal transmission channel for computer control terminal receiving signal;
the operational amplifier calibration circuit receives signals output by the signal receiving circuit in two paths, one path of the operational amplifier calibration circuit is input into the in-phase input end of the operational amplifier AR1, signal power is amplified, signal transmission rate is improved, the other path of the operational amplifier calibration circuit is input into a switching circuit consisting of a triode Q2, a triode Q3 and a triode Q9, when the potential of the output signal of the signal receiving circuit is too low, the triode Q9 and the triode Q2 are not conducted, normal signals are prevented from being interfered, meanwhile, the triode Q3 is used for detecting the potential of the output signal of the operational amplifier AR1, when the potential of the output signal of the operational amplifier AR1 is too high, the triode Q3 is conducted, at the moment, the resistor R6 is a divider resistor, the effect of reducing the signal potential is achieved, meanwhile, the operational amplifier AR3 is designed to compare and process the signals and then input into a voltage stabilizing filter circuit, the effect of stabilizing the signals is achieved, wherein the triode Q4 feeds back the signals to the anti-phase input end of the operational amplifier AR1, the effect of stabilizing the output signal of the operational amplifier AR1 is further guaranteed, the operational amplifier AR4 amplifies the signal output by the switch circuit in the same phase, the potential intensity of the signal is ensured, the operational amplifier AR2 is designed to compare the signal and then input the signal into the in-phase input end of the operational amplifier AR3, the operational amplifier AR2 and the operational amplifier AR3 compare the signal twice, the static working point of the signal is stabilized, the triode Q8 filters the signal with too low signal potential in order to prevent the signal from sudden change in the adjusting process, the power supply +5V is designed to input the signal into the voltage stabilizing filter circuit through the triode Q5, the triode Q5 ensures the compensation in the signal transmission state, therefore, the automatic calibration is realized for the analog signal in the signal transmission channel for receiving the signal by the computer control terminal, the stability of the signal and the anti-interference capability of the signal are improved, and the signal potential is compensated;
the operational amplifier calibration circuit comprises an operational amplifier AR1, wherein the non-inverting input terminal of the operational amplifier AR4 is connected with the collector of a transistor Q2 and the inverting input terminal of an operational amplifier AR2, the non-inverting input terminal of the operational amplifier AR1 is connected with the anode of a diode D1, the cathode of a diode D1 is connected with the base of a transistor Q9 and one end of a resistor R5, the other end of the resistor R5 is grounded, the collector of a transistor Q9 is connected with the base of a transistor Q2, the emitter of the transistor Q9 is connected with the collector of the transistor Q9 and the inverting input terminal of the operational amplifier AR 9 and the non-inverting input terminal of the operational amplifier AR 9, the inverting input terminal of the operational amplifier AR 9 is connected with one end of a resistor R9 and a resistor R9, the other end of the resistor R9 is grounded, the other end of the resistor R9 is connected with the output terminal of the operational amplifier AR 9, the collector of the transistor Q9 and one end of an inductor L9, the emitter of the transistor Q3 is connected with one end of the capacitor C4 and one end of the resistor R6, the other end of the resistor R6 is grounded, the other end of the capacitor C4 is connected with the non-inverting input end of the amplifier AR2 and the collector of the transistor Q7, the output end of the amplifier AR 7 is connected with one end of the resistor R7 and the base of the transistor Q7, the other end of the resistor R7 is connected with the base of the transistor Q7, the emitter of the transistor Q7 is connected with one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the inductor L7 is connected with one end of the capacitor C7, the other end of the capacitor C7 is connected with the collector of the transistor Q7, the base of the transistor Q7, one end of the resistor R7 and one end of the resistor R7, one end of the collector of the resistor R7 and the base of the transistor Q7, the emitter of the transistor Q7 is connected with the inverting input end of the power supply, and the anti-phase of the power supply of the AR 365 + V power supply, The other end of the resistor R14 and the collector of the triode Q5, the emitter of the triode Q5 is connected with one end of the resistor R12, the other end of the resistor R12 is connected with the output end of the amplifier AR3 and one end of the resistor R19, the other end of the resistor R19 is connected with the output end of the amplifier AR4, the inverting input end of the amplifier AR3 is connected with the other end of the resistor R17, and the non-inverting input end of the amplifier AR3 is connected with the other ends of the resistor R8 and the resistor R18.
In the second embodiment, on the basis of the first embodiment, the voltage stabilizing filter circuit receives the output signal of the operational amplifier calibration circuit, a voltage stabilizing circuit composed of a triode Q6 and a voltage stabilizing tube D3 is used for stabilizing the voltage and outputting the signal, the stability of the signal is further improved, meanwhile, a pi-type filter circuit composed of an inductor L3, a capacitor C6 and a capacitor C7 is designed for filtering and outputting the signal, the anti-interference performance of the signal is further improved, the signal is finally input into a signal transmission channel for receiving a computer control terminal, a collector of a triode Q6 is connected with an output end of an amplifier AR3, a base of a triode Q6 is connected with the other end of a resistor R19 and a cathode of a voltage stabilizing tube D3, a positive electrode of a voltage stabilizing tube D3 is grounded, an emitter of a triode Q6 is connected with one end of an inductor L3 and one end of a capacitor C6, the other end of a capacitor C6 is grounded, the other end of an inductor L3 is connected with one end of a capacitor C7 and one end of a resistor R15, and the other end of a capacitor C7 is grounded, the other end of the resistor R15 is connected with the signal output port.
Third implementation, on the basis of the first embodiment, the signal receiving circuit receives an analog signal at an input end in a signal transmission channel for receiving a signal at a computer control terminal, a composite circuit composed of an inductor L1, a capacitor C1, a capacitor C2 and a transistor Q1 is used to completely discharge an abnormal signal to the ground, an LC circuit filter composed of an inductor L2 and a capacitor C3 is designed to improve the anti-interference capability of the signal, one end of an inductor L2 is connected to the positive electrode of a polar capacitor C1 and a signal input port, the negative electrode of the polar capacitor C1 is connected to one end of an inductor L1 and the positive electrode of the polar capacitor C2, the other end of the inductor L1 is connected to the collector of the transistor Q1, the base of the transistor Q1 is connected to one end of a resistor R1, the other end of the resistor R1 is connected to the negative electrode of a polar capacitor C2, the emitter of the transistor Q1 is grounded, the other end of the inductor L2 is connected to one end of a capacitor C3 and one end of a resistor R2, and the other end of the capacitor C3 is grounded, the other end of the resistor R2 is connected to the non-inverting input terminal of the amplifier AR 1.
When the invention is used in detail, the computer signal compensation circuit comprises a signal receiving circuit, an operational amplifier calibration circuit and a voltage stabilizing filter circuit, wherein the signal receiving circuit receives an analog signal at an input end in a signal transmission channel for receiving a signal at a computer control terminal, a composite circuit consisting of an inductor L1, a capacitor C1, a capacitor C2 and a triode Q1 is used for completely discharging an abnormal signal to the ground, an LC circuit consisting of the inductor L2 and the capacitor C3 is designed for filtering, the operational amplifier calibration circuit receives signals from the signal receiving circuit in two ways, one way is input into an AR1 non-phase input end, signal power is amplified, signal transmission rate is improved, the other way is input into a switch circuit consisting of the triode Q2, the triode Q3 and the triode Q9, when the potential of the signal output by the signal receiving circuit is too low, the triode Q9 and the triode Q2 are not conducted, and normal signals are prevented from being interfered, meanwhile, the triode Q3 is used for detecting the signal potential output by the operational amplifier AR1, when the signal potential output by the operational amplifier AR1 is too large, the triode Q3 is conducted, the resistor R6 is a divider resistor and plays a role in reducing the signal potential, the operational amplifier AR3 is designed to compare and process signals and then input the signals into a voltage stabilizing filter circuit to play a role in stabilizing the signals, the triode Q4 feeds back signals to the inverting input end of the operational amplifier AR1 to further ensure the effect in stabilizing the signals output by the operational amplifier AR1, the operational amplifier AR4 amplifies the signals output by the switch circuit in phase and ensures the potential intensity of the signals, the operational amplifier AR2 is designed to compare and then input into the inverting input end of the operational amplifier AR3, the operational amplifier AR2 and the operational amplifier AR3 compare and process the signals twice to stabilize the static working point of the signals, and the triode Q8 plays a role in filtering the signals with too low potential in order to prevent the signals from sudden change in the adjustment process of the signals, meanwhile, a power supply +5V is designed to be input into a voltage-stabilizing filter circuit through a triode Q5, the triode Q5 ensures compensation in a signal transmission state, finally, the voltage-stabilizing filter circuit utilizes a voltage-stabilizing circuit consisting of a triode Q6 and a voltage-stabilizing tube D3, and a pi-shaped filter circuit consisting of an inductor L3, a capacitor C6 and a capacitor C7 is designed to be output after filtering, namely, the power supply +5V is input into a signal transmission channel for receiving signals at a computer control terminal.
While the invention has been described in further detail with reference to specific embodiments thereof, it is not intended that the invention be limited to the specific embodiments thereof; for those skilled in the art to which the present invention pertains and related technologies, the extension, operation method and data replacement should fall within the protection scope of the present invention based on the technical solution of the present invention.

Claims (1)

1. A computer signal compensation circuit comprises a signal receiving circuit, an operational amplifier calibration circuit and a voltage stabilizing filter circuit,
the signal receiving circuit comprises an inductor L2, one end of the inductor L2 is connected with the anode of a polar capacitor C1 and a signal input port, the cathode of the polar capacitor C1 is connected with one end of the inductor L1 and the anode of a polar capacitor C2, the other end of the inductor L1 is connected with the collector of a triode Q1, the base of the triode Q1 is connected with one end of a resistor R1, the other end of the resistor R1 is connected with the cathode of the polar capacitor C2, the emitter of the triode Q1 is grounded, the other end of the inductor L2 is connected with one end of the capacitor C3 and one end of a resistor R2, the other end of the capacitor C3 is grounded, and the other end of the resistor R2 is connected with the non-inverting input end of an amplifier AR 1;
the signal receiving circuit receives an analog signal of an input end in a signal transmission channel for receiving signals by a computer control terminal, a composite circuit consisting of an inductor L1, a capacitor C1, a capacitor C2 and a triode Q1 is used for completely discharging abnormal signals to the ground, an LC circuit consisting of the inductor L2 and the capacitor C3 is designed for filtering, the operational amplifier calibration circuit receives signals output by the signal receiving circuit in two paths, one path of the signals is input into an operational amplifier AR1 in-phase input end, the other path of the signals is input into a switch circuit consisting of a triode Q2, a triode Q3 and a triode Q9, an operational amplifier AR3 is designed for comparing and processing signals and then inputting the signals into a voltage stabilizing filter circuit, wherein a triode Q4 feeds back signals to an operational amplifier AR1 in-phase input end to achieve the effect of stabilizing the output signals of an operational amplifier AR1, the operational amplifier AR4 amplifies signals output by the switch circuit in phase, and an operational amplifier 2 is designed for comparing signals and inputting the signals into an operational amplifier AR3 in-phase input end, meanwhile, a power supply +5V is designed to be input into a voltage-stabilizing filter circuit through a triode Q5 to play a role in compensating signal potential, finally, the voltage-stabilizing filter circuit utilizes a voltage-stabilizing circuit consisting of a triode Q6 and a voltage-stabilizing tube D3, and a pi-type filter circuit consisting of an inductor L3, a capacitor C6 and a capacitor C7 is designed to be output after filtering, namely, the power supply +5V is input into a signal transmission channel for receiving signals by a computer control terminal;
the operational amplifier calibration circuit comprises an operational amplifier AR1, wherein the non-inverting input terminal of the operational amplifier AR4 is connected with the collector of a transistor Q2 and the inverting input terminal of an operational amplifier AR2, the non-inverting input terminal of the operational amplifier AR1 is connected with the anode of a diode D1, the cathode of a diode D1 is connected with the base of a transistor Q9 and one end of a resistor R5, the other end of the resistor R5 is grounded, the collector of a transistor Q9 is connected with the base of a transistor Q2, the emitter of the transistor Q9 is connected with the collector of the transistor Q9 and the inverting input terminal of the operational amplifier AR 9 and the non-inverting input terminal of the operational amplifier AR 9, the inverting input terminal of the operational amplifier AR 9 is connected with one end of a resistor R9 and a resistor R9, the other end of the resistor R9 is grounded, the other end of the resistor R9 is connected with the output terminal of the operational amplifier AR 9, the collector of the transistor Q9 and one end of an inductor L9, the emitter of the transistor Q3 is connected with one end of the capacitor C4 and one end of the resistor R6, the other end of the resistor R6 is grounded, the other end of the capacitor C4 is connected with the non-inverting input end of the amplifier AR2 and the collector of the transistor Q7, the output end of the amplifier AR 7 is connected with one end of the resistor R7 and the base of the transistor Q7, the other end of the resistor R7 is connected with the base of the transistor Q7, the emitter of the transistor Q7 is connected with one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the inductor L7 is connected with one end of the capacitor C7, the other end of the capacitor C7 is connected with the collector of the transistor Q7, the base of the transistor Q7, one end of the resistor R7 and one end of the resistor R7, one end of the collector of the resistor R7 and the base of the transistor Q7, the emitter of the transistor Q7 is connected with the inverting input end of the power supply, and the anti-phase of the power supply of the AR 365 + V power supply, The other end of the resistor R14 and the collector of the triode Q5, the emitter of the triode Q5 is connected with one end of the resistor R12, the other end of the resistor R12 is connected with the output end of the amplifier AR3 and one end of the resistor R19, the other end of the resistor R19 is connected with the output end of the amplifier AR4, the inverting input end of the amplifier AR3 is connected with the other end of the resistor R17, and the non-inverting input end of the amplifier AR3 is connected with the other ends of the resistor R8 and the resistor R18;
the voltage-stabilizing filter circuit comprises a triode Q6, a collector of a triode Q6 is connected with the output end of an amplifier AR3, a base of the triode Q6 is connected with the other end of a resistor R19 and the negative electrode of a voltage-stabilizing tube D3, the positive electrode of a voltage-stabilizing tube D3 is grounded, an emitter of the triode Q6 is connected with one end of an inductor L3 and one end of a capacitor C6, the other end of the capacitor C6 is grounded, the other end of the inductor L3 is connected with one end of the capacitor C7 and one end of a resistor R15, the other end of the capacitor C7 is grounded, and the other end of the resistor R15 is connected with a signal output port.
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