CN211880302U - Synchronous rectification control circuit and flyback isolated conversion circuit - Google Patents
Synchronous rectification control circuit and flyback isolated conversion circuit Download PDFInfo
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- CN211880302U CN211880302U CN202020416011.9U CN202020416011U CN211880302U CN 211880302 U CN211880302 U CN 211880302U CN 202020416011 U CN202020416011 U CN 202020416011U CN 211880302 U CN211880302 U CN 211880302U
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Abstract
The utility model provides a synchronous rectification control circuit and anti-excited isolated form converting circuit, anti-excited isolated form converting circuit include primary winding, first secondary winding and the secondary winding of second. The first secondary winding is used for providing a first output voltage, the second secondary winding is used for providing a second output voltage, the second secondary winding is coupled with the synchronous rectifying tube, and the synchronous rectifying control circuit generates a driving signal for driving the synchronous rectifying tube. The synchronous rectification control circuit comprises a synchronous rectification forward conduction pulse generating circuit, a reverse conduction time control circuit and a logic circuit. The input end of the logic circuit is respectively coupled with the synchronous rectification forward conduction pulse generating circuit and the reverse conduction time control circuit, and the output end of the logic circuit is coupled with the control end of the synchronous rectification tube. The utility model discloses can improve the load cross adjustment rate problem that exists among the multiplexed output isolation power supply, can be applicable to former limit feedback control, also can be applicable to vice limit feedback control, can reduce the power cost.
Description
Technical Field
The utility model belongs to the technical field of the electron, relate to switching power supply technical field, in particular to synchronous rectification control circuit and anti excited isolated inverter circuit.
Background
In a traditional dual-output isolation power supply, one output is used as feedback, and the other output is used for regulating voltage by virtue of coupling of a transformer. Fig. 1 shows a two-way isolated power supply topology, wherein if the first output (Vout1) is fully loaded and the second output (Vout2) is unloaded, and the first output is used as feedback, a surge of the second output voltage Vout2 occurs; if the first output (Vout1) is unloaded and the second output (Vout2) is loaded with the first output as feedback, the second output voltage Vout2 will be too low.
One conventional solution is to use the weighted information of the first output and the second output as feedback, as shown in fig. 2, the feedback signal VFB is K1 Vout1+ K2 Vout 2. However, the method of outputting weighted feedback needs to detect Vout1 and Vout2 at the same time to provide feedback signals, and is only suitable for secondary feedback control (SSR), and additionally uses optical couplers and other devices. The method is not suitable for obtaining the feedback signal through a primary side feedback control (PSR) approach such as an auxiliary winding, because the primary side feedback cannot obtain the difference between the first output voltage and the second output voltage.
In view of the above, there is a need to provide a new structure or control method for solving at least some of the above-mentioned problems of load cross adjustment rate.
SUMMERY OF THE UTILITY MODEL
In order to solve at least part of the problems, the utility model provides a synchronous rectification control circuit and anti-excitation isolated conversion circuit.
The utility model provides a synchronous rectification control circuit for flyback isolated converter circuit, flyback isolated converter circuit includes primary winding, first secondary winding and second secondary winding, first secondary winding is coupled first voltage output end and is used for providing first output voltage, second secondary winding is coupled second voltage output end and is used for providing second output voltage, second secondary winding is coupled synchronous rectifier tube, synchronous rectification control circuit is coupled synchronous rectifier tube and produces the drive signal who drives synchronous rectifier tube, synchronous rectification control circuit includes synchronous rectification forward conduction pulse production circuit, reverse conduction time control circuit and logic circuit; the input end of the logic circuit is respectively coupled with the output end of the synchronous rectification forward conduction pulse generating circuit and the output end of the reverse conduction time control circuit, and the output end of the logic circuit is coupled with the control end of the synchronous rectification tube.
The utility model discloses an in the embodiment, reverse conduction time control circuit's first input is coupled synchronous rectification forward conduction pulse generation circuit's output, reverse conduction time control circuit's second input is coupled the drain electrode of the vice limit winding of second and/or synchronous rectifier tube.
The utility model discloses an in the embodiment, reverse conduction time control circuit still includes: and the setting end of the trigger is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit, the resetting end of the trigger is coupled with the second secondary winding and/or the drain electrode of the synchronous rectification tube, and the output end of the trigger is coupled with the control end of the synchronous rectification tube.
The utility model discloses an in the embodiment, reverse conduction time control circuit still has the third input, reverse conduction time control circuit's third input is coupled second output voltage.
The utility model discloses an in the embodiment, logic circuit is first OR gate, and the first input of first OR gate is coupled synchronous rectification forward switches on pulse generating circuit's output, and the second input of first OR gate is coupled reverse conduction time control circuit's output, the output of first OR gate is coupled synchronous rectifier tube's control end.
In an embodiment of the utility model, reverse conduction time control circuit includes:
a first input end of the time window control circuit is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit, and a second input end of the time window control circuit is coupled with a second secondary winding and/or a drain electrode of the synchronous rectification tube;
a time length control circuit, a first input end of which is coupled with the second output voltage; and
and the first input end of the AND gate is coupled with the output end of the time window control circuit, the second input end of the AND gate is coupled with the output end of the time length control circuit, and the output end of the AND gate is coupled with the control end of the synchronous rectifier tube.
In an embodiment of the utility model, reverse conduction time control circuit includes:
a falling edge obtaining circuit, the input end of which is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit;
a first comparator, wherein a first input end of the first comparator is coupled with the second secondary winding and/or the drain electrode of the synchronous rectifier tube, and a second input end of the first comparator is coupled with a first reference voltage;
the setting end of the trigger is coupled with the output end of the falling edge acquisition circuit, and the output end of the trigger outputs the synchronous rectification reverse conduction pulse signal;
a second or gate, a first input terminal of which is coupled to the output terminal of the first comparator, and an output terminal of which is coupled to the reset terminal of the flip-flop;
the output end of the current source is coupled with the first end of the second switch;
a second switch, a second terminal of which is coupled to the first terminal of the third capacitor, and a control terminal of which is coupled to the output terminal of the trigger;
an error amplifier having a first input terminal coupled to the second output voltage and a second input terminal coupled to the second reference voltage;
a first input terminal of the second comparator is coupled to the first terminal of the third capacitor, a second input terminal of the second comparator is coupled to the output terminal of the error amplifier, and an output terminal of the second comparator is coupled to the second input terminal of the second or gate; and a third capacitance.
In an embodiment of the present invention, a delay circuit is further coupled between the falling edge obtaining circuit and the flip-flop, and the delay circuit is used to delay the set state of the flip-flop.
In an embodiment of the present invention, a voltage dividing resistor is further disposed between the second output voltage and the first input terminal of the error amplifier, and the voltage dividing resistor includes a first resistor and a second resistor; the first end of the first resistor is coupled to the second output voltage, the second end of the first resistor is coupled to the first input end of the error amplifier and the first end of the second resistor, respectively, and the second end of the second resistor is grounded.
The utility model provides a flyback isolated converter circuit, it includes primary circuit, first secondary circuit, second secondary circuit and as above-mentioned synchronous rectification control circuit, primary circuit includes primary winding and primary switch, first secondary circuit includes first secondary winding and rectifier tube, first secondary circuit provides first output voltage; the second secondary side circuit comprises a second secondary side winding and a synchronous rectifier tube, and the second secondary side circuit provides a second output voltage; the synchronous rectification control circuit is coupled with the synchronous rectification tube, and the primary winding, the first secondary winding and the second secondary winding form a transformer winding.
The utility model provides a synchronous rectification control circuit and anti-excited isolated conversion circuit, anti-excited isolated conversion circuit can include former limit circuit, first vice limit circuit and the vice limit circuit of second. The synchronous rectification control circuit is used for generating a driving signal for driving the synchronous rectification tube. The synchronous rectification control circuit controls the synchronous rectification tube to work in a reverse conduction state under a set state so as to enable the second secondary winding to transfer energy to the first secondary winding, and the reverse conduction state is that current flows from the drain electrode to the source electrode of the synchronous rectification tube. The utility model provides a synchronous rectification control circuit and anti-isolated inverter circuit that swashs can effectively improve the load cross adjustment rate problem that exists in the flyback isolation power supply of multiplexed output under the condition that does not increase circuit cost, can be applicable to former limit feedback control, also can be applicable to vice limit feedback control, can reduce power supply cost.
Drawings
Fig. 1 shows a circuit schematic diagram of a two-way flyback isolated converter circuit in the prior art.
Fig. 2 shows a circuit schematic diagram of a prior art weighted flyback isolated converter circuit.
Fig. 3 shows a schematic circuit diagram of a flyback isolated converter circuit according to an embodiment of the present invention.
Fig. 4 shows a schematic circuit diagram of a flyback isolated converter circuit according to another embodiment of the present invention.
Fig. 5 shows a waveform diagram of a signal in a conventional flyback isolated converter circuit.
Fig. 6 shows a schematic diagram of a flyback isolated converter circuit according to an embodiment of the present invention.
Fig. 7 is a schematic diagram illustrating waveforms of signals in a flyback isolated converter circuit according to an embodiment of the present invention.
Fig. 8 shows a circuit schematic diagram of a synchronous rectification control circuit according to an embodiment of the present invention.
Fig. 9 is a circuit diagram of a reverse on-time control circuit according to an embodiment of the present invention.
Fig. 10 is a circuit diagram of a reverse on-time control circuit according to an embodiment of the present invention.
Fig. 11 shows a circuit timing diagram of a flyback isolated converter circuit according to an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For further understanding of the present invention, preferred embodiments of the present invention will be described below with reference to examples, but it should be understood that these descriptions are only for the purpose of further illustrating the features and advantages of the present invention, and are not intended to limit the claims of the present invention.
The description in this section is for exemplary embodiments only, and the present invention is not limited to the scope of the embodiments described. The same or similar prior art means and some technical features of the embodiments are mutually replaced and are also within the scope of the description and the protection of the invention.
The term "coupled" or "connected" in this specification includes both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a connection made through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connections may also include connections through other active or passive devices, such as connections through switches, follower circuits, etc., that serve the same or similar functional purpose.
As shown in fig. 3, an embodiment of the present invention provides a flyback isolated converter circuit, which includes a primary circuit, a first secondary circuit, a second secondary circuit, and a synchronous rectification control circuit. The primary side circuit comprises a primary side winding Np and a primary side switch S1, the first secondary side circuit comprises a first secondary side winding Ns1 and a rectifying tube D1, and the first secondary side circuit provides a first output voltage Vout 1; the second secondary circuit includes a second secondary winding Ns2 and a synchronous rectifier SR, and provides a second output voltage Vout 2. The first secondary circuit may further include a first capacitor Co1, a first terminal of the first capacitor Co1 is coupled to the first output voltage Vout1, and a second terminal of the first capacitor Co1 is grounded. The second secondary side circuit may further include a second capacitor Co2, a first terminal of the second capacitor Co2 is coupled to the second output voltage Vout2, and a second terminal of the second capacitor Co2 is grounded. The synchronous rectification control circuit 200 is coupled to the synchronous rectification transistor SR, and the primary winding Np, the first secondary winding Ns1 and the second secondary winding Ns2 form a transformer winding 100. Wherein the rectifier D1 may be a diode or a synchronous rectifier. The synchronous rectifier may be a switching transistor. In another embodiment, the flyback isolated converter circuit may include no less than two secondary side circuits. In another embodiment, the flyback isolated converter circuit may include at least two secondary side circuits, wherein at least two of the secondary side circuits have synchronous rectifiers. In an embodiment, the flyback isolated converter circuit comprises a secondary side circuit a1 and a secondary side circuit a2, the secondary side circuit a1 comprises a synchronous rectifier tube S100 and a first synchronous rectification control circuit, the secondary side circuit a2 comprises a synchronous rectifier tube S200 and a second synchronous rectification control circuit, and under a set condition, a circulating current and energy exchange can be created between the secondary side circuit a1 and the secondary side circuit a 2.
In an embodiment of the utility model, the flyback isolated conversion circuit includes the primary winding, first secondary winding and second secondary winding, first secondary winding is coupled first voltage output end and is used for providing first output voltage, second secondary winding is coupled second voltage output end and is used for providing second output voltage, the synchronous rectifier tube is coupled to the second secondary winding, synchronous rectification control circuit is used for producing the drive signal who drives synchronous rectifier tube, synchronous rectification control circuit controls synchronous rectifier tube work under the settlement state in order to make the second secondary winding to transmit energy to first secondary winding, reverse conducting state is the drain electrode flow direction source of electric current from synchronous rectifier tube. The setting state refers to that the synchronous rectification control circuit controls the synchronous rectification tube to work in a reverse conduction state in a proper time window. The utility model discloses an in the embodiment, synchronous rectification control circuit selects certain time length in the time range of first time window with control synchronous rectifier tube work in reverse conducting state.
In an embodiment of the present invention, the synchronous rectification control circuit includes a synchronous rectification forward conduction pulse generation circuit, a reverse conduction time control circuit and a logic circuit. The input end of the logic circuit is respectively coupled with the output end of the synchronous rectification forward conduction pulse generating circuit and the output end of the reverse conduction time control circuit, and the output end of the logic circuit is coupled with the control end of the synchronous rectification tube. The synchronous rectification control circuit is used for generating a synchronous rectification forward conduction pulse signal and a synchronous rectification reverse conduction pulse signal to drive the synchronous rectification tube. The synchronous rectification forward direction conducting pulse signal in the effective state controls the current in the second secondary side circuit to flow from the source electrode to the drain electrode of the synchronous rectification tube. The synchronous rectification reverse conducting pulse signal in the effective state controls the current in the second secondary side circuit to flow from the drain electrode to the source electrode of the synchronous rectification tube. In an embodiment of the present invention, in the synchronous rectification control circuit, the driving signal is finally generated in a logical phase or relationship between the synchronous rectification forward conduction pulse signal and the synchronous rectification reverse conduction pulse signal.
As shown in fig. 4 and 5, in an embodiment of the present invention, the synchronous rectification control circuit of the flyback isolated converter circuit generates a synchronous rectification forward conduction pulse signal, and the synchronous rectification forward conduction pulse signal in the active state controls the current Is2 in the second secondary circuit to flow from the source to the drain of the synchronous rectifier tube. As shown in fig. 5, when the switching signal of the primary switch S1 is active in the primary circuit, the primary current Ip increases accordingly. When the switching signal of the side switch S1 is in an inactive state, the first and second sub-side circuits start demagnetization. The current Is1 in the first secondary circuit and the current Is2 in the second secondary circuit decrease accordingly. Under the effect of the load cross regulation, the time for the synchronous rectifier SR to flow current is shorter than the time for the rectifier D1 to flow current. The voltage Vsec2 across the second secondary winding gradually decreases and oscillates after the freewheeling ends, which causes a problem of load cross regulation in the flyback isolated converter circuit.
The utility model discloses an in the embodiment, synchronous rectification control circuit in the second secondary circuit by after the electric current that the source flow direction drain electrode of synchronous rectifier tube descends to zero moment, produce synchronous rectification reverse conduction pulse signal in order to drive synchronous rectifier tube makes the electric current in the synchronous rectification reverse conduction pulse signal control second secondary circuit of active state by the drain electrode flow direction source electrode of synchronous rectifier tube. As shown in fig. 6 and 7, after the time when the current Is2 in the second secondary circuit drops from positive to zero, the synchronous rectification control circuit controls to output a synchronous rectification reverse conduction pulse signal to drive the synchronous rectifier tube, at this time, the current Is2 in the second secondary circuit increases in a reverse direction, the current Is2 Is a negative value, that Is, the current Is2 Is reversed (as shown by a dotted arrow in fig. 6, the current Is in a counterclockwise direction), at this time, the second secondary circuit transmits energy to the first secondary circuit through the transformer winding, and the problem of load cross regulation rate of the multi-path flyback isolated conversion circuit can be effectively solved.
The utility model discloses an in an embodiment, the time window interval of the synchronous rectification reverse conduction pulse signal of synchronous rectification control circuit control active state is first time window, the starting time point of first time window be in the second secondary circuit by the source flow direction drain electrode of synchronous rectifier tube descends for zero moment, and the ending time point of first time window is the moment that all secondary circuits in the isolated inverter circuit of flyback all follow current end, and synchronous rectification reverse conduction pulse signal produces active state in first time window.
The utility model discloses an in the embodiment, synchronous rectification control circuit includes the trigger, and time window control circuit makes the trigger be in the setting state according to synchronous rectification forward conduction pulse signal's falling edge, and time window control circuit is in the reset state with control trigger according to the both ends voltage of the vice limit winding of second and/or the drain voltage of synchronous rectifier tube and first reference voltage's comparison result, and the output of trigger represents the pulse signal of first time window. In an embodiment of the present invention, when the voltage across the second secondary winding is greater than the first reference voltage, or the drain voltage of the synchronous rectifier is greater than the first reference voltage, the time window control circuit controls the flip-flop to be in the reset state.
In an embodiment of the present invention, the synchronous rectification control circuit is coupled to the second output voltage, and the synchronous rectification control circuit controls the time length of the reverse conducting pulse signal according to the synchronous rectification of the effective state of the second output voltage.
In an embodiment of the present invention, as shown in fig. 8, the synchronous rectification control circuit 200 includes a synchronous rectification forward conduction pulse generating circuit 210, a reverse conduction time control circuit 220 and a first or gate. The synchronous rectification forward conduction pulse generating circuit 210 is used for generating a synchronous rectification forward conduction pulse signal SR _ PWM. The Reverse conduction time control circuit 220 is used for generating a synchronous rectification Reverse conduction Pulse signal SR _ Reverse _ Pulse. The input end of the first or Gate is coupled to the output end of the synchronous rectification forward conducting pulse generating circuit 210 and the output end of the reverse conducting time control circuit 220, respectively, and the output end of the first or Gate outputs the driving signal SR Gate of the synchronous rectification tube. In another embodiment of the present invention, the first input terminal of the reverse conduction time control circuit 220 is coupled to the output terminal of the synchronous rectification forward conduction pulse generating circuit 210, the second input terminal of the reverse conduction time control circuit 220 is coupled to the drain terminal of the second secondary winding and/or the synchronous rectifier SR, and the synchronous rectification control circuit controls the time window interval of the synchronous rectification reverse conduction pulse signal in the effective state according to the signal received by the first input terminal and the second input terminal. The received signals are respectively a synchronous rectification forward direction conducting pulse signal SR _ PWM and a voltage Vsec2 at two ends of the second secondary winding, and the received signals also can be respectively the synchronous rectification forward direction conducting pulse signal SR _ PWM and a drain voltage Vdrain of the synchronous rectifier tube.
In an embodiment of the present invention, as shown in fig. 9, the reverse on-time control circuit 220 includes a time window control circuit 221, a time length control circuit 222, and an and gate. A first input terminal of the time window control circuit 221 is coupled to the output terminal of the synchronous rectification forward conducting pulse generating circuit to receive the synchronous rectification forward conducting pulse signal SR _ PWM. The second input terminal of the time window control circuit 221 is coupled to the second secondary winding and/or the drain of the synchronous rectifier, and the time window control circuit 221 is configured to control a time window interval of the synchronous rectification reverse conducting pulse signal in an active state. The first input terminal of the time length control circuit 222 is coupled to the second output voltage Vout2, and the second input terminal of the time length control circuit 222 is coupled to the output terminal of the and gate. A first input terminal of the and gate is coupled to the output terminal of the time window control circuit 221, a second input terminal of the and gate is coupled to the output terminal of the time length control circuit 222, an output terminal of the and gate is coupled to the first or gate, and an output terminal of the and gate outputs the synchronous rectification Reverse conduction Pulse signal SR _ Reverse _ Pulse. The time length control circuit 222 is used for controlling the time length of the synchronous rectification reverse conducting pulse signal of the active state according to the second output voltage Vout 2.
In an embodiment of the present invention, as shown in fig. 10, the reverse on-time control circuit 220 includes a falling edge obtaining circuit, a first comparator COM1, a flip-flop, a second or gate, a current source I1, a second switch S2, an error amplifier, a second comparator COM2, and a third capacitor C3. The input end of the falling edge acquisition circuit is coupled with the output end of the synchronous rectification forward conduction pulse generation circuit. In the embodiment of fig. 10, the falling edge acquisition circuit includes a not gate and a rising edge acquisition circuit. A first input terminal of the first comparator COM1 is coupled to the second secondary winding and/or the drain of the synchronous rectifier, and a second input terminal of the first comparator COM1 is coupled to the first reference voltage Vref 1. The setting end S of the trigger is coupled with the output end of the falling edge acquisition circuit, and the output end Q of the trigger outputs a synchronous rectification Reverse conduction Pulse signal SR _ Reverse _ Pulse. A first input terminal of the second or-gate is coupled to the output terminal of the first comparator COM1, and an output terminal of the second or-gate is coupled to the reset terminal R of the flip-flop. An output terminal of the current source I1 is coupled to a first terminal of the second switch S2. The second terminal of the second switch S2 is coupled to the first terminal of the third capacitor C3. The output terminal Q of the flip-flop is coupled to the control terminal of the second switch S2 to control the switching state of the second switch S2, and when the synchronous rectified Reverse conducting Pulse signal SR _ Reverse _ Pulse is in an active state, the output terminal Q of the flip-flop controls the second switch S2 to maintain the closed conducting state. When the synchronous rectification Reverse conduction Pulse signal SR _ Reverse _ Pulse is in an inactive state, the second switch S2 is controlled to maintain an off state. The first input terminal of the error amplifier is coupled to the second output voltage Vout2, and the second input terminal of the error amplifier is coupled to the second reference voltage Vref 2. A first input terminal of the second comparator COM2 is coupled to the first terminal of the third capacitor C3, a second input terminal of the second comparator COM2 is coupled to the output terminal of the error amplifier, and an output terminal of the second comparator COM2 is coupled to the second input terminal of the second or gate. When the synchronous rectification Reverse conduction Pulse signal SR _ Reverse _ Pulse is in an active state, the synchronous rectification Reverse conduction Pulse signal in the active state controls the second switch S2 to be switched on and off, at this time, the current source I1 charges the third capacitor C3, at this time, the voltage VC3 at the same-direction input end of the second comparator COM2 gradually rises, and when the voltage VC3 is greater than the voltage at the opposite-direction input end of the second comparator COM2, the trigger is controlled to be in a reset state, so that the time length of the synchronous rectification Reverse conduction Pulse signal in the active state is controlled. As shown in fig. 10, the first input terminal of the error amplifier EA is a non-inverting input terminal, and the second input terminal thereof is an inverting input terminal. In an embodiment of the present invention, a voltage dividing resistor is further coupled between the first input terminal of the error amplifier EA and the second output voltage Vout2, the voltage dividing resistor includes a first resistor R1 and a second resistor R2, the first end of the first resistor R1 is coupled to the second output voltage Vout2, the second end of the first resistor R1 is coupled to the first input terminal of the error amplifier EA and the first end of the second resistor R2, and the second end of the second resistor R2 is grounded.
In another embodiment of the present invention, a delay circuit is further coupled between the falling edge acquisition circuit and the flip-flop, the delay circuit for delaying the set state of the flip-flop. As shown in fig. 11, after the time when the current Is2 in the second secondary circuit drops from positive to zero, unlike fig. 7, the synchronous rectification control circuit does not immediately control to output the synchronous rectification reverse conduction pulse signal in the active state, and after the delay time period a, the synchronous rectification control circuit outputs the synchronous rectification reverse conduction pulse signal in the active state to drive the synchronous rectifier tube. At this time, the current Is2 in the second secondary side circuit increases reversely, Is2 Is a negative value, namely, the current Is2 reverses, and the synchronous rectification reverse conduction pulse signal in an effective state stops being output before all secondary side circuits finish freewheeling. As shown in fig. 11, the voltage Vsec2 across the second secondary winding changes in section B in response to the voltage signal change in response to the synchronous rectified reverse conducting pulse signal in the active state. As shown in fig. 11, the range of the time window interval of the synchronous rectification reverse conduction pulse signal is the effective state indicated by the double-headed arrow. The time length of the synchronous rectification Reverse conducting Pulse signal with the range indicated by an arrow on the coordinate axis of the synchronous rectification Reverse conducting Pulse signal SR _ Reverse _ Pulse as an effective state. In another embodiment of the present invention, the synchronous rectification control circuit further comprises a time period selecting circuit, and the time period selecting circuit is used for selecting a specific time length within the time window interval to output the synchronous rectification reverse conduction pulse signal in the effective state.
The utility model provides a reverse excitation isolated form converting circuit, it includes primary side circuit, first secondary circuit, second secondary circuit and as above synchronous rectification control circuit. The primary side circuit comprises a primary side winding and a primary side switch, the first secondary side circuit comprises a first secondary side winding and a rectifying tube, and the first secondary side circuit provides a first output voltage. The second secondary side circuit includes a second secondary side winding and a synchronous rectifier, the second secondary side circuit providing a second output voltage. The synchronous rectification control circuit is coupled with the synchronous rectification tube, and the primary winding, the first secondary winding and the second secondary winding form a transformer winding.
In an embodiment of the present invention, when the synchronous rectification reverse conduction pulse signal in the active state controls the current in the second secondary circuit to flow to the source through the drain of the synchronous rectification tube, the second secondary circuit transmits energy to the first secondary circuit through the transformer winding.
The utility model discloses an embodiment has still provided a synchronous rectification control method for flyback isolated converter circuit, flyback isolated converter circuit includes primary winding, first secondary winding and the secondary winding of second, first secondary winding is coupled first voltage output end and is used for providing first output voltage, the secondary winding of second is coupled second voltage output end and is used for providing second output voltage, the synchronous rectifier tube is coupled to the secondary winding of second, synchronous rectification control circuit is used for producing the drive signal of synchronous rectifier tube, and synchronous rectification control method includes:
s1, generating a synchronous rectification forward direction conducting pulse signal; and
and S2, generating a synchronous rectification reverse conduction pulse signal according to the synchronous rectification forward conduction pulse signal, wherein the synchronous rectification reverse conduction pulse signal in an effective state is used for controlling the current in the second secondary side circuit to flow from the drain electrode to the source electrode of the synchronous rectification tube so as to promote the second secondary side winding to transfer energy to the first secondary side winding.
The utility model discloses an in the embodiment, the process of switching on pulse signal according to synchronous rectification forward to generate synchronous rectification reverse switching on pulse signal still includes: the time window interval of the synchronous rectification reverse conduction pulse signal for controlling the effective state is a first time window, the starting time point of the first time window is the time when the current flowing from the source electrode to the drain electrode of the synchronous rectification tube in the second secondary side circuit is reduced to zero, the ending time point of the first time window is the time when all secondary side circuits in the flyback isolated conversion circuit finish follow current, and the synchronous rectification reverse conduction pulse signal generates the effective state in the first time window.
The utility model discloses an in the embodiment, the process of switching on pulse signal according to synchronous rectification forward to generate synchronous rectification reverse switching on pulse signal still includes: and controlling the time length of the synchronous rectification reverse conduction pulse signal in the effective state according to the second output voltage.
The utility model discloses an in the embodiment, the both ends voltage that switches on pulse signal and the secondary winding of second according to synchronous rectification forward and/or the drain voltage of synchronous rectifier tube are the time window interval of the reverse pulse signal that switches on of synchronous rectification with control effective state for first time window.
The utility model provides a synchronous rectification control circuit and flyback isolated conversion circuit can effectively improve the load cross adjustment rate problem that exists in the multichannel output flyback isolation power under the condition that does not increase circuit cost, can be applicable to former limit feedback control, also can be applicable to vice limit feedback control, and multichannel output circuit can be keep apart or altogether, can reduce power cost.
The above description and applications of the present invention are illustrative and are not intended to limit the scope of the invention to the above described embodiments. The descriptions related to the effects or advantages mentioned in the embodiments may not be reflected in the experimental examples due to the uncertainty of the specific condition parameters, and are not used for limiting the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the present invention.
Claims (10)
1. A synchronous rectification control circuit for a flyback isolated conversion circuit comprises a primary winding, a first secondary winding and a second secondary winding, wherein the first secondary winding is coupled with a first voltage output end and used for providing a first output voltage, the second secondary winding is coupled with a second voltage output end and used for providing a second output voltage, the second secondary winding is coupled with a synchronous rectifier tube, and the synchronous rectification control circuit is coupled with the synchronous rectifier tube and generates a driving signal for driving the synchronous rectifier tube; the input end of the logic circuit is respectively coupled with the output end of the synchronous rectification forward conduction pulse generating circuit and the output end of the reverse conduction time control circuit, and the output end of the logic circuit is coupled with the control end of the synchronous rectification tube.
2. The synchronous rectification control circuit of claim 1, wherein a first input terminal of the reverse conduction time control circuit is coupled to an output terminal of the synchronous rectification forward conduction pulse generation circuit, and a second input terminal of the reverse conduction time control circuit is coupled to a second secondary winding and/or a drain of the synchronous rectification tube.
3. The synchronous rectification control circuit of claim 2, wherein the reverse conduction time control circuit further comprises:
and the setting end of the trigger is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit, the resetting end of the trigger is coupled with the second secondary winding and/or the drain electrode of the synchronous rectification tube, and the output end of the trigger is coupled with the control end of the synchronous rectification tube.
4. The synchronous rectification control circuit of claim 1, wherein the reverse conduction time control circuit further has a third input terminal, the third input terminal of the reverse conduction time control circuit being coupled to the second output voltage.
5. The synchronous rectification control circuit of claim 1, wherein the logic circuit is a first or gate, a first input terminal of the first or gate is coupled to the output terminal of the synchronous rectification forward conduction pulse generation circuit, a second input terminal of the first or gate is coupled to the output terminal of the reverse conduction time control circuit, and an output terminal of the first or gate is coupled to the control terminal of the synchronous rectification transistor.
6. The synchronous rectification control circuit of claim 1, wherein the reverse conduction time control circuit comprises:
a first input end of the time window control circuit is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit, and a second input end of the time window control circuit is coupled with a second secondary winding and/or a drain electrode of the synchronous rectification tube;
a time length control circuit, a first input end of which is coupled with the second output voltage; and
and the first input end of the AND gate is coupled with the output end of the time window control circuit, the second input end of the AND gate is coupled with the output end of the time length control circuit, and the output end of the AND gate is coupled with the control end of the synchronous rectifier tube.
7. The synchronous rectification control circuit of claim 1, wherein the reverse conduction time control circuit comprises: a falling edge obtaining circuit, the input end of which is coupled with the output end of the synchronous rectification forward conduction pulse generating circuit;
a first comparator, wherein a first input end of the first comparator is coupled with the second secondary winding and/or the drain electrode of the synchronous rectifier tube, and a second input end of the first comparator is coupled with a first reference voltage;
the setting end of the trigger is coupled with the output end of the falling edge acquisition circuit, and the output end of the trigger outputs the synchronous rectification reverse conduction pulse signal;
a second or gate, a first input terminal of which is coupled to the output terminal of the first comparator, and an output terminal of which is coupled to the reset terminal of the flip-flop;
the output end of the current source is coupled with the first end of the second switch;
a second switch, a second terminal of which is coupled to the first terminal of the third capacitor, and a control terminal of which is coupled to the output terminal of the trigger;
an error amplifier having a first input terminal coupled to the second output voltage and a second input terminal coupled to the second reference voltage;
a first input terminal of the second comparator is coupled to the first terminal of the third capacitor, a second input terminal of the second comparator is coupled to the output terminal of the error amplifier, and an output terminal of the second comparator is coupled to the second input terminal of the second or gate; and
and a third capacitor.
8. The synchronous rectification control circuit of claim 7, wherein a delay circuit is further coupled between the falling edge acquisition circuit and the flip-flop, the delay circuit configured to delay a set state of the flip-flop.
9. The synchronous rectification control circuit of claim 7, wherein a voltage dividing resistor is further disposed between the second output voltage and the first input terminal of the error amplifier, the voltage dividing resistor comprising a first resistor and a second resistor; the first end of the first resistor is coupled to the second output voltage, the second end of the first resistor is coupled to the first input end of the error amplifier and the first end of the second resistor, respectively, and the second end of the second resistor is grounded.
10. A flyback isolated converter circuit, comprising a primary circuit, a first secondary circuit, a second secondary circuit and a synchronous rectification control circuit as claimed in any one of claims 1 to 9, wherein the primary circuit comprises a primary winding and a primary switch, the first secondary circuit comprises a first secondary winding and a rectifying tube, and the first secondary circuit provides a first output voltage; the second secondary side circuit comprises a second secondary side winding and a synchronous rectifier tube, and the second secondary side circuit provides a second output voltage; the synchronous rectification control circuit is coupled with the synchronous rectification tube, and the primary winding, the first secondary winding and the second secondary winding form a transformer winding.
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| CN202020416011.9U CN211880302U (en) | 2020-03-27 | 2020-03-27 | Synchronous rectification control circuit and flyback isolated conversion circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111313709A (en) * | 2020-03-27 | 2020-06-19 | 杭州必易微电子有限公司 | Synchronous rectification control circuit, control method thereof and flyback isolated conversion circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111313709A (en) * | 2020-03-27 | 2020-06-19 | 杭州必易微电子有限公司 | Synchronous rectification control circuit, control method thereof and flyback isolated conversion circuit |
| CN111313709B (en) * | 2020-03-27 | 2024-07-02 | 杭州必易微电子有限公司 | Synchronous rectification control circuit, control method thereof and flyback isolated conversion circuit |
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