CN211878126U - Testing device adaptive to various CCD driving circuits - Google Patents
Testing device adaptive to various CCD driving circuits Download PDFInfo
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- CN211878126U CN211878126U CN202020460582.2U CN202020460582U CN211878126U CN 211878126 U CN211878126 U CN 211878126U CN 202020460582 U CN202020460582 U CN 202020460582U CN 211878126 U CN211878126 U CN 211878126U
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Abstract
The utility model discloses a multiple CCD drive circuit's of adaptation testing arrangement, the device mainly comprise CCD drive circuit interface module, host system, the mutual module of demonstration and USB interface module that awaits measuring. Utilize the utility model discloses can the multiple CCD drive circuit of adaptation and carry out the function detection to it, prevent because drive circuit because the CCD device that work leads to unusually damages when dispatching from the factory to can generate the test report and inform test engineer through showing interactive module, can carry out the copy of firmware update and test report data through USB interface module simultaneously. The utility model has the advantages of convenient use, high cost performance, high test efficiency and the like. The test method is suitable for test application in mass production of CCD drive circuits.
Description
Technical Field
The utility model provides a multiple CCD drive circuit's of adaptation testing arrangement relates to CCD drive circuit's function and detects, belongs to circuit test instrument field.
Background
Due to the limitation of industrial technology, the values of produced circuit components always have certain deviation; functional abnormalities may also exist in the production process of the circuit printed circuit board due to process limitations; when the components are welded by machines or manually, tombstoning, insufficient solder and other defects can be generated. Therefore, the produced circuit system needs to be subjected to functional testing before it is shipped out.
For a circuit system containing a CCD, if the circuit system works abnormally, the CCD is easily burnt out when the circuit system is powered on under the condition of being provided with the CCD. However, the price of the CCD on the market is thousands, tens of thousands, etc., if the CCD is burnt out, the production cost is increased, and the development of the product is not facilitated, so the CCD driving circuit is often tested first, and the CCD is connected to be tested next.
A general test method of the CCD driving circuit is a manual test, which measures the timing sequence of the CCD driving signal by an oscilloscope or a logic analyzer and displays it for observation by human eyes. The testing engineer is required to have good professional literacy and judgment capability, so that the detection efficiency is low, and the batch testing in the CCD driving circuit is not facilitated. Meanwhile, when a CCD driving circuit needs to be replaced, a test engineer needs to be retrained, which increases labor and time costs.
Disclosure of Invention
In order to overcome the above problems, an object of the present invention is to provide a testing device for adapting multiple CCD driving circuits. Utilize the utility model discloses can the multiple CCD drive circuit of adaptation and carry out the function detection to it, prevent that drive circuit from damaging owing to the CCD device that work leads to unusually when dispatching from the factory to can generate the test report and inform test engineer through showing mutual module, can carry out the data copy of firmware update and test report through USB interface module simultaneously. The test method is suitable for test application in mass production of CCD drive circuits.
The utility model discloses a following technical scheme realizes:
a testing device adaptive to various CCD driving circuits mainly comprises a CCD driving circuit interface module to be tested, a main control module, a display interaction module and a USB interface module. The CCD driving circuit interface module to be tested consists of a CCD driving circuit interface to be tested, a circuit signal selection module, a time sequence processing module, a power supply signal processing module and a CCD signal output module.
The CCD driving circuit interface module to be tested is connected with the CCD driving interface of the CCD driving circuit to be tested, and the CCD driving circuit interface to be tested in the CCD driving circuit interface module to be tested receives a time sequence and a power signal from the CCD driving interface of the CCD driving circuit to be tested and then transmits the signal to the circuit signal selection module. Meanwhile, the CCD driving circuit interface receives the electric signal converted from the analog optical signal from the circuit signal selection module and the time sequence feedback signal, and then outputs the electric signal and the time sequence feedback signal to the CCD driving circuit.
The circuit signal selection module receives the control signal from the main control module, and selects the on-off of the timing sequence and the power supply signal of the CCD drive circuit received by the CCD drive interface of the CCD drive circuit to be tested and the electric signal and the timing sequence feedback signal converted from the analog optical signal output by the CCD signal output module. When a pin of the CCD driving circuit interface, which is connected with the circuit signal selection module, is a time sequence signal input pin of the CCD, the pin is connected to the time sequence processing module; when the pin is a CCD power input signal pin, the pin is connected to a power signal processing module; when the pin is a CCD analog output pin or a timing signal feedback pin, the pin is connected to a CCD signal output module.
And the time sequence processing module processes time sequence signals input by the CCD driving circuit through the signal selection module and the to-be-detected CCD driving circuit interface, and the level is converted into a logic level meeting the requirement of the main control module core FPGA.
The power signal processing module performs analog-to-digital conversion on a power signal input by the CCD driving circuit through the signal selection module and the CCD driving circuit interface to be detected, and the converted digital signal is transmitted to the main control module taking the FPGA as a core.
And the main control module judges by receiving the power supply information obtained after the processing of the power supply processing module and the time sequence information processed by the time sequence processing module. And if the time sequence and the power supply information are normal, the main control module drives the CCD signal output module to output an electric signal converted from the analog optical signal and a time sequence feedback signal through the signal selection module and the CCD driving circuit interface to be detected.
The display interaction module is communicated with the main control module. On one hand, the test engineer controls the test engineer to select the corresponding CCD model, and on the other hand, the test engineer receives the detection information from the main control module and displays the detection information to inform the test engineer.
The USB interface module can be connected with the main control module to update the firmware of the device or output a test report output by the main control module.
The utility model has the advantages that:
1. the utility model relates to a compare with traditional test and have advantages such as convenient to use, sexual valence relative altitude, efficiency of software testing height. The test method is suitable for test application in mass production of CCD drive circuits.
2. The utility model relates to a compare with the artifical test mode of tradition, provide the signal of telecommunication and the chronogenesis feedback signal of analog light signal conversion, more favorable carries out functional test to whole CCD drive circuit.
3. The utility model uses FPGA as the core component of the main control module, and utilizes the congenital advantages of FPGA, thereby being beneficial to high-efficiency parallel time sequence detection and improving the working efficiency of the whole device;
4. the utility model relates to a can test it by the multiple CCD drive circuit of adaptation, improve the utilization ratio of device.
Drawings
Fig. 1 is a schematic structural diagram of a testing device adapted to various CCD driving circuits.
Fig. 2 is a schematic structural diagram of a CCD drive circuit interface module of the present apparatus.
The main symbols in the figures are illustrated as follows:
1-display interaction module 2-main control module
3-CCD drive circuit interface module to be tested 4-USB interface module
5-CCD drive circuit interface to be tested 6-circuit signal selection module
7-time sequence processing module 8-CCD signal output module
9-power signal processing module
Detailed Description
The present invention will be further described with reference to the accompanying drawings.
As shown in the figure, the utility model provides a multiple CCD drive circuit's of adaptation testing arrangement, the device mainly comprise CCD drive circuit interface module 3, host system 2, the mutual module 1 of demonstration and USB interface module 4 that awaits measuring. The to-be-tested CCD driving circuit interface module 3 is composed of a to-be-tested CCD driving circuit interface 5, a circuit signal selection module 6, a time sequence processing module 7, a power supply signal processing module 9 and a CCD signal output module 8.
The display interaction module 1 receives a control signal from a test engineer, selects the model of the CCD, and transmits the model information of the CCD to the main control module 2.
The main control module 2 controls the circuit signal selection module 6 to select the on or off of the electric signal and the time sequence feedback signal converted from the time sequence of the CCD drive circuit received by the CCD drive circuit interface 5 to be tested, the power signal and the analog optical signal output by the CCD signal output module 8. When the pin connecting the CCD driving circuit interface 5 and the circuit signal selection module 6 is the time sequence signal input pin of the CCD, the pin is connected to the time sequence processing module 7; when the pin is a CCD power input signal pin, the pin is connected to a power signal processing module 9; when the pin is a CCD analog or digital signal output pin, the pin is connected to the CCD signal output module 8.
The CCD driving circuit interface module 3 to be tested is connected with the CCD driving interface of the CCD driving circuit to be tested, and the CCD driving circuit interface 5 to be tested in the module receives a time sequence and a power supply signal from the CCD driving circuit and sends the time sequence and the power supply signal to the circuit signal selection module 6. Meanwhile, the CCD driving circuit interface 5 receives the electrical signal converted from the analog optical signal from the circuit signal selection module 6 and the timing feedback signal, and further outputs the signal to the CCD driving circuit to be tested.
And the time sequence processing module 7 processes time sequence signals input by the CCD driving circuit through the signal selection module 6 and the CCD driving circuit interface 5 to be detected, and the level is converted into a logic level meeting the requirement of the core FPGA of the main control module 2.
The power signal processing module 9 performs analog-to-digital conversion on the power signal input by the CCD driving circuit through the signal selection module 6 and the CCD driving circuit interface 5 to be detected, and the converted digital signal is transmitted to the main control module 2 taking the FPGA as a core.
And the main control module 2 receives the power supply information obtained after the processing of the power supply processing module 9 and the time sequence information processed by the time sequence processing module 7 for judgment. If the time sequence and the power supply information are normal, the main control module drives the CCD signal output module 8 to output an electric signal converted from an analog optical signal and a time sequence feedback signal through the signal selection module 6 and the CCD driving circuit interface 5 to be tested.
The display interaction module 1 receives the detection information from the main control module 2, and displays and informs a test engineer.
The USB interface module 4 is connected with the main control module, and is used for updating the firmware of the device or outputting a test report output by the main control module.
Claims (3)
1. The utility model provides a testing arrangement of multiple CCD drive circuit of adaptation, the device mainly comprises CCD drive circuit interface module, host system, demonstration interaction module and USB interface module that awaits measuring, its characterized in that: the main control module receives and processes related signals from the CCD driving circuit interface module to be detected and outputs the related signals to the CCD driving circuit interface to be detected, and the main control module is simultaneously connected with the display interaction module and the USB interface module.
2. The testing device is characterized in that a CCD driving circuit interface module to be tested is composed of a CCD driving circuit interface to be tested, a circuit signal selection module, a time sequence processing module, a power signal processing module and a CCD signal output module, the CCD driving circuit interface to be tested is connected with the circuit signal selection module, and the time sequence processing module, the power signal processing module and the CCD signal output module are respectively connected with the CCD driving circuit interface to be tested.
3. A testing device adaptive to various CCD drive circuits is characterized in that a hardware core of a main control module for signal detection processing and data analysis in a system is an FPGA.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202020460582.2U CN211878126U (en) | 2020-04-02 | 2020-04-02 | Testing device adaptive to various CCD driving circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202020460582.2U CN211878126U (en) | 2020-04-02 | 2020-04-02 | Testing device adaptive to various CCD driving circuits |
Publications (1)
Publication Number | Publication Date |
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CN211878126U true CN211878126U (en) | 2020-11-06 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN202020460582.2U Expired - Fee Related CN211878126U (en) | 2020-04-02 | 2020-04-02 | Testing device adaptive to various CCD driving circuits |
Country Status (1)
Country | Link |
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CN (1) | CN211878126U (en) |
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2020
- 2020-04-02 CN CN202020460582.2U patent/CN211878126U/en not_active Expired - Fee Related
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GR01 | Patent grant | ||
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20201106 Termination date: 20210402 |
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CF01 | Termination of patent right due to non-payment of annual fee |