CN211826343U

CN211826343U - Test platform for semiconductor chip

Info

Publication number: CN211826343U
Application number: CN201922140872.9U
Authority: CN
Inventors: 刘冲; 李振华
Original assignee: Biwin Storage Technology Co Ltd
Current assignee: Biwin Storage Technology Co Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2020-10-30
Anticipated expiration: 2029-11-29

Abstract

The utility model discloses a test platform of semiconductor chip, this test platform includes the base and arranges test fixture, test mainboard, display screen and a plurality of function switch on the base, test fixture includes bottom plate, apron and conductive contact, the bottom plate is located on the base, and has the test chamber that can hold semiconductor chip on the bottom plate, the apron activity sets up on the bottom plate and can block off the open end of test chamber, and the apron can support with the semiconductor chip of arranging in the test chamber and hold, conductive contact is located in the test chamber and can be connected with the pin electricity of semiconductor chip; the test mainboard is respectively electrically connected with the conductive contact, the display screen and the function switch. The utility model discloses be favorable to increasing semiconductor chip's efficiency of software testing and reduce semiconductor chip's test cost.

Description

Test platform for semiconductor chip

Technical Field

The utility model relates to a chip testing technology field, concretely relates to semiconductor chip's test platform.

Background

As is well known, a semiconductor chip is a semiconductor device which is formed by etching and wiring on a semiconductor wafer and can perform a certain function, but after the semiconductor chip is manufactured, a corresponding function test is generally required to be performed to facilitate the performance test of the semiconductor chip.

At present, in order to perform a function test on a semiconductor chip, a mobile phone motherboard is mostly directly used, the semiconductor chip is welded on the mobile phone motherboard, and then whether correct operation feedback is displayed on a mobile phone screen is observed through manually operating the mobile phone, so as to obtain a test result.

However, the testing method requires that the semiconductor chip is soldered on the mobile phone motherboard, which may cause some damage to the mobile phone motherboard, and the mobile phone motherboard needs to be repaired when necessary, thereby resulting in higher testing cost.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a main aim at provides a semiconductor chip's test platform aims at solving current semiconductor chip test mode and has the higher technical problem of test cost.

In order to solve the technical problem, the utility model provides a test platform of semiconductor chip, this test platform includes the base and arranges test fixture, test mainboard, display screen and a plurality of function switch on the base, test fixture includes bottom plate, apron and conductive contact, the bottom plate is located on the base, and has the test chamber that can hold semiconductor chip on the bottom plate, the apron activity sets up on the bottom plate and can block off the open end of test chamber, and the apron can support with the semiconductor chip of arranging in the test chamber and hold, conductive contact is located the test chamber and can be connected with the pin electricity of semiconductor chip; the test mainboard is respectively electrically connected with the conductive contact, the display screen and the function switch.

Preferably, the cover plate includes a substrate, a supporting block and a first elastic member, the supporting block is connected to the substrate through the first elastic member, and the supporting block can support the semiconductor chip in the test cavity.

Preferably, one side of the base plate is hinged to the bottom plate, so that the base plate can rotate around a hinge shaft and close the open end of the test chamber.

Preferably, a first groove is formed in the front end of the substrate, a fixed shaft, a clamping piece sleeved on the fixed shaft and a second elastic piece are arranged in the first groove, one end of the second elastic piece is connected with the bottom of the first groove, and the other end of the second elastic piece abuts against the clamping piece; a second groove is formed in one side of the test cavity, a rod body is arranged in the second groove, and the buckling piece can be in buckling fit with the rod body to fix the substrate.

Preferably, the base plate is provided with an installation cavity, a partial area of the abutting block is located in the installation cavity and hinged to the base plate, and the abutting block and a hinged shaft of the base plate and the bottom plate are arranged in parallel.

Preferably, the test platform of the semiconductor chip further comprises a voltage and current meter arranged on the base and electrically connected with the test main board, the function switch comprises a first button switch, the first button switch is provided with three gears, and the three gears respectively correspond to the current meter switch, the voltage meter switch and the voltage and current meter switch.

Preferably, the test platform of the semiconductor chip further comprises an external power supply interface which is arranged on the base and electrically connected with the test mainboard.

Preferably, the test platform of the semiconductor chip further comprises a battery arranged on the base and electrically connected with the test main board, and the function switch further comprises a second button switch, wherein the second button switch is provided with three gears, and the three gears respectively correspond to a battery power switch, an external power switch and a power switch.

Preferably, the function switch further comprises five function buttons, and the five function buttons respectively correspondingly control the start and stop of the test mainboard and the up-down, left-right movement of the cursor on the display screen.

The embodiment of the utility model provides a semiconductor chip's test platform tests semiconductor chip and shows the corresponding data of test through the display screen through setting up test fixture on the base to make things convenient for the tester to judge semiconductor chip's performance. Meanwhile, the bottom plate is provided with a testing cavity capable of containing the semiconductor chip and a conductive contact which is positioned in the testing cavity and can be electrically connected with the pins of the semiconductor chip, the cover plate is covered on the opening end of the testing cavity and is abutted against the semiconductor chip arranged in the testing cavity, and therefore the semiconductor chip is directly placed in the testing cavity to carry out corresponding testing. Compared with the prior art, the utility model discloses semiconductor chip's test procedure has been simplified to semiconductor chip's efficiency of software testing has been increased and semiconductor chip's test cost has been reduced.

Drawings

FIG. 1 is a schematic structural diagram of an embodiment of a test platform for a semiconductor chip according to the present invention;

FIG. 2 is a schematic structural diagram of the test fixture shown in FIG. 1;

FIG. 3 is a schematic view of the structure of the base plate shown in FIG. 2;

FIG. 4 is an exploded view of the cover plate shown in FIG. 2;

fig. 5 is a schematic structural view of the fastener shown in fig. 4.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present invention, and should not be construed as limiting the present invention, and all other embodiments obtained by those skilled in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.

The utility model provides a test platform of semiconductor chip, this test platform includes base 100 and arranges test fixture 200, test mainboard 300, display screen 400 and a plurality of function switch 500 on base 100, test fixture 200 includes bottom plate 210, apron 220 and conductive contact, bottom plate 210 is located on base 100, and has the test chamber 211 that can hold semiconductor chip on the bottom plate 210, apron 220 activity sets up on bottom plate 210 and can block off the open end of test chamber 211, and apron 220 can support with the semiconductor chip flexibility that is located test chamber 211, conductive contact is located in test chamber 211 and can be connected with the pin electricity of semiconductor chip; the test main board 300 is electrically connected with the conductive contact, the display screen 400 and the function switch 500 respectively; the display screen 400 may display test information; the function switch 500 may control the test motherboard 300 to operate.

In this embodiment, as shown in fig. 1 to fig. 3, the shape and size of the base 100 may be arranged according to actual conditions, and at this time, it is preferable that the base 100 includes a mounting plate and a supporting column for supporting the mounting plate, and the mounting plate has a plurality of mounting positions, so as to conveniently mount the test fixture, the test motherboard, the display screen, and the plurality of function switches. The testing fixture 200 includes a bottom plate 210, a cover plate 220 and conductive contacts, the bottom plate 210 is disposed on the base 100 (i.e., the mounting plate), the bottom plate 210 is provided with a testing cavity 211 adapted to a semiconductor chip, and the conductive contacts are disposed in the testing cavity 211 to connect the semiconductor chip disposed in the testing cavity 211, so as to test the semiconductor chip conveniently. At this time, in order to facilitate the stability of the conduction between the semiconductor chip located in the testing cavity 211 and the conductive contact, the cover plate 220 is movably disposed on the bottom plate 210 and can close the opening end of the testing cavity 211 to abut against the semiconductor chip located in the testing cavity 211, so as to prevent the semiconductor chip from sliding during the testing process. As for the movable connection manner of the cover plate 220 and the base plate 210, the cover plate 220 and the base plate 210 may be separately arranged, and the cover plate 220 and the base plate 210 are clamped to close the open end of the test chamber 211, or the cover plate 220 and the base plate 210 may be hinged, so that the cover plate 220 can close the open end of the test chamber 211 after rotating around a hinge shaft. Meanwhile, in order to avoid damaging the semiconductor chip when the cover plate 220 abuts against the semiconductor chip located in the test cavity 211, it is preferable that the cover plate 220 and the test chip are in flexible abutment, specifically, the abutment portion of the cover plate 220 connected with the cover plate through a spring may be used, and the abutment portion of the cover plate 220 made of a flexible material may also be provided. The test mainboard 300 is arranged on the base 100, and the test mainboard 300 is also respectively electrically connected with the conductive contact, the display screen 400 and the function switch 500, thereby conveniently transmitting the data of the semiconductor chip running on the test mainboard 300 to the display screen 400 for displaying, and simultaneously, the function switch 500 can be used for controlling the running of the test mainboard 300, such as controlling the start and stop of the test mainboard 300, and the switching of the test function. At this time, a protection cover covering the test motherboard 300 may be further disposed on the bottom board 100, so as to conveniently protect the test motherboard 300. In this embodiment, the testing jig 200 is disposed on the base 100 to test the semiconductor chip and display corresponding data of the test through the display screen 400, so that the tester can conveniently determine the performance of the semiconductor chip. Meanwhile, the bottom plate 210 is provided with the test cavity 211 capable of accommodating the semiconductor chip and the conductive contact which is positioned in the test cavity 211 and can be electrically connected with the pins of the semiconductor chip, the cover plate 220 covers the open end of the test cavity 211 and is abutted against the semiconductor chip arranged in the test cavity 211, so that the semiconductor chip can be directly arranged in the test cavity 211 to carry out corresponding test, the test procedure of the semiconductor chip is simplified, the test efficiency of the semiconductor chip is improved, and the test cost of the semiconductor chip is reduced.

In a preferred embodiment, as shown in fig. 3, in order to facilitate the flexible supporting of the cover plate 220 and the semiconductor chip, the cover plate 220 includes a substrate 221, a supporting block 222 and a first elastic member 223. The size of the substrate 221 is determined to cover at least the opening end of the testing cavity 211, and the abutting block 222 is connected to the substrate through the first elastic member 223. The number of the first elastic members 223 can be arranged according to actual situations, preferably, the first elastic members 223 are springs, and the abutting block 222 can be slidably connected with the substrate 221 or can be separately arranged. In this embodiment, when the substrate 221 is disposed on the opening end of the testing cavity 211 in a covering manner, the abutting block 222 can abut against the semiconductor chip located in the testing cavity 211, and the abutting block 222 can move toward the substrate 221 under the elastic force of the first elastic member 223, so that the abutting block 222 and the semiconductor chip form a flexible abutting manner, thereby preventing the semiconductor chip from being damaged.

In a preferred embodiment, to further facilitate the base 221 to close the open end of the testing chamber 211, it is preferable that one side of the base 221 is hinged to the bottom plate 210, and the base 221 can rotate around the hinge axis and close the open end of the testing chamber 211. At this time, in order to increase the stability of the substrate 221 covering the open end of the test cavity 211, it is preferable that the substrate 221 and the bottom plate 210 are fixed in a clamping manner, so as to facilitate the rapid separation of the substrate 221 and the bottom plate 210, thereby facilitating the improvement of the testing efficiency of the semiconductor chip.

In a preferred embodiment, as shown in fig. 3 and 4, in order to facilitate the clamping of the substrate 221 and the bottom plate 210, a first groove 224 is disposed at the front end of the substrate 221, a fixed shaft 225, a clamping member 226 sleeved on the fixed shaft 225, and a second elastic member 227 are disposed in the first groove 224, one end of the second elastic member 227 is connected to the bottom of the first groove 224, and the other end is abutted against the clamping member 226; the second groove 212 is disposed at one side of the testing chamber 211, the rod 213 is disposed in the second groove 212, and the latch 226 can be engaged with the rod 213 to fix the substrate 221. Two pivoting seats arranged at intervals are arranged on the opposite sides of the second groove 212, a fixing rod is arranged between the two pivoting seats, and two lugs are arranged at the rear end of the substrate 221 and sleeved on the fixing rod, so that the substrate 221 can rotate above the test cavity 221. When the semiconductor chip is required to be tested, the semiconductor chip is placed in the testing cavity 211 and the cover plate 220 is pressed downwards, and the semiconductor chip is pressed by the abutting block 222 located on the inner side of the cover plate 220, so that the pins below the semiconductor chip are pressed downwards and contacted with the conductive contacts, and the semiconductor chip is conducted with the testing mainboard 300. After the cover 220 is pressed down a certain distance, the hooking portion of the locking member 226 moves toward the lower inner side of the rod 213 to form a locking fit therewith, thereby fixing the cover 220. In addition, as shown in fig. 4 and 5, in order to facilitate the tester to open or close the cover 22, the locking member 226 includes a hand pressing portion 228 that can be pressed by the tester, a holding portion 229 that abuts against the hand pressing portion 228, and a hooking portion that is located on the holding portion 229, so that the tester can open or close the cover 220 by pressing the hand pressing portion 228.

In a preferred embodiment, in order to facilitate the abutting block 222 to abut against the semiconductor chip, a mounting cavity is opened on one side surface of the substrate 221 facing the testing cavity 211 (i.e. the inner side surface of the substrate 221), a part of the area of the abutting block 222 is installed in the mounting cavity, meanwhile, the abutting block 222 is hinged to the substrate, and a hinge shaft of the abutting block 222 and the substrate 221 and a hinge shaft of the substrate 221 and the bottom plate 210 are arranged in parallel, so that when the substrate 221 rotates and covers the opening end of the testing cavity 211, one end of the abutting block 222, which is in contact with the semiconductor chip first, can rotate around the hinge shaft, and after the substrate 221 completely covers the opening end of the testing cavity 211, the abutting surface of the abutting block 222 can completely abut against the semiconductor chip, thereby increasing the stability of the semiconductor chip in the testing cavity 211.

In a preferred embodiment, as shown in fig. 1, a voltage/current meter 600 electrically connected to the test motherboard 300 is further disposed on the base 100, and the voltage/current meter can monitor the operating voltage and the operating current of the test motherboard 300 respectively, so that a tester can judge the operating state of the test motherboard 300 more intuitively through the voltage/current meter 600. For example, the working current of the test motherboard 300 during normal operation is 1A-1.5A, and the working voltage is 3.7V-4.3V, when testing the semiconductor chip, if the current displayed on the voltage/current meter 600 is 1.3A, it indicates that the test motherboard 300 is in normal operation, and if the current displayed on the voltage/current meter 600 is 2A, it indicates that the test motherboard 300 is in abnormal operation, the test platform needs to be immediately disconnected, and after the maintenance is completed, the test is performed again. The detection and determination of the voltage values are based on the same principle and will not be described in detail here. Meanwhile, in order to conveniently control the start and stop of the voltage/current meter 600, the functional switch 500 includes a first button switch 510, and the first button switch 510 has three positions, and the three positions respectively correspond to a display current value, a display voltage value, and a turn-off of the voltage/current meter 600. Of course, the first button switch 510 can also be added with a shift position for displaying the voltage value and the current value at the same time.

In a preferred embodiment, as shown in fig. 1, the external power supply interface 110 is further disposed on the base 100, and the external power supply interface 110 is electrically connected to the test motherboard 300, so that an external power source can be used to directly supply power to the test motherboard 300.

In a preferred embodiment, in order to facilitate the testing platform to test the semiconductor chip anytime and anywhere, a battery is further included on the base 100, so as to facilitate the power supply to the test motherboard 300 without an external power source. At this time, as shown in fig. 1, in order to facilitate switching the power supply state of the test motherboard 300, the function switch 500 further includes a second button switch 520, where the second button switch 520 has three positions, and the three positions respectively correspond to the battery power switch, the external power switch, and the power switch, so as to facilitate switching between the battery power supply and the external power supply. At this time, the battery may be charged through the external power supply interface 110, or the battery may be directly provided with a charging interface.

In a preferred embodiment, as shown in fig. 1, in order to control the operation of the test motherboard 300, the function switch 500 further includes five function buttons 530, and the five function buttons 530 respectively control the start and stop of the test motherboard 300 and the up, down, left and right movement of the cursor on the display screen 400. The display screen 400 has a plurality of virtual test keys, so that the vertical and horizontal switching is conveniently realized through four of the function buttons 530 to select different virtual test keys, and the volume of the test platform is reduced through the combination of the virtual test keys and the physical selection keys (i.e., the vertical, horizontal and right function buttons) under the condition of more test keys.

The above is only the part or the preferred embodiment of the present invention, no matter the characters or the drawings can not limit the protection scope of the present invention, all under the whole concept of the present invention, the equivalent structure transformation performed by the contents of the specification and the drawings is utilized, or the direct/indirect application in other related technical fields is included in the protection scope of the present invention.

Claims

1. A test platform of a semiconductor chip is characterized by comprising a base, a test fixture, a test mainboard, a display screen and a plurality of function switches, wherein the test fixture, the test mainboard, the display screen and the function switches are arranged on the base; the test mainboard is respectively electrically connected with the conductive contact, the display screen and the function switch.

2. The testing platform of claim 1, wherein the cover plate comprises a base plate, a supporting block and a first elastic member, the supporting block is connected to the base plate through the first elastic member, and the supporting block can support the semiconductor chip in the testing cavity.

3. The test platform of claim 2, wherein a side of the base plate is hinged to the base plate such that the base plate can pivot about a hinge axis and close off the open end of the test chamber.

4. The test platform of claim 3, wherein a first groove is formed in the front end of the base plate, a fixed shaft, a fastening member sleeved on the fixed shaft, and a second elastic member are arranged in the first groove, one end of the second elastic member is connected with the bottom of the first groove, and the other end of the second elastic member abuts against the fastening member; a second groove is formed in one side of the test cavity, a rod body is arranged in the second groove, and the buckling piece can be in buckling fit with the rod body to fix the substrate.

5. The test platform of claim 3, wherein the base plate has a mounting cavity, a part of the abutting block is located in the mounting cavity and hinged to the base plate, and a hinge shaft of the abutting block and the base plate and a hinge shaft of the base plate and the bottom plate are arranged in parallel.

6. The test platform of claim 1, further comprising a voltmeter disposed on the base and electrically connected to the test motherboard, wherein the function switch comprises a first button switch having three positions, and the three positions correspond to the ammeter switch, the voltmeter switch, and the voltmeter switch, respectively.

7. The test platform of claim 1, further comprising an external power interface disposed on the base and electrically connected to the test motherboard.

8. The test platform of claim 7, further comprising a battery disposed on the base and electrically connected to the test motherboard, wherein the function switch further comprises a second button switch, and the second button switch has three positions corresponding to a battery power switch, an external power switch, and a power switch.

9. The test platform of claim 1, wherein the function switch further comprises five function buttons, and the five function buttons respectively control the start and stop of the test motherboard and the up-down, left-right movement of a cursor on the display screen.