CN211528524U

CN211528524U - Power-off time detection circuit

Info

Publication number: CN211528524U
Application number: CN201921770590.0U
Authority: CN
Inventors: 沈磊; 韩炎兵; 曾立平; 朱明�; 刘建伟
Original assignee: Hangzhou H&t Intelligent Control Technology Co ltd
Current assignee: Hangzhou H&t Intelligent Control Technology Co ltd
Priority date: 2019-10-21
Filing date: 2019-10-21
Publication date: 2020-09-18
Anticipated expiration: 2029-10-21

Abstract

The utility model discloses a power-off time detection circuitry has overcome prior art detection circuitry and has had the problem of the time of the accurate judgement outage of great error, including singlechip U3 and the control circuit who is connected with singlechip U3, control circuit includes charging circuit and the parallel discharge circuit who connects with charging circuit, still includes power storage module. The utility model discloses utilize electrolytic capacitor EC 7's charge-discharge characteristic, the high-low level of the IO mouth output of adoption singlechip U3 controls charging circuit and discharge circuit to electrolytic capacitor EC 7's charge-discharge, has avoided the power consumptive electrolytic capacitor EC7 who leads to of singlechip U3 to discharge too fast, through the self calibration of controller during operation to electrolytic capacitor EC7 charge-discharge data, realizes the accurate judgement to the outage time.

Description

Power-off time detection circuit

Technical Field

The utility model belongs to the technical field of little household electrical appliances and specifically relates to a low-cost and simple reliable outage time detection circuitry is related to.

Background

In the field of existing small household appliances, a plurality of products cannot memorize the state before power failure in a short time after power failure or memorize the state in a short time and cannot judge the power failure time accurately. The same power-off time can be memorized or can not be memorized. For example, when a consumer short-term power failure occurs to a small household appliance of the same model due to factors such as misoperation, unstable voltage, power failure cleaning and the like, the small household appliance needs to be reset, and the time is not needed to be reset every time, particularly for some products with a clock function, which is very inconvenient. At present, the common practice is to complete the power-off memory function of the controller by increasing the capacity of the electrolytic capacitor at the power supply, namely, the singlechip is not reset when the controller is electrified again. However, the detection method generally has large errors and poor consistency, can not accurately judge the power-off time, and can save the power-off memory time.

For example, a "testing device for instantaneous power-off time of external power grid" disclosed in chinese patent document, whose publication number CN202453430U includes a processing control unit, a time setting unit, a relay driving unit and a power-off time indicating unit, wherein the processing control unit is connected to the time setting unit for setting the instantaneous power-off time, the processing control unit is connected to the relay driving unit for simulating the power grid on/off, and the processing control unit is connected to the power-off time indicating unit for displaying the instantaneous power-off time of each test. However, the detection technology is not specific enough, generally has large errors and poor consistency, and cannot accurately judge the power-off time.

SUMMERY OF THE UTILITY MODEL

The utility model relates to an overcome prior art's detection circuitry has the problem of the time of the accurate judgement outage of great error, provides a outage time detection circuitry, can effectively judge the outage time low cost and simple reliable of controller.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

the utility model provides a power-off time detection circuit, its characterized in that, includes singlechip U3 and control circuit, control circuit's input is connected to singlechip U3's output, control circuit includes charging circuit, discharge circuit and electric power storage module, charging circuit and discharge circuit are parallelly connected, and the output that charging circuit and discharge circuit paralleled back is connected with the positive terminal of electric power storage module. By utilizing the charging and discharging characteristics of the power storage module, the charging and discharging of the charging circuit and the discharging circuit to the power storage module are controlled by the high and low levels output by the IO port of the single chip microcomputer U3, the phenomenon that the power storage module is discharged too fast due to the power consumption of the single chip microcomputer U3 is avoided, and the accurate judgment of the power failure time is realized through the self calibration of the charging and discharging data of the power storage module when the controller works.

Preferably, the pin P2.1 of the single chip microcomputer U3 is connected to the positive terminal of the charging circuit, the negative terminal of the charging circuit is connected to the positive terminal of the power storage module, and the negative terminal of the power storage module is grounded. When the system is powered on, the IO port of the singlechip U3 is set to be in an input AD state, and the power-off time of the controller is converted through the voltage value of the IO port of the singlechip U3.

Preferably, the charging circuit includes a diode D7, the anode of the diode D7 is the anode terminal of the charging circuit, and the cathode of the diode D7 is the cathode terminal of the charging circuit. After AD sampling is finished, the IO port of the single chip microcomputer U3 is set to be high in output, and the charging module is rapidly charged through one-way conduction of the diode D7.

Preferably, the power storage module comprises an electrolytic capacitor EC7, the positive electrode of the electrolytic capacitor EC7 is the positive electrode end of the power storage module, and the negative electrode of the electrolytic capacitor EC7 is the negative electrode end of the power storage module. The electric storage module utilizes the charge/discharge characteristics of the electrolytic capacitor EC 7.

Preferably, the one-chip microcomputer U3 is further connected to one end of a discharge circuit, and the other end of the discharge circuit is connected to the positive electrode terminal of the power storage module. When the system is powered off, the IO port of the singlechip U3 is set to output low, and since the diode D7 is not turned on, the power storage module is slowly discharged through the discharge circuit.

Preferably, the discharge circuit includes a resistor R29. When the system is powered off, the IO port of the singlechip U3 is set to output low, and since the diode D7 is not turned on, the electrolytic capacitor EC7 is slowly discharged through the resistor R29.

Preferably, a VDD pin of the single chip microcomputer U3 is connected with a power supply, a VSS pin is grounded, and the single chip microcomputer U3 is further provided with an I/O port. When the system normally works, the power-off time can be calibrated by setting the IO port of the singlechip U3 to be output low for a specified period of time and reading the voltage value at the moment, so that the inaccuracy of the power-off time caused by the factors such as the temperature of the electrolytic capacitor EC7 and the resistor R29 is avoided.

Preferably, the model of the single chip microcomputer U3 is UTF 87008. A UTF87008 model single chip microcomputer has an I/O port with AD.

Therefore, the utility model discloses following beneficial effect has:

1. the control circuit is simple and reliable, only one diode, one resistor and one electrolytic capacitor are needed, and the control circuit is simple and reliable;

2. the power-off time which can be memorized is prolonged;

3. and a self-calibration mode is introduced, so that the difference between different devices and the environment is avoided, and the reliability and consistency are improved.

Drawings

Fig. 1 is a schematic circuit diagram of the embodiment.

In the figure: 1. control circuit 2, charging circuit 3, discharging circuit 4, and power storage module.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and the detailed description.

Example (b):

a circuit for detecting power-off time in this embodiment, as shown in fig. 1, includes a single chip microcomputer U3, the type is UTF87008, and further includes a control circuit 1 connected to pin 11 of P2.1/AIN8/CT8 of the single chip microcomputer U3, the control circuit 1 is composed of a charging circuit 2, a discharging circuit 3, and a power storage module 4, the power storage module 4 is composed of an electrolytic capacitor EC7, an electrolytic capacitor EC7 is 100uF/16V, the charging circuit 2 is connected in parallel with the discharging circuit 3 and then is connected to the positive electrode of the electrolytic capacitor EC7, the charging circuit 2 is composed of a diode D7, the discharging circuit 3 is composed of a resistor R29, and the resistor R29 is 100k Ω; the pin 11 of the P2.1/AIN8/CT8 of the singlechip U3 is connected with the anode of a diode D7 and one end of a resistor R29, the cathode of a diode D7 is connected with the anode of an electrolytic capacitor EC7, the cathode of a point-disconnecting capacitor EC7 is grounded, and the other end of the resistor R29 is connected with the anode of an electrolytic capacitor EC 7; the 1 pin VSS of the single chip U is grounded, the 2 pin T2 COM/T2 CC/P0.0 is connected with IN _ TEMP, the 3 pin T2 COM/T2 CC/P0.1 is connected with LED _ COM, the 4 pin RST/SSN/P0.2 is connected with LED _ COM, the 5 pin T2 CC/SCL/T2 COM/P0.3 is connected with LED _ COM, the 6 pin SDA/T2 CC/T2 COM/P0.4 is connected with LED _ COM, the 7 pin PWM/UTX/P0.5 is connected with LED _ COM, the 8 pin PWM/URX/P0.6 is connected with OUT _ BUZ, the 9 pin CAT/T/P0.7 is connected with LED _ COM, the 10 pin CAT/T2/AIN/P2.0 is connected with LED _ SEG, the 12 pin P1.7/AIN/CT is connected with LED _ SEG, the 13 pin P1.6/AIN/CT is connected with LED _ SEG, the 14 pin P1.5/MISN/S/P2.0 is connected with LED _ SEG, and the LED _ SOP/PWM is connected with LED _ COM/P/, 16 pins P1.3/AIN3/CT3/SCK are connected with LED _ SEG7, 17 pins P1.2/AIN2/CT2 are connected with LED _ SEG2, 18 pins P1.1/AIN1/CT1/SWAT are connected with OUT _ HEAT/SWAT, 19 pins P1.0/AIN0/CT0/INT0/AVREFN are connected with IN _ ZERO, and 20 pins VDD are connected with +5V power supply.

The working process of the embodiment is as follows: when the system is powered on, the I/O port of the singlechip U3 is set to be in an input AD state, the power-off time of the controller is converted through the voltage value of the I/O port, after AD sampling is finished, the I/O port of the singlechip U3 is set to be high in output, and the electrolytic capacitor EC7 is rapidly charged through the diode D7 of the charging circuit 2; when the system is powered off, the I/O port of the singlechip U3 is set to be low in output, the diode D7 is not conducted, the charging circuit 2 does not work, the discharging circuit 3 starts to work, and the electrolytic capacitor EC7 is slowly discharged through the resistor R29 of the discharging circuit 3; when the system normally works, the power-off time can be calibrated by setting the I/O of the singlechip U3 to be output low for a specified period of time and reading the voltage value at the moment, so that the inaccuracy of the power-off time caused by factors such as the electrolytic capacitor EC7, the resistance, the temperature and the like is avoided.

The control circuit 1 of the embodiment is simple and reliable, only one diode D7, one resistor R29 and one electrolytic capacitor EC7 are needed, the control circuit is simple and reliable, and the memorable power-off time is prolonged; a self-calibration mode is introduced, so that the difference between different devices and the environment is avoided, and the reliability and consistency are improved, so that the singlechip U3 can accurately judge the power-off time of the controller through an I/O port with AD, a simple electrolytic capacitor EC7, a resistor R29 and a diode D7.

Claims

1. The utility model provides a power-off time detection circuit, its characterized in that, includes singlechip U3 and control circuit (1), the input of control circuit (1) is connected to singlechip U3's output, control circuit (1) includes charging circuit (2), discharge circuit (3) and electric power storage module (4), charging circuit (2) are parallelly connected with discharge circuit (3), and the output after charging circuit (2) and discharge circuit (3) are parallelly connected is connected with the positive terminal of electric power storage module (4).

2. The power outage time detection circuit according to claim 1, characterized in that a pin P2.1 of the single chip microcomputer U3 is connected with a positive terminal of the charging circuit (2), a negative terminal of the charging circuit (2) is connected with a positive terminal of the power storage module (4), and a negative terminal of the power storage module (4) is grounded.

3. A power-down time detection circuit according to claim 2, wherein the charging circuit (2) comprises a diode D7, the anode of the diode D7 is the anode terminal of the charging circuit (2), and the cathode of the diode D7 is the cathode terminal of the charging circuit (2).

4. The power outage time detection circuit according to claim 2, characterized in that the power storage module (4) comprises an electrolytic capacitor EC7, the positive electrode of the electrolytic capacitor EC7 is the positive electrode terminal of the power storage module (4), and the negative electrode of the electrolytic capacitor EC7 is the negative electrode terminal of the power storage module (4).

5. The power failure time detection circuit according to claim 1, wherein the single chip microcomputer U3 is further connected with one end of the discharge circuit (3), and the other end of the discharge circuit (3) is connected with the positive end of the power storage module (4).

6. A power-down time detection circuit according to claim 5, characterized in that the discharge circuit (3) comprises a resistor R29.

7. The circuit for detecting power-off time as claimed in claim 1, wherein the VDD pin of the single chip microcomputer U3 is connected to a power supply, the VSS pin is connected to ground, and the single chip microcomputer U3 is further provided with an I/O port.

8. The power-off time detection circuit as claimed in claim 1, 2 or 5, wherein the single chip microcomputer U3 is UTF 87008.