CN211454528U - System abnormal power-down protection circuit based on energy storage capacitor - Google Patents
System abnormal power-down protection circuit based on energy storage capacitor Download PDFInfo
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- CN211454528U CN211454528U CN202020570809.9U CN202020570809U CN211454528U CN 211454528 U CN211454528 U CN 211454528U CN 202020570809 U CN202020570809 U CN 202020570809U CN 211454528 U CN211454528 U CN 211454528U
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Abstract
The utility model discloses a system abnormity power-down protection circuit based on energy storage capacitor, a serial communication port, including switch, first DC-DC, second DC-DC, third DC-DC, voltage detection circuit, PMIC chip, DC-DC Buck/Boost circuit, super capacitor, treater chip. The utility model discloses a less super capacitor of volume is as energy storage capacitor, and this electric capacity can be integrated to the minimum system integrated circuit board, when the system falls the electricity unusually, breaks off peripheral equipment's power supply to provide the electric energy for the processor chip by energy storage capacitor, can support the processor chip and accomplish the save of key data, avoid data loss.
Description
Technical Field
The utility model relates to a power down is unusual to uncharged battery equipment system, especially a system abnormity power down protection circuit based on energy storage capacitor.
Background
Nowadays, a large number of electronic devices are used in industrial and commercial fields for detecting the operation conditions of other devices and collecting various data for statistical analysis. All electronic equipment needs power supply, and once power supply is abnormal, data of the monitoring terminal or the rear-end data processing center are lost to a certain degree, so that part of key information is lost.
In the prior art, a conventional method for power supply abnormity is to use a standby power supply (UPS) as a backup power supply for abnormal power failure of power equipment, and switch to the standby power supply when power is interrupted, so as to ensure that a system normally operates for a period of time and ensure that key data is not lost.
Specifically, a battery is generally used as an energy storage device for a standby power supply (UPS), and the battery is charged and stores electric energy under normal power conditions; once the external power is abnormal, the battery supplies power to maintain the operation of the system.
However, in the case of the current backup power supply (UPS), since a battery device is required to be used as an electric energy storage, the whole system is complicated, bulky, high in cost, and not suitable for a general low-cost and lightweight application environment.
SUMMERY OF THE UTILITY MODEL
The invention of the utility model aims to: aiming at the problems that a standby power supply (UPS) in the prior art needs to use battery equipment, so that the system is complex, large in size, high in cost and not suitable for a common low-cost and light-weight application environment, an energy storage capacitor-based system abnormal power failure protection circuit is provided, and an energy storage capacitor with a small size is used as a standby power supply of a processor chip to supply power so as to realize functions of data storage and the like under the condition of abnormal power failure.
In order to realize the purpose, the utility model discloses a technical scheme be:
a system abnormal power failure protection circuit based on an energy storage capacitor comprises a switch, a first DC-DC, a second DC-DC, a third DC-DC, a voltage detection circuit, a PMIC chip, a DC-DC Buck/Boost circuit, a super capacitor and a processor chip;
an external direct current power supply is input to the switch, the first DC-DC, the second DC-DC, the third DC-DC and the voltage detection circuit;
the direct current power supply supplies power to peripheral equipment after being switched by the switch;
the direct current power supply supplies power to peripheral equipment after voltage conversion of the first DC-DC;
the voltage detection circuit detects the voltage of an external direct current power supply and outputs a control signal, and the control signal is input to the switch, the first DC-DC and the processor chip;
the direct current power supply is input into the PMIC chip through the second DC-DC;
when the voltage of an external direct-current power supply is normal, the direct-current power supply is input into the DC-DCBuck/Boost circuit through the third DC-DC, the DC-DC Buck/Boost circuit is connected with the super capacitor, and the super capacitor is charged; when an external direct-current power supply is abnormally powered down, electric energy stored by the super capacitor passes through the DC-DC Buck/Boost circuit and then is input into the PMIC chip;
the PMIC chip supplies power to the processor chip;
the processor chip is connected with peripheral equipment.
Preferably, the dc power supply is a 12V dc power supply, and 12V power is supplied to the first peripheral device after being switched by the switch.
Preferably, the direct current power supply provides 5V power to the second peripheral device after voltage conversion of the first DC-DC.
Preferably, the processor chip is a Rayleigh chip micro RK3399 chip.
Preferably, the peripheral equipment comprises an LCD screen and audio equipment.
To sum up, owing to adopted above-mentioned technical scheme, the beneficial effects of the utility model are that:
the utility model discloses a system abnormity power-down protection circuit based on energy storage capacitor adopts the less super capacitor of volume as energy storage capacitor, and this electric capacity can be integrated to the minimum system integrated circuit board, when the system falls the electricity unusually, breaks off peripheral equipment's power supply to provide the electric energy for the processor chip by energy storage capacitor, can support the processor chip and accomplish the save of key data, avoid data loss.
Drawings
Fig. 1 is a schematic structural diagram of the present invention.
Fig. 2 is the logic diagram of the abnormal power down event trigger of the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the invention.
The structure of the utility model is as shown in fig. 1, a system abnormal power-down protection circuit based on energy storage capacitor, which comprises a switch, a first DC-DC, a second DC-DC, a third DC-DC, a voltage detection circuit, a PMIC chip, a DC-DC Buck/Boost circuit, a super capacitor and a processor chip;
an external direct current power supply is input to the switch, the first DC-DC, the second DC-DC, the third DC-DC and the voltage detection circuit;
the direct current power supply provides 12V power supply for peripheral equipment after being switched by the switch;
the direct current power supply provides 5V power supply for peripheral equipment after voltage conversion of the first DC-DC;
the voltage detection circuit detects the voltage of a direct current power supply and outputs a control signal, and the control signal is input to the switch, the first DC-DC and the processor chip; the same control signal is used for the switch, the first DC-DC and the processor chip, so that the external power supply is directly turned off on hardware in order to quickly respond to the external power abnormality, and the response time of detecting and controlling the turning-off by the processor is shortened;
the direct current power supply is input into the PMIC chip through the second DC-DC;
the direct current power supply is input into the DC-DC Buck/Boost circuit through the third DC-DC, the DC-DC Buck/Boost circuit is connected with the super capacitor, and electric energy stored by the super capacitor is input into the PMIC chip after passing through the DC-DC Buck/Boost circuit;
the PMIC chip supplies power to the processor chip;
the processor chip is connected with peripheral equipment.
The processor chip is a Rayleigh chip micro RK3399 chip.
The peripheral equipment comprises an LCD screen and audio equipment.
The abnormal power-down event triggering logic of the utility model is shown in fig. 2, when the external power system is normal, the equipment of the system works normally, and the energy storage capacitor stores electric energy; when the system is abnormally powered off, the power supply of the peripheral equipment is cut off, and the energy storage capacitor provides electric energy for the processor chip.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (5)
1. A system abnormal power failure protection circuit based on an energy storage capacitor is characterized by comprising a switch, a first DC-DC, a second DC-DC, a third DC-DC, a voltage detection circuit, a PMIC chip, a DC-DC Buck/Boost circuit, a super capacitor and a processor chip;
an external direct current power supply is input to the switch, the first DC-DC, the second DC-DC, the third DC-DC and the voltage detection circuit;
the direct current power supply supplies power to peripheral equipment after being switched by the switch;
the direct current power supply supplies power to peripheral equipment after voltage conversion of the first DC-DC;
the voltage detection circuit detects the voltage of an external direct current power supply and outputs a control signal, and the control signal is input to the switch, the first DC-DC and the processor chip;
the direct current power supply is input into the PMIC chip through the second DC-DC;
when the voltage of an external direct-current power supply is normal, the direct-current power supply is input into the DC-DC Buck/Boost circuit through the third DC-DC, the DC-DC Buck/Boost circuit is connected with the super capacitor, and the super capacitor is charged; when an external direct-current power supply is abnormally powered down, electric energy stored by the super capacitor passes through the DC-DC Buck/Boost circuit and then is input into the PMIC chip;
the PMIC chip supplies power to the processor chip;
the processor chip is connected with peripheral equipment.
2. The abnormal power failure protection circuit of the system based on the energy storage capacitor as claimed in claim 1, wherein the dc power supply is a 12V dc power supply, and 12V power is supplied to the first peripheral device after being switched by the switch.
3. The abnormal power down protection circuit based on the energy storage capacitor as claimed in claim 1, wherein the DC power supply supplies 5V power to the second peripheral device after the voltage conversion of the first DC-DC.
4. The energy-storage-capacitor-based system abnormal power-down protection circuit as claimed in claim 1, wherein the processor chip is a Rui-core micro RK3399 chip.
5. The abnormal power failure protection circuit of the system based on the energy storage capacitor as claimed in claim 1, wherein the peripheral device comprises an LCD screen and an audio device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020570809.9U CN211454528U (en) | 2020-04-16 | 2020-04-16 | System abnormal power-down protection circuit based on energy storage capacitor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020570809.9U CN211454528U (en) | 2020-04-16 | 2020-04-16 | System abnormal power-down protection circuit based on energy storage capacitor |
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| CN211454528U true CN211454528U (en) | 2020-09-08 |
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| CN202020570809.9U Active CN211454528U (en) | 2020-04-16 | 2020-04-16 | System abnormal power-down protection circuit based on energy storage capacitor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112510807A (en) * | 2020-12-28 | 2021-03-16 | 张家港氢芯电气系统科技有限公司 | Data holding circuit for hydrogen environment intrinsic safety system and working method thereof |
| CN112821540A (en) * | 2021-01-06 | 2021-05-18 | 天津津航计算技术研究所 | Simulation system control flow implementation method based on real environment |
-
2020
- 2020-04-16 CN CN202020570809.9U patent/CN211454528U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112510807A (en) * | 2020-12-28 | 2021-03-16 | 张家港氢芯电气系统科技有限公司 | Data holding circuit for hydrogen environment intrinsic safety system and working method thereof |
| CN112821540A (en) * | 2021-01-06 | 2021-05-18 | 天津津航计算技术研究所 | Simulation system control flow implementation method based on real environment |
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Address after: 610041 doctor Pioneer Park, Chengdu, China, No.5 Gaopeng Avenue, high tech Zone, Chengdu, Sichuan Province Patentee after: Chengdu wanchuang Technology Co.,Ltd. Address before: 610041 doctor Pioneer Park, Chengdu, China, No.5 Gaopeng Avenue, high tech Zone, Chengdu, Sichuan Province Patentee before: VANTRON TECHNOLOGY, Inc. |