CN219227216U - Power-down delay circuit applied to MCU - Google Patents

Power-down delay circuit applied to MCU Download PDF

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CN219227216U
CN219227216U CN202223253889.3U CN202223253889U CN219227216U CN 219227216 U CN219227216 U CN 219227216U CN 202223253889 U CN202223253889 U CN 202223253889U CN 219227216 U CN219227216 U CN 219227216U
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mcu
resistor
capacitor
power supply
power
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朱启令
沈向东
沈成宇
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Shanghai Ruipu Energy Co Ltd
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Shanghai Ruipu Energy Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The utility model discloses a power-down delay circuit applied to an MCU, which comprises: external power source, first resistance, first diode, first electric capacity, DCDC power supply and MCU specifically do: the output end of the external power supply is connected with the first end of the first resistor and the positive electrode of the first diode; the cathode of the first diode is connected with the first end of the first capacitor and the input end of the DCDC power supply, the second end of the first capacitor is grounded, and the output end of the DCDC power supply is connected with the power supply pin of the MCU; and the second end of the first resistor is connected with an ADC detection pin of the MCU. The power-down delay circuit applied to the MCU can be used for delay protection at the moment of power-down of a circuit system, reduces surge current generated at the moment of power-up of the circuit system, and improves the reliability of the circuit system.

Description

Power-down delay circuit applied to MCU
Technical Field
The utility model relates to the technical field of electronic communication, in particular to a power-down delay circuit applied to an MCU.
Background
In the power system of the new energy vehicle, the use of MCU and Flash memory is involved, the Flash memory (Flash memory for short) is a Non-Volatile memory, and can keep data for a long time under the condition of no power supply, and the storage characteristic is equivalent to a hard disk, and the Flash memory is the basis of the storage medium of various portable digital devices. Flash memory is now widely used in digital devices such as cell phones, tablets, digital cameras, communication devices, and the like. However, under the condition of abnormal power failure of the device, if data read-write operation exists, damage and read-write interruption of Flash data can be caused.
In the circuit system, after the external power supply is lost, the MCU and other circuits in the system can be quickly out of control, so that important information such as the MCU cannot be stored in the flash memory, and the MCU cannot send alarm information to prompt power failure. In order to solve the problem, a power-down protection circuit is generally designed by utilizing the energy storage characteristic of a capacitor, and current is provided for a certain time by utilizing the energy storage characteristic of the capacitor and is provided for an MCU (micro controller unit) and other circuits in a circuit system. However, if the capacitance is simply increased, a large impact circuit is generated in the moment of powering up the circuit system, and components in the circuit system are easily damaged.
Disclosure of Invention
The utility model provides a be applied to MCU's power down delay circuit for delay protection in circuit system power down is in the twinkling of an eye to reduce the surge current that circuit system power up produced in the twinkling of an eye, improve circuit system's reliability.
In a first aspect, the present application provides a power-down delay circuit applied to an MCU, including: external power source, first resistance, first diode, first electric capacity, DCDC power supply and MCU specifically do:
the output end of the external power supply is connected with the first end of the first resistor and the positive electrode of the first diode;
the cathode of the first diode is connected with the first end of the first capacitor and the input end of the DCDC power supply;
the second end of the first capacitor is grounded;
the output end of the DCDC power supply is connected with a power supply pin of the MCU;
and the second end of the first resistor is connected with an ADC detection pin of the MCU.
The power-down delay circuit applied to the MCU is characterized in that a first diode, a first resistor, a first capacitor and a DCDC power supply are arranged behind an external power supply and connected with the MCU. The first capacitor may be charged by a current through the diode when the external power supply is powered up. At the power-on moment of the next external power supply, the first resistor is used for dividing the voltage, at the moment, when the voltage in the circuit reaches the conducting voltage of the first diode, the current flows to the first capacitor through the first diode, a buffer effect is achieved, the overlarge current passing through the first diode is avoided, the devices in the later-stage circuit are damaged, and the safety of the devices is protected. The first resistor is arranged behind the external power supply, the ADC detection pin of the MCU is connected with the first resistor, the MCU can acquire the power-on condition of the external power supply in real time through ADC detection, and data storage measures or alarm operation can be adopted immediately after the power-down of the external power supply is detected. At the moment, the first capacitor provides working current, the DCDC power supply supplies power to the MCU, the energy stored by the capacitor can be fully utilized, and the working time of the MCU is prolonged. The power-down delay circuit applied to the MCU can be used for delay protection at the moment of power-down of a circuit system, reduces surge current generated at the moment of power-up of the circuit system, and improves the reliability of the circuit system.
In one implementation manner, the power-down delay circuit applied to the MCU further includes a second resistor and a second capacitor, specifically:
the first end of the second resistor is connected with the cathode of the first diode;
the second end of the second resistor is connected with the first end of the second capacitor;
the second end of the second capacitor is grounded.
In one implementation, the second capacitance has a capacity greater than or equal to 100uF.
In one implementation manner, the power-down delay circuit applied to the MCU further includes a third capacitor, specifically:
the second end of the second resistor is connected with the first end of the second capacitor and the first end of the third capacitor;
the second end of the second capacitor and the second end of the third capacitor are grounded.
In one implementation, the third capacitance has a capacity greater than or equal to 100uF.
In one implementation manner, the power-down delay circuit applied to the MCU further includes a third resistor, specifically:
the first end of the third resistor is connected with the second end of the first resistor;
the second end of the third resistor is grounded.
In one implementation, the first resistor and the third resistor are voltage dividing resistors.
In one implementation, the second resistor is a current limiting resistor.
Drawings
Fig. 1 is a power-down delay circuit applied to an MCU according to an embodiment of the present utility model.
Detailed Description
The following describes in further detail the embodiments of the present utility model with reference to the drawings and examples. The following examples are illustrative of the utility model and are not intended to limit the scope of the utility model.
The terms first and second and the like in the description and in the claims of the present application and in the drawings are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Embodiment 1 referring to fig. 1, fig. 1 is a power-down delay circuit applied to an MCU according to an embodiment of the present utility model. The utility model provides a power-down delay circuit applied to an MCU, which comprises: external power source, first resistance R1, first diode D1, first electric capacity C1, DCDC power and MCU specifically do:
the output end of the external power supply is connected with the first end of the first resistor R1 and the anode of the first diode D1;
the cathode of the first diode D1 is connected with the first end of the first capacitor C1 and the input end in of the DCDC power supply;
the second end of the first capacitor is grounded;
the output end out of the DCDC power supply is connected with the power supply pin 1 of the MCU;
the second end of the first resistor R1 is connected with an ADC detection pin 2 of the MCU.
The output end of the external power supply is connected with the first resistor R1, and after the power is turned on, current flows through the first diode D1 to charge the first capacitor C1, and meanwhile, the DCDC power supply is charged. The ADC detection pin of the MCU is connected with the second end of the first resistor R1, and whether the external power supply is powered down or not is detected by detecting the divided voltage of the first resistor R1 so as to perform important data storage or alarm and other operations. At this time, the DCDC power supply supplies power to the MCU, the capacitance of the first capacitor C1 is fully utilized, and the working time of the MCU is prolonged.
In an embodiment, the power-down delay circuit applied to the MCU further includes a second resistor and a second capacitor, specifically: the first end of the second resistor R2 is connected with the negative electrode of the first diode D1; the second end of the second resistor R2 is connected with the first end of the second capacitor C2; the second end of the second C2 is grounded.
In this embodiment, the second resistor R2, the first capacitor C1, and the second capacitor C2 together form an energy storage unit. After the external power supply is electrified, the current flows through the first diode D1 and the second resistor R2, then the second capacitor C2 is charged, the second resistor R2 is a current limiting resistor, and when the current limiting effect is achieved, the first diode D1 can be prevented from being damaged due to the fact that the external power supply directly generates instantaneous heavy current for the second capacitor C2 in the electrifying moment. Meanwhile, the first diode D1 charges the first capacitor C1 and simultaneously supplies power to the DCDC power supply circuit, and the in voltage of the DCDC power supply can be kept consistent with the output voltage of the external power supply due to the existence of the second resistor R2.
In an embodiment, the power-down delay circuit applied to the MCU further includes: a second diode D2, wherein a cathode of the second diode D2 is connected with a cathode of the first diode D1, a first end of the first capacitor C1, and an input end in of the DCDC power supply;
the anode of the second diode D2 is connected to the second end of the second resistor R2.
In this embodiment of the present application, when the external power supply suddenly fails, the ADC detection pin 2 of the MCU detects the divided voltage of the first resistor R1 to obtain the power failure condition of the external power supply, and the MCU performs important data storage or alarm operation. At this time, the second capacitor C2 provides an operating current in the circuitry, and supplies power to the DCDC power supply through the second diode D2.
In an embodiment, the power-down delay circuit applied to the MCU further includes a third capacitor C3, specifically: the second end of the second resistor R2 is connected with the first end of the second capacitor C2 and the first end of the third capacitor C3; a second end of the second capacitor C2 and a second end of the third capacitor C3 are grounded.
Preferably, the second resistor R2, the second diode D2, the first capacitor C1, the second capacitor C2 and the third capacitor C3 together form an energy storage unit. After the external power supply is electrified, the current flows through the first diode D1 and the second resistor R2 to charge the second capacitor C2 and the third capacitor C3, the second resistor R2 is a current limiting resistor, and the damage of the first diode D1 caused by the fact that the external power supply directly generates instantaneous heavy current to the second capacitor C2 and the third capacitor C3 in the electrifying moment can be avoided while the current limiting effect is achieved. Meanwhile, the first diode D1 charges the first capacitor C1 and simultaneously supplies power to the DCDC power supply circuit, and the in voltage of the DCDC power supply can be kept consistent with the output voltage of the external power supply due to the existence of the second resistor R2.
In an embodiment, the power-down delay circuit applied to the MCU further includes a third resistor R3, specifically: the first end of the third resistor R3 is connected with the second end of the first resistor R1; the second end of the third resistor R3 is grounded. The third resistor R3 and the first resistor R1 are both voltage dividing resistors, and the ADC detection pin 2 of the MCU is also connected with the first end of the third resistor R3 to detect whether the external power supply is powered down.
In one embodiment, the capacity of the second capacitor is greater than or equal to 100uF. The capacity of the second capacitor is greater than or equal to 100uF. The second capacitor C2 and the third capacitor C3 are large capacity capacitors of 100uF or more. When the external power supply suddenly fails, the ADC detection pin 2 of the MCU detects the voltage division voltage of the first resistor R1 and the third resistor R3 to acquire the power failure condition of the external power supply, and the MCU performs important data storage or alarm operation. At this time, the second capacitor C2 and the third capacitor C3 provide an operating current in the circuit system, and supply power to the DCDC power supply through the second diode D2. It should be noted that, in the embodiment of the present utility model, only two large capacitors (the second capacitor and the third capacitor) are taken as examples, if the load current in the circuit is large, the number of large capacitors and the capacitance of the capacitors can be properly added to store energy; if the load current is small, the number of capacitors can be reduced to save cost. Meanwhile, due to unidirectional conductivity of the first diode D1, voltages of the second capacitor C2 and the third capacitor C3 cannot be detected by the first resistor R1 and the third resistor R3, and energy stored by each capacitor can be fully utilized for supplying power to the MCU by using a DCDC power supply, so that the working time of the MCU is further prolonged.
According to the power-down delay circuit applied to the MCU, a diode, a first resistor, a second resistor, a first capacitor and a DCDC power supply are arranged behind an external power supply and connected with the MCU. The capacitor may be charged by current through the diode when the external power supply is powered up. At the power-on moment of the next external power supply, the first resistor is used for dividing the voltage, at the moment, when the voltage in the circuit reaches the conducting voltage of the first diode, the current flows to the first capacitor through the first diode, a buffer effect is achieved, the overlarge current passing through the first diode is avoided, the devices in the later-stage circuit are damaged, and the safety of the devices is protected. And a divider resistor is arranged behind the external power supply, an ADC detection pin of the MCU is connected with the divider resistor, the MCU can acquire the power-on condition of the external power supply in real time through ADC detection, and data storage measures or alarm operation can be adopted immediately after the power failure of the external power supply is detected. At the moment, the first capacitor provides working current, the DCDC power supply supplies power to the MCU, the energy stored by the capacitor can be fully utilized, and the working time of the MCU is prolonged. The power-down delay circuit applied to the MCU provided by the embodiment of the utility model can be used for delay protection at the power-down moment of the circuit system, reduces the surge current generated at the power-up moment of the circuit system and improves the reliability of the circuit system.
The foregoing is merely a preferred embodiment of the present utility model, and it should be noted that modifications and substitutions can be made by those skilled in the art without departing from the technical principles of the present utility model, and these modifications and substitutions should also be considered as being within the scope of the present utility model.

Claims (9)

1. A power down delay circuit for an MCU, comprising: external power source, first resistance, first diode, first electric capacity, DCDC power supply and MCU specifically do:
the output end of the external power supply is connected with the first end of the first resistor and the positive electrode of the first diode;
the cathode of the first diode is connected with the first end of the first capacitor and the input end of the DCDC power supply;
the second end of the first capacitor is grounded;
the output end of the DCDC power supply is connected with a power supply pin of the MCU;
and the second end of the first resistor is connected with an ADC detection pin of the MCU.
2. The power-down delay circuit applied to the MCU as claimed in claim 1, wherein the power-down delay circuit applied to the MCU further comprises a second resistor and a second capacitor, specifically:
the first end of the second resistor is connected with the cathode of the first diode;
the second end of the second resistor is connected with the first end of the second capacitor;
the second end of the second capacitor is grounded.
3. A power down delay circuit for use with an MCU as defined in claim 2, wherein said power down delay circuit for use with an MCU further comprises: the second diode is arranged to be connected to the first diode,
the cathode of the second diode is connected with the cathode of the first diode, the first end of the first capacitor and the input end of the DCDC power supply;
the positive electrode of the second diode is connected with the second end of the second resistor.
4. A power down delay circuit for use in an MCU as recited in claim 3, wherein the second capacitor has a capacity greater than or equal to 100uF.
5. A power down delay circuit for an MCU according to claim 3, wherein said power down delay circuit for an MCU further comprises a third capacitor, specifically:
the second end of the second resistor is connected with the first end of the second capacitor and the first end of the third capacitor;
the second end of the second capacitor and the second end of the third capacitor are grounded.
6. The power down delay circuit for an MCU of claim 5, wherein the second capacitor has a capacity greater than or equal to 100uF.
7. The power-down delay circuit applied to the MCU as claimed in claim 1, wherein the power-down delay circuit applied to the MCU further comprises a third resistor, specifically:
the first end of the third resistor is connected with the second end of the first resistor;
the second end of the third resistor is grounded.
8. The power down delay circuit for an MCU of claim 7, wherein said first resistor and said third resistor are voltage dividing resistors.
9. A power down delay circuit for use in an MCU as recited in claim 2, wherein said second resistor is a current limiting resistor.
CN202223253889.3U 2022-12-05 2022-12-05 Power-down delay circuit applied to MCU Active CN219227216U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202223253889.3U CN219227216U (en) 2022-12-05 2022-12-05 Power-down delay circuit applied to MCU

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202223253889.3U CN219227216U (en) 2022-12-05 2022-12-05 Power-down delay circuit applied to MCU

Publications (1)

Publication Number Publication Date
CN219227216U true CN219227216U (en) 2023-06-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202223253889.3U Active CN219227216U (en) 2022-12-05 2022-12-05 Power-down delay circuit applied to MCU

Country Status (1)

Country Link
CN (1) CN219227216U (en)

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