CN211454177U - Array substrate, display panel and display device - Google Patents

Abstract

The embodiment of the utility model provides an array substrate, application array substrate's display panel and display device. The array substrate is defined with a display area and a camera hole area surrounded by the display area. The camera hole area comprises a light-transmitting area, a first wiring area adjacent to the light-transmitting area and a second wiring area surrounding the first wiring area. The array substrate comprises a first substrate, a first conducting layer, a second conducting layer, a common electrode layer, a third conducting layer, a planarization layer and an optical spacer. The planarization layer is aligned with the region of the light-transmitting region and is in direct contact with the first substrate. The optical spacer is aligned with the first routing area. The third conducting layer is arranged by bypassing the light-transmitting area and the first wiring area.

Description

Array substrate, display panel and display device

Technical Field

The utility model relates to a show technical field, especially relate to an array substrate, use this array substrate's display panel and use this display panel's display device.

Background

As the demand for diversification of functions of electronic devices such as mobile phones and tablet computers increases, it is often necessary to combine elements having other functions. Among them, electronic devices incorporating a camera module have been widely produced and used.

Taking an array substrate including a plurality of wires as an example, the array substrate needs to be provided with a camera hole area exposing the camera module, however, the camera hole area may affect the arrangement of the wires on the array substrate, and even affect the performance of the electronic device.

SUMMERY OF THE UTILITY MODEL

An aspect of the utility model provides an array substrate, array substrate defines there is the display area and quilt the camera hole district that the display area centers on, camera hole district includes the printing opacity district and centers on the wiring district in printing opacity district, the wiring district is including adjoining the first wiring district in printing opacity district and center on the second wiring district in first wiring district, array substrate include first basement and range upon range of in proper order in first basement is the first conducting layer, second conducting layer, public electrode layer and the third conducting layer of mutual interval and insulating setting:

the first conducting layer comprises a plurality of first scanning lines arranged at intervals;

the second conducting layer comprises a plurality of first data lines arranged at intervals;

the common electrode layer comprises a plurality of sub-electrodes arranged at intervals, and each sub-electrode is used for receiving a common voltage and a touch signal voltage in a time-sharing manner within the display time of one frame of picture;

the third conductive layer comprises a plurality of first touch-control wires which are arranged at intervals, and each first touch-control wire is at least electrically connected with one sub-electrode;

the array substrate further includes:

the planarization layer is positioned between the common electrode layer and the third conductive layer, the area of the planarization layer, which is aligned with the light transmitting area, is in direct contact with the first substrate, and the area of the planarization layer, which is aligned with the wiring area and the display area, covers the common electrode layer; and

the optical spacer is positioned on the surface of the planarization layer far away from the first substrate and is aligned with the first wiring area;

the third conductive layer is located on the surface, far away from the first substrate, of the planarization layer, and the third conductive layer is arranged in a mode of being aligned with the second wiring area and the display area, and bypasses the light transmitting area and the first wiring area.

In an embodiment, the first routing area and the routing area are both annular, and a loop width of the first routing area is at least one fifth of a loop width of the routing area.

In one embodiment, each of the first scan lines bypasses the light-transmitting area, crosses the wiring area, and extends in a first direction in the display area; each first data line bypasses the light-transmitting area, spans the wiring area and extends in a second direction in the display area; the second direction intersects the first direction; each first touch routing wire bypasses the light transmission area and the first routing area, spans the second routing area and extends in the display area along the second direction.

In an embodiment, each of the first scan lines, each of the first data lines, and each of the first touch traces includes a curved portion extending around the transparent region.

In an embodiment, the third conductive layer further includes a plurality of second touch traces, each of the second touch traces extends in the second direction in the display area, and each of the second touch traces is electrically connected to at least one of the sub-electrodes.

In an embodiment, the first conductive layer further includes a plurality of second scan lines, the second conductive layer further includes a plurality of second data lines, each of the second scan lines extends in the first direction in the display area, and each of the second data lines extends in the second direction in the display area.

In an embodiment, any two adjacent ones of the first scan lines and the second scan lines intersect with any two adjacent ones of the first data lines and the second data lines in the display area to define a sub-pixel; each of the sub-pixels includes a thin film transistor and a pixel electrode; the thin film transistor comprises a grid electrode, a source electrode and a drain electrode; the gate electrode is electrically connected to one of the first scan line and the second scan line, the source electrode is electrically connected to one of the first data line and the second data line, and the drain electrode is electrically connected to the pixel electrode.

In the array substrate, the optical spacer is arranged in the first wiring area adjacent to the light transmission area, so that the recess condition of the camera hole area can be improved, and the purpose of reducing the difference between the cell thickness (cell gap) of the light transmission area and the cell thickness of the display area is achieved. And then guarantee the imaging effect of the lens of the camera module of the display device using the array substrate, and avoid the display effect from being influenced by the phenomena of water ripples and the like caused by uneven box thickness.

The utility model discloses another aspect provides a display panel, including color filter substrate, liquid crystal layer and array substrate, the liquid crystal layer presss from both sides and locates color filter substrate with between the array substrate, the array substrate is foretell array substrate.

In an embodiment, the color filter substrate includes a second substrate, and a black matrix and a color filter layer located on a side of the second substrate close to the liquid crystal layer, where the black matrix and the color filter layer are both disposed by bypassing the light-transmitting area.

In the array substrate, the optical spacer is arranged in the first wiring area adjacent to the light transmission area, so that the recess condition of the camera hole area can be improved, and the purpose of reducing the difference between the cell thickness (cell gap) of the light transmission area and the cell thickness of the display area is achieved. And then guarantee the imaging effect of the camera lens of the camera module of the display device using the display panel, and avoid the display effect from being influenced by the phenomena of water ripples and the like caused by uneven box thickness.

The utility model discloses another aspect provides a display device, it includes:

the display panel described above;

the backlight module is positioned on one side of the display panel, which is far away from the display surface of the display panel, and the backlight module is defined with a mounting hole which penetrates through the backlight module, and the mounting hole is aligned with the light-transmitting area; and

the camera module is installed in the mounting hole and passes through the light-transmitting area to collect image information.

In the array substrate, the optical spacer is arranged in the first wiring area adjacent to the light transmission area, so that the recess condition of the camera hole area can be improved, and the purpose of reducing the difference between the cell thickness (cell gap) of the light transmission area and the cell thickness of the display area is achieved. And then guarantee to use it to be the formation of image effect of the camera lens of the module of making a video recording of display device, also avoided simultaneously because the phenomenon such as the water ripple that the box thickness is uneven leads to appears and influence the display effect.

Drawings

Fig. 1 is a schematic top view of an array substrate according to an embodiment of the present invention.

Fig. 2 is a schematic cross-sectional view of fig. 1 taken along section line II-II.

Fig. 3 is a schematic layout view of scan lines and data lines of the array substrate of fig. 1.

Fig. 4 is an enlarged schematic view at IV in fig. 3.

Fig. 5 is a schematic layout view of touch traces of the array substrate in fig. 1.

Fig. 6 is an enlarged schematic view at VI in fig. 5.

Fig. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention.

Fig. 8 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

Description of the main elements

Array substrate 10

Display area A

First axis of symmetry L1

Second axis of symmetry L2

Left region AL

Right side area AR

Upper region AT

Lower region AB

Camera hole area B

Light-transmitting region B1

Routing area B2

First routing area B21

Second routing area B22

First substrate 11

First conductive layer 12

First scanning line 122

Second scanning line 124

A first insulating layer 13

Second conductive layer 14

First data line 142

Second data line 144

Sub-pixel 141

Thin film transistor 143

Gate GE

Source SE

Drain electrode DE

Pixel electrode 145

Second insulating layer 15

The common electrode layer 16

Sub-electrode 162

Planarization layer 17

Via 172

Third conductive layer 18

First touch trace 182

Second touch trace 184

Optical spacer 19

First direction X

Second direction Y

Color filter substrate 20

Second substrate 21

Black matrix 23

Color filter layer 25

Cover layer 27

Liquid crystal layer 30

Display panel 40

Display surface 40a

Backlight module 50

Mounting hole 52

Camera module 60

Display device 100

The following detailed description of the invention will be further described in conjunction with the above-identified drawings.

Detailed Description

Fig. 1 is a schematic top view of an array substrate 10 according to an embodiment of the present invention. As shown in fig. 1, the array substrate 10 defines a display area a and a camera hole area B surrounded by the display area a. The camera hole area B defines a light-transmitting area B1 and a wiring area B2 surrounding the light-transmitting area B1. The wiring region B2 includes a first wiring region B21 adjacent to the light-transmitting region B1 and a second wiring region B22 surrounding the first wiring region B21. The camera hole area B is a light-transmitting area. The camera aperture area B and the light transmissive area B1 are substantially circular. The routing area B2 is a circular ring. In other embodiments, the camera hole area B may have other shapes. Such as elliptical, polygonal, etc.

Fig. 2 is a schematic cross-sectional view of fig. 1 taken along section line II-II. As shown in fig. 2, the array substrate 10 includes a first substrate 11, and a first conductive layer 12, a second conductive layer 14, a common electrode layer 16, and a third conductive layer 18, which are sequentially stacked on the first substrate 11 and spaced apart from each other and insulated from each other. A first insulating layer 13 is provided between the first conductive layer 12 and the second conductive layer 14. A second insulating layer 15 is provided between the second conductive layer 14 and the common electrode layer 16. A planarization layer 17 is provided between the common electrode layer 16 and the third conductive layer 18.

The first conductive layer 12, the first insulating layer 13, the second conductive layer 14, the second insulating layer 15, and the common electrode layer 16 are disposed to bypass the light transmission region B1 and to be aligned with the display region a, the first wiring region B21, and the second wiring region B22. The area of the planarization layer 17 aligned with the light transmission area B1 is in direct contact with the first substrate 11, and the area of the planarization layer 17 aligned with the first wiring area B21, the second wiring area B22 and the display area a covers the common electrode layer 16. The third conductive layer 18 is disposed to bypass the light transmission region B1 and the first wiring region B21 and to be aligned with the display region a and the second wiring region B22.

As shown in fig. 2, the array substrate 10 further includes a plurality of Photo Spacers (PS) 19 aligned with the first routing region B21. An optical spacer 19 is located on a surface of the planarization layer 17 remote from the first substrate 11. A plurality of optical spacers 19 may be arranged one turn around the light-transmitting region B1. The embodiment of the utility model provides an in, be provided with optical gap sub 19 in the first wiring district B21 of next-door neighbour printing opacity district B1, can improve printing opacity district B1's sunken condition, reach the box thickness (cell gap) that reduces printing opacity district B1 position and the purpose of the box thickness difference of display area A. Thereby ensuring the imaging effect of the lens of the camera module 60 of the display device 100 using the display panel 40 and avoiding the display effect from being affected by the water ripple caused by uneven box thickness.

The first conductive layer 12 includes a plurality of scan lines (as shown in fig. 3). The second conductive layer 14 includes a plurality of data lines (shown in fig. 3). The third conductive layer 18 includes a plurality of first touch traces 182 and a plurality of second touch traces 184 (as shown in fig. 5). The common electrode layer 16 includes a plurality of sub-electrodes 162 (shown in fig. 6) disposed at intervals. In the display time of one frame of picture, each of the sub-electrodes 162 is configured to receive the common voltage and the touch signal voltage in a time-sharing manner. That is, the array substrate 10 may be applied to the in-cell touch display panel 40.

Fig. 3 is a schematic layout diagram of scan lines and data lines of the array substrate 10 in fig. 1. As shown in fig. 3, the routing region B2 has a first symmetry axis L1 and a second symmetry axis L2. In the first direction X, the routing areas B2 are axisymmetrically distributed with respect to the second axis of symmetry L2. In the second direction Y, the routing areas B2 are axisymmetrically distributed with respect to the first axis of symmetry L1. The second direction Y intersects the first direction X. In the first direction X, the display area a is divided by the second symmetry axis L2 into a left area AL and a right area AR located at opposite sides of the second symmetry axis L2, respectively. In the second direction Y, the display area a is divided by the first symmetry axis L1 into an upper area AT and a lower area AB located on opposite sides of the first symmetry axis L1, respectively. That is, the left area AL and the right area AR constitute the entire display area a. The upper region AT and the lower region AB also constitute the entire display region a. The left area AL and the upper area AT and the lower area AB both have an overlapping area, and the right area AR and the upper area AT and the lower area AB both have an overlapping area. In one embodiment, the second direction Y is perpendicular to the first direction X.

As shown in fig. 3, the scan lines include a plurality of first scan lines 122. The plurality of first scan lines 122 extend across the line segment B2 and are sequentially spaced along the second direction Y. A portion of the first scan line 122 extends within the upper lateral region AT and the routing region B2, and another portion of the first scan line 122 extends within the lower lateral region AB and the routing region B2. The plurality of first scan lines 122 are axisymmetrically distributed about a first axis of symmetry L1. The portion of each first scan line 122 in the routing region B2 is axisymmetrically distributed with respect to the second axis of symmetry L2. Each first scan line 122 extends in the first direction X in the left area AL to the routing area B2, bends around the outer contour of the transmissive area B1 in the routing area B2, and also extends in the first direction X in the right area AR. That is, each of the first scan lines 122 is disposed to bypass the light-transmitting region B1, cross the wiring region B2, and extend in the first direction X within the display region a. The first scanning line 122 located in the upper area AT and the routing area B2 is bent and extended along the upper half of the light-transmitting area B1, and the first scanning line 122 located in the lower area AB and the routing area B2 is bent and extended along the lower half of the light-transmitting area B1.

Each first scanning line 122 includes a straight-line portion extending in the first direction X in the left area AL, a curved portion (a circular arc in fig. 3) extending in a bent manner around the outer peripheral contour of the light-transmitting area B1 in the running area B2, and a straight-line portion extending in the first direction X in the right area AR. Wherein the length of the curved portion of the first scanning line 122 varies with the distance from the first symmetry axis L1. The shorter the first scanning line 122 is from the first symmetry axis L1, the longer the length of the curved portion thereof is; the farther the first scan line 122 is from the first axis of symmetry L1, the shorter the length of its curved portion. In one embodiment, the first scan lines 122 are arranged at equal intervals.

As shown in fig. 3, the scan lines further include a plurality of second scan lines 124 disposed only corresponding to the display area a. The second scan line 124 extends only in the display area a and does not extend to the routing area B2. A part of the second scanning line 124 is located AT the upper region AT, and a part of the second scanning line 124 is located AT the lower region AB. In the upper region AT, a plurality of second scan lines 124 are sequentially disposed AT intervals, and each second scan line 124 extends along the first direction X. In the lower area AB, a plurality of second scan lines 124 are sequentially disposed at intervals, and each second scan line 124 extends along the first direction X. Along the second direction Y, the first scan line 122 and the second scan line 124 are sequentially arranged as follows: a plurality of second scan lines 124 located in the upper side area AT, a plurality of first scan lines 122 located in the lower side area AB, and a plurality of second scan lines 124 located in the lower side area AB.

In one embodiment, in the left area AL (or in the right area AR), along the second direction Y, a distance between any two adjacent second scan lines 124, a distance between any two adjacent first scan lines 122, and a distance between adjacent second scan lines 124 and first scan lines 122 are equal.

As shown in fig. 3, the data line includes a plurality of first data lines 142 extending across the routing area B2. The plurality of first data lines 142 are sequentially disposed at intervals along the first direction X. A part of the first data line 142 extends in the left area AL and the routing area B2, and another part of the first data line 142 extends in the right area AR and the routing area B2. The plurality of first data lines 142 are all distributed axisymmetrically with respect to the second symmetry axis L2.

The portion of each first data line 142 in the routing area B2 is axisymmetrically distributed with respect to the first symmetry axis L1. Each of the first data lines 142 extends in the second direction Y in the upper region AT to the wiring region B2, and continues in the second direction Y in the lower region AB after being bent around the outer contour of the transmissive region B1 in the wiring region B2. That is, each arrangement of the first data lines 142 bypasses the light-transmitting region B1, crosses the routing region B2, and extends in the second direction Y within the display region a. The first data line 142 in the left area AL and the wiring area B2 is bent and extended along the left half of the light-transmitting area B1, and the first data line 142 in the right area AR and the wiring area B2 is bent and extended along the right half of the light-transmitting area B1.

Each of the first data lines 142 includes a straight line segment extending in the second direction Y in the upper side region AT, a curved line segment (a circular arc in fig. 3) extending in a bent manner around the outer peripheral contour of the light-transmitting region B1 in the routing region B2, and a straight line segment extending in the second direction Y in the lower side region AB. The length of the curved portion of the first data line 142 varies with the distance from the second axis of symmetry L2. The length of the curved portion of the first data line 142 closer to the second symmetry axis L2 is longer; the farther the first data line 142 is from the first symmetry axis L1, the shorter the length of its curved portion. In one embodiment, the plurality of first data lines 142 are arranged at equal intervals.

As shown in fig. 3, the data lines further include a plurality of second data lines 144 disposed corresponding to the display area a. The second data line 144 extends only within the display area a and does not extend to the routing area B2. A part of the second data line 144 is located at the left area AL, and a part of the second data line 144 is located at the right area AR. In the left area AL, a plurality of second data lines 144 are sequentially disposed at intervals, and each of the second data lines 144 extends along the second direction Y. In the right side area AR, a plurality of second data lines 144 are sequentially disposed at intervals, each of the second data lines 144 extending in the second direction Y.

Referring to fig. 3, all the scan lines and all the data lines are disposed to avoid the camera hole region B, so that the camera hole region B transmits light. At least a portion of the first scan line 122, the first data line 142, and the second data line 144 forms a ring shape surrounding the light-transmitting region B1. All the scanning lines extend in the first direction X in the display area a, and all the data lines extend in the second direction Y in the display area a. The projection of each first data line 142 and each second data line 144 on the substrate is overlapped with all the first scan lines 122 and all the second scan lines 124.

In one embodiment, the camera hole area B is not used for displaying images. Any two adjacent ones of the first scan lines 122 and the second scan lines 124 intersect with any two adjacent ones of the first data lines 142 and the second data lines 144 in the display area a to define a sub-pixel 141.

As shown in fig. 4, each sub-pixel 141 includes a thin film transistor 143 and a pixel electrode 145. The thin film transistor 143 includes a gate electrode GE, a source electrode SE, and a drain electrode DE. The gate electrode GE is electrically connected to one of the first scan line 122 and the second scan line 124. The source electrode SE is electrically connected to one of the first data line 142 and the second data line 144, and the drain electrode DE is electrically connected to the pixel electrode 145.

As shown in fig. 5, the plurality of first touch traces 182 are disposed in alignment with the second routing area B22, but not disposed in the first routing area B21. The plurality of first touch traces 182 are sequentially disposed at intervals along the first direction X. A portion of the first touch trace 182 extends in the left area AL and the second routing area B22, and another portion of the first touch trace 182 extends in the right area AR and the second routing area B22. The plurality of first touch traces 182 are distributed in an axisymmetric manner about the second symmetry axis L2.

The portion of each first touch trace 182 in the second trace area B22 is distributed axisymmetrically with respect to the first symmetry axis L1. Each first touch trace 182 extends to the second routing area B22 along the second direction Y in the upper area AT, and continues to extend along the second direction Y in the lower area AB after bending and extending around the outer contour of the light-transmitting area B1 in the second routing area B22. That is, each of the first touch traces 182 is disposed to bypass the light-transmitting area B1 and the first wiring area B21, cross over the second wiring area B22, and extend in the display area a along the second direction Y. The first touch wire 182 in the left AL and second B22 routing areas is bent and extended along the left half of the light-transmitting area B1, and the first touch wire 182 in the right AR and second B22 routing areas is bent and extended along the right half of the light-transmitting area B1.

Each of the first touch traces 182 includes a straight line portion extending in the second direction Y in the upper region AT, a curved line portion (a circular arc in fig. 5) extending in a bent manner around the outer contour of the light transmission region B1 in the second trace region B22, and a straight line portion extending in the second direction Y in the lower region AB. The length of the curved portion of the first touch trace 182 changes with the distance from the second axis of symmetry L2. The length of the curve part of the first touch trace 182 closer to the second symmetry axis L2 is longer; the farther the first touch trace 182 is from the first symmetry axis L1, the shorter the length of the curve portion is. In one embodiment, the first touch traces 182 are arranged at equal intervals.

As shown in fig. 5, the third conductive layer 18 further includes a plurality of second touch traces 184 disposed corresponding to the display area a. The second touch trace 184 extends only in the display area a, and does not extend to the trace area B2. Part of the second touch trace 184 is located at the left area AL, and part of the second touch trace 184 is located at the right area AR. In the left area AL, a plurality of second touch traces 184 are sequentially disposed at intervals, and each second touch trace 184 extends along the second direction Y. In the right area AR, a plurality of second touch traces 184 are sequentially disposed at intervals, and each second touch trace 184 extends along the second direction Y.

Fig. 6 is an enlarged schematic view at VI in fig. 5. As shown in fig. 6, the plurality of sub-electrodes 162 are sequentially arranged at intervals. The array substrate 10 further includes a driving circuit (not shown) for outputting a voltage to the plurality of sub-electrodes 162. The voltage may be a touch voltage signal and a common voltage. The sub-electrodes 162 receive the touch signal voltage and the common voltage in a time-sharing manner. When the sub-electrode 162 serves as a touch function, the sub-electrode 162 is used for receiving a touch signal voltage, and when the sub-electrode 162 serves as a common electrode, the sub-electrode 162 is used for receiving a common voltage. Each sub-electrode 162 is electrically connected to the driving circuit through at least one touch trace (the first touch trace 182 or the second touch trace 184). The first touch trace 182 or the second touch trace 184 is electrically connected to the corresponding sub-electrode 162 through the via 172 penetrating through the planarization layer 17.

Referring to fig. 3 and 5, the first routing region B21 and the routing region B2 are both annular. The first scan line 122 formed by the first conductive layer 12 and the first data line 142 formed by the second conductive layer 14 are all distributed over the wiring area B2. The first touch trace 182 formed by the third conductive layer 18 is disposed over the second routing area B22, but is not disposed in the first routing area B21 adjacent to the transparent area B1.

As shown in fig. 2, the optical spacer 19 is disposed on the planarization layer 17 at a position aligned with the first routing region B21. That is, the optical spacer 19 is disposed on the surface of the planarization layer 17 where the first touch trace 182 is not disposed. Thus, the flatness of the optical spacer 19 is not affected by the arrangement of the first touch trace 182. And set up the optical spacer 19 around the light transmission area B1 in the camera hole area B, can avoid because the position array substrate 10 of the corresponding light transmission area B1 part membrane layer (for example, the thin-film transistor array layer) is removed, the position box thickness of the light transmission area B1 and peripheral box thickness difference of the light transmission area B1 are great, influence the question of the display effect.

As shown in fig. 5, the loop width of the first routing area B21 is defined as W1, and the loop width of the routing area B2 is defined as W2. In one embodiment, the loop width W1 of the first routing area B21 is at least one fifth of the loop width W2 of the routing area B2. That is, the distance between the area where the first touch trace 182 is located and the transparent area B1 is at least one fifth of the loop width W2 of the routing area B2, so that there is enough space to ensure that the optical spacer 19 can be directly formed on the planarization layer 17. In addition, the array substrate 10 may further be provided with a main optical spacer aligned with the display area a to maintain a gap between the array substrate 10 and the color filter substrate 20. The embodiment of the utility model provides an in, set up optics clearance son 19 in the first wiring district B21 through next-door neighbour printing opacity district B1 for in the position that display area A and camera hole district B are bordered, the support nature is close or the same.

In one embodiment, the first substrate 11 is made of a transparent hard material, such as glass, quartz, or plastic. In other embodiments, the first substrate 11 may be made of a flexible material, such as one or more of polyether sulfone (PES), polyethylene naphthalate (PEN), Polyethylene (PE), Polyimide (PI), polyvinyl chloride (PVC), and polyethylene terephthalate (PET). The first conductive layer 12, the second conductive layer 14, and the third conductive layer 18 are made of at least one material selected from aluminum, silver, gold, chromium, copper, indium, manganese, molybdenum, nickel, neodymium, palladium, platinum, titanium, tungsten, and zinc. The materials of the first insulating layer 13, the second insulating layer 15, and the planarization layer 17 may be selected from silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), and the like.

Fig. 7 is a cross-sectional view of a display panel 40 according to an embodiment of the present invention. As shown in fig. 7, the display panel 40 includes an array substrate 10 and a color filter substrate 20 which are oppositely disposed, and a liquid crystal layer 30 interposed between the array substrate 10 and the color filter substrate 20.

The color filter substrate 20 includes a transparent second substrate 21, and a black matrix 23 and a color filter layer 25 located on one side of the second substrate 21 close to the liquid crystal layer 30, wherein the black matrix 23 and the color filter layer 25 both bypass the light-transmitting region B1. That is, the black matrix 23, the filter layer, aligned with the light-transmitting area B1 is removed.

The color filter substrate 20 further includes an Over Coating (OC) layer 27, the OC layer 27 is located on a side of the black matrix 23 and the color filter layer 25 away from the second substrate 21, and an area of the OC layer 27 aligned with the light-transmitting area B1 is in direct contact with the second substrate 21. The portion of the cover layer 27 aligned with the light-transmitting region B1 is recessed toward the second substrate 21 with respect to the portion thereof aligned with the display region a.

As shown in fig. 7, the alignment transparent region B1, the planarization layer 17 only remained on the first substrate 11, and the cover layer 27 only remained on the second substrate 21, since the display panel 40 is aligned with the transparent region B1, and the partial structures (e.g., the black matrix 23, the color filter layer 25) are removed, the first substrate 11 or the second substrate 21 aligned with the transparent region B1 is prone to be recessed. The embodiment of the utility model provides an in, be provided with the optics clearance son 19 in the first wiring district B21 of next-door neighbour printing opacity district B1, can improve printing opacity district B1's sunken condition, reach the box thickness that reduces printing opacity district B1 position and the purpose of the box thickness difference of display area A. Thereby ensuring the imaging effect of the lens of the camera module 60 of the display device 100 using the display panel 40 and avoiding the display effect from being affected by the water ripple caused by uneven box thickness.

Fig. 8 is a cross-sectional view of a display device 100 according to an embodiment of the present invention. As shown in fig. 8, the display device 100 includes a display panel 40, a backlight module 50, and a camera module 60. The display panel 40 defines a display surface 40 a. The camera module 60 is located on a side of the display panel 40 away from the display surface 40 a. The camera module 60 is disposed corresponding to the camera hole area B to collect image information through the camera hole area B.

The backlight module 50 is a direct type backlight. The backlight module 50 includes a light source (not shown), an optical film set (not shown), a back plate (not shown), and the like. The backlight module 50 defines a mounting hole 52 corresponding to the camera hole area B and penetrating through the backlight module 50. The size of the mounting hole 52 is greater than or approximately equal to the size of the camera hole area B. The camera module 60 is disposed in the mounting hole 52. Because the camera module 60 corresponds the camera hole region B that is encircleed by display area A and sets up, compare in the mode that will make a video recording module 60 setting is in the frame area around display area A and compare, improved display device 100's screen occupation of ratio. The display device 100 may be a mobile phone, a tablet computer, or the like.

The above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention.

Claims (10)

1. An array substrate, wherein the array substrate defines a display area and a camera hole area surrounded by the display area, the camera hole area includes a light-transmitting area and a wiring area surrounding the light-transmitting area, the wiring area includes a first wiring area adjacent to the light-transmitting area and a second wiring area surrounding the first wiring area, the array substrate includes a first substrate and a first conductive layer, a second conductive layer, a common electrode layer and a third conductive layer which are sequentially stacked on the first substrate and spaced apart from each other and arranged in an insulating manner:

the first conducting layer comprises a plurality of first scanning lines arranged at intervals;

the second conducting layer comprises a plurality of first data lines arranged at intervals;

the common electrode layer comprises a plurality of sub-electrodes arranged at intervals, and each sub-electrode is used for receiving a common voltage and a touch signal voltage in a time-sharing manner within the display time of one frame of picture;

the third conductive layer comprises a plurality of first touch-control wires which are arranged at intervals, and each first touch-control wire is at least electrically connected with one sub-electrode;

the array substrate further includes:

the planarization layer is positioned between the common electrode layer and the third conductive layer, the area of the planarization layer, which is aligned with the light transmitting area, is in direct contact with the first substrate, and the area of the planarization layer, which is aligned with the wiring area and the display area, covers the common electrode layer; and

the optical spacer is positioned on the surface of the planarization layer far away from the first substrate and is aligned with the first wiring area;

the third conductive layer is located on the surface, far away from the first substrate, of the planarization layer, and the third conductive layer is arranged in a mode of being aligned with the second wiring area and the display area, and bypasses the light transmitting area and the first wiring area.

2. The array substrate of claim 1, wherein the first routing region and the routing region are both ring-shaped, and wherein a loop width of the first routing region is at least one fifth of a loop width of the routing region.

3. The array substrate of claim 1, wherein each of the first scan lines bypasses the transmissive region, crosses the routing region, and extends in a first direction within the display region;

each first data line bypasses the light-transmitting area, spans the wiring area and extends in a second direction in the display area;

the second direction intersects the first direction;

each first touch routing wire bypasses the light transmission area and the first routing area, spans the second routing area and extends in the display area along the second direction.

4. The array substrate of claim 3, wherein each of the first scan lines, each of the first data lines, and each of the first touch traces comprise curved portions extending around the transmissive region.

5. The array substrate of claim 4, wherein the third conductive layer further comprises a plurality of second touch traces, each of the second touch traces extends in the second direction in the display area, and each of the second touch traces is electrically connected to at least one of the sub-electrodes.

6. The array substrate of claim 5, wherein the first conductive layer further comprises a plurality of second scan lines, the second conductive layer further comprises a plurality of second data lines, each of the second scan lines extends in the first direction in the display area, and each of the second data lines extends in the second direction in the display area.

7. The array substrate of claim 6, wherein any two adjacent of the first scan lines and the second scan lines and any two adjacent of the first data lines and the second data lines cross to define a sub-pixel in the display area;

each of the sub-pixels includes a thin film transistor and a pixel electrode;

the thin film transistor comprises a grid electrode, a source electrode and a drain electrode;

the gate electrode is electrically connected to one of the first scan line and the second scan line, the source electrode is electrically connected to one of the first data line and the second data line, and the drain electrode is electrically connected to the pixel electrode.

8. A display panel, comprising a color filter substrate, a liquid crystal layer and an array substrate, wherein the liquid crystal layer is sandwiched between the color filter substrate and the array substrate, and the array substrate is the array substrate according to any one of claims 1 to 7.

9. The display panel according to claim 8, wherein the color filter substrate includes a second substrate, and a black matrix and a color filter layer on a side of the second substrate close to the liquid crystal layer, the black matrix and the color filter layer being disposed so as to bypass the light-transmitting region.

10. A display device, comprising:

the display panel according to claim 8 or 9;

the backlight module is positioned on one side of the display panel, which is far away from the display surface of the display panel, and the backlight module is defined with a mounting hole which penetrates through the backlight module, and the mounting hole is aligned with the light-transmitting area; and

the camera module is installed in the mounting hole and passes through the light-transmitting area to collect image information.

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