CN211426585U - Signal generating device based on FPGA - Google Patents
Signal generating device based on FPGA Download PDFInfo
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- CN211426585U CN211426585U CN201922005424.8U CN201922005424U CN211426585U CN 211426585 U CN211426585 U CN 211426585U CN 201922005424 U CN201922005424 U CN 201922005424U CN 211426585 U CN211426585 U CN 211426585U
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- generating device
- signal generating
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Abstract
The utility model discloses a signal generator based on FPGA, including the signal generator casing, control panel and top cap, control panel sets up the front end at the signal generator casing, the signal generator casing includes the bottom plate and sets up the left side board on the bottom plate, right side board and posterior lateral plate, the top of the lateral surface of left side board and right side board is equipped with the spout respectively, the both sides of top cap are bent downwards perpendicularly respectively and are formed the hem, the inboard in opposite directions of two hems is equipped with the bar slider respectively, and the bar slider on two hems respectively with the spout sliding connection on left side board and the right side board, the posterior lateral plate upwards extends and forms the department of resist, be equipped with the draw-in groove of a plurality of equidistant arrangements on the medial surface of department of resist, be equipped with a plurality of elastic fixture block with a plurality of draw-in groove one. The utility model relates to a signal generation device based on FPGA, its is rational in infrastructure, has made things convenient for the installation and the dismantlement of top cap to be convenient for maintain signal generation device's inside components and parts.
Description
Technical Field
The utility model relates to a signal generation device based on FPGA.
Background
The signal generator is a device capable of providing electric signals of various frequencies, waveforms and output levels, and is used as a signal source or an excitation source for testing when measuring amplitude characteristics, frequency characteristics, transmission characteristics and other electric parameters of various telecommunication systems or telecommunication devices, and when measuring characteristics and parameters of components, so that the signal generator has wide application in production practice and technical fields. But current signal generation device structure is comparatively complicated, when maintaining its inside components and parts, needs dismantle signal generation device casing, will demolish various fasteners earlier at the dismantlement in-process, and the operation that leads to whole maintenance process is comparatively loaded down with trivial details, is unfavorable for improving maintenance efficiency.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a signal generating device based on FPGA, its is rational in infrastructure, has made things convenient for the installation and the dismantlement of top cap to be convenient for maintain signal generating device's inside components and parts.
In order to achieve the above purpose, the technical solution of the present invention is to design a signal generating device based on FPGA, which comprises a signal generating device casing, a control panel and a top cover, wherein the control panel is disposed at the front end of the signal generating device casing, the signal generating device casing comprises a bottom plate, and a left side plate, a right side plate and a back side plate disposed on the bottom plate, the left side plate and the right side plate are parallel to each other, and the tops of the outer side surfaces of the left side plate and the right side plate are respectively provided with a chute, the back side plate is connected between the left side plate and the right side plate, two sides of the top cover are respectively bent downwards and vertically to form a hem, the opposite inner sides of the two hems are respectively provided with a bar-shaped slider, and the two bar-shaped sliders on the hem are respectively connected with the chutes on the left side plate and the right side plate in a sliding manner, the back side, and a plurality of elastic clamping blocks which are correspondingly clamped with the clamping grooves one by one are arranged on the rear end surface of the top cover.
Preferably, the left side plate and the right side plate are respectively provided with a heat dissipation hole.
Preferably, the four corners of the bottom surface of the bottom plate are respectively provided with a supporting pad.
Preferably, the sliding groove is a T-shaped sliding groove, and the cross section of the strip-shaped sliding block is T-shaped.
Preferably, the control panel is provided with a display screen, a knob, a button and a wiring hole.
The utility model has the advantages and the beneficial effects that: the utility model provides a signal generation device based on FPGA, its is rational in infrastructure, has made things convenient for the installation and the dismantlement of top cap to be convenient for maintain signal generation device's inside components and parts. When the internal components of the signal generating device shell need to be maintained, acting force is applied to the top cover firstly, so that the elastic clamping block on the top cover is separated from the clamping groove of the resisting part, then the top cover is pulled out outwards, and the strip-shaped sliding blocks on the folded edges slide along the sliding grooves on the left side plate and the right side plate, so that the top opening of the signal generating device shell is opened, and the internal components of the signal generating device shell can be maintained; after the maintenance is finished, the top cover is moved towards the resisting part until the elastic clamping block is clamped into the clamping groove, and then the top cover is installed.
Drawings
Fig. 1 is a schematic diagram of the present invention.
Fig. 2 is an enlarged view at a in fig. 1.
Fig. 3 is a schematic view of the middle roof and the rear side plate of the present invention.
Fig. 4 is a schematic view of the left side plate of the present invention.
Detailed Description
The following description will further describe embodiments of the present invention with reference to the accompanying drawings and examples. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
The utility model discloses the technical scheme who specifically implements is:
as shown in fig. 1, 2, 3 and 4, a signal generating device based on an FPGA comprises a signal generating device casing, a control panel 1 and a top cover 2, wherein the control panel 1 is arranged at the front end of the signal generating device casing, the signal generating device casing comprises a bottom plate 3, and a left side plate 4, a right side plate 5 and a rear side plate 6 which are arranged on the bottom plate 3, the left side plate 4 and the right side plate 5 are parallel to each other, sliding grooves 7 are respectively arranged at the tops of the outer side surfaces of the left side plate 4 and the right side plate 5, the rear side plate 6 is connected between the left side plate 4 and the right side plate 5, two sides of the top cover 2 are respectively bent downwards to form folded edges 8, strip-shaped sliding blocks 9 are respectively arranged at the opposite inner sides of the two folded edges 8, the strip-shaped sliding blocks 9 on the two folded edges 8 are respectively connected with the sliding grooves 7 on the left side plate 4 and the right side plate 5 in a, the inner side surface of the blocking part 10 is provided with a plurality of clamping grooves which are arranged at equal intervals, and the rear end surface of the top cover 2 is provided with a plurality of elastic clamping blocks 11 which are correspondingly clamped with the clamping grooves one by one.
The left side plate 4 and the right side plate 5 are respectively provided with a heat radiation hole 12.
The four corners of the bottom surface of the bottom plate 3 are respectively provided with a supporting pad 13.
The sliding groove is a T-shaped sliding groove, and the section of the strip-shaped sliding block 9 is T-shaped.
The control panel 1 is provided with a display screen 14, a knob 15, a button 16 and a wiring hole 17.
The utility model has the advantages and the beneficial effects that: the utility model provides a signal generation device based on FPGA, its is rational in infrastructure, has made things convenient for the installation and the dismantlement of top cap 2 to be convenient for maintain signal generation device's inside components and parts. When the internal components of the signal generating device shell need to be maintained, acting force is firstly applied to the top cover 2, so that the elastic clamping block 11 on the top cover 2 is separated from the clamping groove of the resisting part 10, then the top cover 2 is outwards pulled out, and the strip-shaped sliding block 9 on the folded edge 8 slides along the sliding grooves 7 on the left side plate 4 and the right side plate 5, so that the top opening of the signal generating device shell is opened, and the internal components of the signal generating device shell can be maintained; after the maintenance is finished, the top cover 2 is moved towards the resisting part 10 until the elastic clamping block 11 is clamped into the clamping groove, and then the top cover 2 is installed.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the technical principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.
Claims (5)
1. A signal generating device based on FPGA is characterized by comprising a signal generating device shell, a control panel and a top cover, wherein the control panel is arranged at the front end of the signal generating device shell, the signal generating device shell comprises a bottom plate, a left side plate, a right side plate and a rear side plate, the left side plate and the right side plate are parallel to each other, the tops of the outer side surfaces of the left side plate and the right side plate are respectively provided with a sliding groove, the rear side plate is connected between the left side plate and the right side plate, two sides of the top cover are respectively bent downwards and vertically to form folded edges, the opposite inner sides of the two folded edges are respectively provided with a strip-shaped sliding block, the strip-shaped sliding blocks on the two folded edges are respectively in sliding connection with the sliding grooves on the left side plate and the right side plate, the rear side plate extends upwards to form a blocking part, and the inner side, and a plurality of elastic clamping blocks which are correspondingly clamped with the clamping grooves one by one are arranged on the rear end surface of the top cover.
2. The FPGA-based signal generating device of claim 1, wherein the left side plate and the right side plate are respectively provided with heat dissipation holes.
3. The FPGA-based signal generating device of claim 2, wherein the bottom plate is provided with support pads at four corners of the bottom surface.
4. The FPGA-based signal generating device of claim 3, wherein the sliding groove is a T-shaped sliding groove, and the cross-sectional shape of the strip-shaped sliding block is T-shaped.
5. The FPGA-based signal generating device of claim 4, wherein the control panel is provided with a display screen, a knob, a button and a wiring hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922005424.8U CN211426585U (en) | 2019-11-20 | 2019-11-20 | Signal generating device based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922005424.8U CN211426585U (en) | 2019-11-20 | 2019-11-20 | Signal generating device based on FPGA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211426585U true CN211426585U (en) | 2020-09-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922005424.8U Active CN211426585U (en) | 2019-11-20 | 2019-11-20 | Signal generating device based on FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211426585U (en) |
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2019
- 2019-11-20 CN CN201922005424.8U patent/CN211426585U/en active Active
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