CN211406415U - Printed circuit board - Google Patents

Abstract

The present disclosure relates to a printed circuit board, and relates to the field of semiconductor technology. The printed circuit board comprises a multilayer structure and a via hole for communicating two adjacent layers in the multilayer structure, wherein the via hole comprises a laser hole and a conductive layer positioned in the laser hole. The technical scheme of the disclosure can increase the through-current capacity of the PCB, thereby achieving the effect of reducing the temperature rise, avoiding the enlargement of the wiring area caused by avoiding the position of the drilling hole, and reducing the width of the PCB to improve the battery capacity.

Description

Printed circuit board

Technical Field

The present disclosure relates to the field of semiconductor technology, and more particularly, to a printed circuit board.

Background

With the rapid development of portable electronic products and the increasing abundance of functions thereof, the battery performance of the electronic products is under severe examination, and especially, the battery capacity and the charging speed are required to be higher.

At present, the width of a Printed Circuit Board (PCB) which can meet the 6-8A charging requirement can reach 5-7 mm, a 6-layer 1-step HDI (High Density interconnect) is generally adopted in a laminated structure of the PCB, and the HDI Board is communicated with different laminates by adopting a mechanical drilling mode, and the temperature rise of the protection Board at the moment can reach more than 30 ℃. The structure can not only influence the wiring path due to avoiding the position of the drilling hole, so that the width of the PCB can not be reduced, but also further influence the battery capacity due to the fact that the width of the PCB occupies the volume of the battery core, and in addition, the high temperature rise of more than 30 ℃ can also influence the user experience, so that how to effectively control the temperature rise while ensuring the battery capacity becomes a research subject which needs to be solved in the development process of electronic products.

SUMMERY OF THE UTILITY MODEL

To overcome the problems in the related art, embodiments of the present disclosure provide a printed circuit board. The technical scheme is as follows:

according to a first aspect of the embodiments of the present disclosure, a printed circuit board is provided, which includes a multilayer structure and a via hole for communicating two adjacent layers in the multilayer structure, where the via hole includes a laser hole and a conductive layer located in the laser hole.

In one embodiment, the two adjacent layers comprise a first preset layer and a second preset layer which are adjacently arranged;

the multilayer structure further comprises a preset routing and a third preset layer which is laminated with the first preset layer and the second preset layer;

the laser holes between the first preset layer and the second preset layer are reference laser holes, and the third preset layer is provided with the preset routing lines at positions corresponding to the reference laser holes.

In one embodiment, the third preset layer is adjacent to any one of the first preset layer and the second preset layer;

or the third preset layer is not adjacent to any preset layer of the first preset layer and the second preset layer.

In one embodiment, the conductive layer is a conductive metal filled inside the laser holes.

In one embodiment, the conductive metal fills the interior of the laser holes.

In one embodiment, the conductive metal comprises copper.

In one embodiment, the printed circuit board further comprises a pad surrounding the laser hole.

In one embodiment, the aperture of the laser holes is 0.1mm plus or minus 0.05mm, and the aperture of the bonding pads is 0.3mm plus or minus 0.05 mm.

In one embodiment, the number of layers of the multilayer structure is an even number greater than or equal to 6.

In one embodiment, the printed circuit board further includes a solder resist layer disposed on an outer surface of the outermost two layers of the multilayer structure.

The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:

according to the technical scheme, the communication between any two adjacent layers can be realized by adopting the laser holes in the multilayer structure, so that the space of other layers is not required to be occupied, on one hand, enough wiring width can be reserved for the main loop running in other layers, the wiring width can be equivalently increased, the cross section area of the conductor is increased, the through-current capacity of the main loop is increased, and the increase of the cross section area can reduce the internal resistance of the conductor due to the fact that the internal resistance of the conductor is inversely proportional to the cross section area of the conductor, so that the power consumption of the circuit is reduced, the effect of reducing temperature rise on the temperature level is achieved, on the other hand, the expansion of the wiring area caused by avoiding the drilling position can be avoided, and therefore the width of a PCB can be reduced to improve the battery capacity.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

FIG. 1 is a schematic diagram of a PCB stack-up structure shown in accordance with an exemplary embodiment;

FIG. 2 is an illustration of an effect of mechanical drilling, according to an exemplary embodiment;

FIG. 3 is an illustration of an effect of laser drilling according to an exemplary embodiment;

FIG. 4 is a schematic diagram of a PCB stack-up structure shown in accordance with an exemplary embodiment;

fig. 5 is a design drawing illustrating a PCB stack structure according to an exemplary embodiment.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

The technical solution provided in the embodiment of the present disclosure relates to a printed circuit board, and in particular, to a stacked structure of a PCB, which can be applied to a mobile phone, a tablet computer, an electronic book reader, and other portable electronic devices that require a battery, and this embodiment is not particularly limited thereto.

In the related technology, the width of the PCB which meets the 6-8A charging requirement can reach 5-7 mm, a 6-layer 1-step HDI board is generally adopted in a laminated structure of the PCB, the HDI board is communicated with different layer boards in a mechanical drilling mode, and the temperature rise of the protection board can reach more than 30 ℃. Based on this structure, because mechanical drilling runs through in each plywood, even if need not to realize the plywood of intercommunication at the drilling position and dodge out the drilling space, consequently can inevitably influence the wiring route to enlarge the PCB board width, cause higher temperature rise in the charging process easily moreover. In addition, under the condition that the product battery compartment is fixed, the wider the PCB board is, the larger the volume of the battery cell occupied by the PCB board is, which also affects the capacity of the battery.

Based on this, the PCB multilayer board provided by the embodiment of the present disclosure can adopt the laser holes in the multilayer structure to realize the communication between any two adjacent layers, so that the space of other layers is not required to be occupied, and thus on one hand, a sufficient wiring width can be reserved for the main loop running in other layers, which can be equivalent to increasing the cross-sectional area of the conductor, thereby increasing the current capacity of the main loop, and since the internal resistance of the conductor is inversely proportional to the cross-sectional area thereof, the increase of the cross-sectional area can reduce the internal resistance of the conductor, thereby reducing the power consumption of the circuit, which is embodied in that the temperature layer is the effect of reducing the temperature rise, and on the other hand, the enlargement of the wiring area caused by avoiding the drilling position can be avoided, thereby reducing the PCB board width and improving the battery capacity.

Fig. 1 illustrates a schematic structural view of a PCB provided in the technical solution of the present disclosure. As can be seen from fig. 1, the PCB includes a multi-layer structure and a via hole for communicating between two adjacent layers 100 in the multi-layer structure, the via hole includes a laser hole 200 and a conductive layer located inside the laser hole 200, and the conductive layer can be used to realize an electrical connection between the two adjacent layers 100.

The number of layers of the PCB multilayer structure may be greater than or equal to four, and is usually set to an even number of layers, for example, six layers of boards, etc., but the embodiment is not limited thereto.

Taking a six-layer PCB multilayer structure as an example, in the six-layer PCB structure, any two adjacent layers 100 can be communicated by using the laser holes 200, and certainly, in this embodiment, the laser holes 200 can be partially used, and the mechanical holes can be partially used to communicate the layers, as long as the space reserved for avoiding the drilling position can be reduced to a certain extent. It should be noted that: when the laser holes 200 are used for realizing the communication between the two adjacent layers 100, a conductive layer such as an electroplated copper layer needs to be arranged inside the laser holes 200, so that the electric connection between the two layers can be realized, and the thickness of the plated layer can be determined according to the actual process and performance requirements.

Taking the laser holes 200 adopted in all the layers 100 in the multilayer structure of the PCB as an example, if the first laser holes are adopted for communication between the first layer and the second layer, the wiring can be normally performed at the positions of the third layer, the fourth layer, the fifth layer and the sixth layer corresponding to the first laser holes, and similarly, if the second laser holes are adopted for communication between the third layer and the fourth layer, the wiring can be normally performed at the positions of the first layer, the second layer, the fifth layer and the sixth layer corresponding to the second laser holes. Therefore, in the case that any two adjacent layers 100 are communicated by using the laser holes 200, the other layers 100 can be wired normally at the positions corresponding to the laser holes 200, and the description thereof is omitted.

Therefore, in the PCB laminated structure provided by the embodiment of the present disclosure, the laser holes 200 are formed between the two adjacent layers 100 by using a laser punching method, and the conductive layers are formed in the laser holes 200, so as to implement conduction between the two adjacent layers 100, and thus, a space of other layers 100 is not required to be occupied, so that a sufficient wiring width can be reserved for a routing design of other layers, for example, a main routing loop, which is equivalent to increasing a cross-sectional area of a conductor, thereby increasing a current capacity of the main routing loop, and since an internal resistance of the conductor is inversely proportional to the cross-sectional area, the internal resistance of the conductor can be reduced by increasing the cross-sectional area, thereby reducing a power consumption of a circuit, which is embodied in that a temperature layer has an effect of reducing temperature rise. Because the design mode does not need to reserve space for avoiding the position of the drilling hole, the wiring area can be effectively reduced, and the width of the PCB is reduced to improve the capacity of the battery.

Fig. 2 and 3 are diagrams illustrating the effect of mechanical drilling and laser drilling. As can be seen from fig. 2, since the mechanical drilling will form the via 500 in the PCB stack structure, the mechanical drilling formed in the first layer and the second layer will also occupy the space of other layers, such as the third layer, thereby affecting the trace design of other layers. As can be seen from fig. 3, in the present embodiment, laser drilling is used to form the laser holes 200 in the first layer and the second layer, which does not occupy the space of other layers, such as the third layer, and therefore does not affect the trace design of other layers.

The following provides experimental results comparing the PCB laminate structure in the technical scheme of the present disclosure with the PCB laminate structure in the related art. Experiments prove that: firstly, under the same current and temperature rise requirements, the width of a PCB only needs 4-4.8 mm, the width of the PCB is obviously reduced compared with 5-7 mm, and meanwhile, the battery capacity can be improved by 50-100 mAh; secondly, under the same current and board width requirements, the temperature rise of the PCB can be reduced by more than 5 ℃, namely, the temperature rise can be controlled within 25 ℃ during large-current charging, so that the user experience is enhanced; thirdly, under the same board width and temperature rise requirements, the through-current capacity of the PCB can be increased by 1A, so that the quick charging capacity is improved. Therefore, the PCB laminated structure provided by the embodiment of the disclosure can significantly improve the performance of the battery, so as to obtain good user experience, and the effect of the technical scheme is more obvious when the number of layers of the PCB laminated structure is greater than or equal to 6.

In this embodiment, the two adjacent layers 100 in the multilayer structure may include a first preset layer and a second preset layer which are adjacently disposed, and the multilayer structure may further include a third preset layer and a preset wire which are stacked with the first preset layer and the second preset layer. Wherein, regard as reference radium perforation with radium perforation 200 of intercommunication first preset layer and second preset layer, the third preset layer is equipped with in the position department corresponding to this reference radium perforation and predetermines the line, promptly: the positions of the reference laser holes in the first preset layer and the second preset layer do not affect the routing design in the third preset layer.

It should be noted that: the first, second and third preset layers are not the first, second and third layers in the above embodiments, and are numbered in the order of lamination of the PCB (from top to bottom or from bottom to top), but the first, second and third preset layers are only for distinguishing two layers provided with the reference laser holes from other layers than the two layers, for example, the first and second preset layers are the third and fourth layers adjacently disposed, and the third preset layer is other layers than the third and fourth layers. Therefore, the first preset layer and the second preset layer refer to two layers 100 which are arranged adjacently, the laser holes 200 arranged in the two preset layers are used as reference laser holes, and the wiring design in the third preset layer is not affected by the reference laser holes, namely, an avoidance space does not need to be reserved for the reference laser holes.

The third preset layer and any one of the first preset layer and the second preset layer can be arranged adjacently, or the third preset layer and any one of the first preset layer, the second preset layer and the third preset layer are not arranged adjacently. In one embodiment, the third preset layer may be adjacent to the first preset layer or the second preset layer; in another embodiment, the third predetermined layer may be not adjacent to both the first predetermined layer and the second predetermined layer. Therefore, no matter whether the third preset layer is adjacent to the first preset layer or the second preset layer or not, the wiring design at the position, corresponding to the reference laser hole, in the third preset layer is not influenced.

It should be understood that: the laser holes 200 may be provided for two different adjacent layers 100, for example, a first laser hole for communicating the first layer with the second layer, a second laser hole for communicating the third layer with the fourth layer, and the like, but when the wiring design of the third preset layer is performed, it needs to be considered that a reference laser hole is communicated between the first preset layer and the second preset layer, that is, the concept of the reference laser hole is only present when the trace in the third preset layer is designed, which is intended to illustrate that the third preset layer can be normally wired at a position corresponding to the reference laser hole 20, thereby avoiding the defect of avoiding a mechanical position of drilling in the related art.

Fig. 4 illustrates a schematic diagram of a PCB stack structure provided in the technical solution of the present disclosure. As can be seen from fig. 4, the PCB stack structure includes a multi-layer structure and a via hole for connecting any two adjacent layers 100 in the multi-layer structure, the via hole includes a laser hole 200 and a conductive layer located in the laser hole 200, and the conductive layer may be a conductive metal 300 such as copper filled in the laser hole 200. The conductive metal 300 fills the inside of the laser hole 200, so that the surface of the conductive metal 300 and the surface of the layer provided with the laser hole 200 are flush with each other, that is, the filled conductive metal 300 can fill the laser hole 200 and does not protrude from the surface of the layer 100.

In this embodiment, the conductive metal 300 may be formed by electroplating, for example, a copper plating layer may be formed inside the laser hole 200 by a double electroplating process. It should be noted that: in the copper electroplating process, in addition to forming a copper plating layer inside the laser hole 200, a copper plating layer is formed on the surface of the current layer. Therefore, in the embodiment, by filling the conductive metal 300 in the laser hole 200, not only can a sufficient wiring width be reserved for the main circuit running in other layers, but also the overall metal thickness on the surface of the plating layer can be increased, and the cross-sectional area of the conductor can be increased, so that the through-current capacity of the circuit is increased, and the temperature rise is further reduced. Of course, the forming manner of the conductive metal 300 in the present embodiment is not particularly limited, and may be formed in other manners.

In this embodiment, a bonding pad may be further disposed on the periphery of the laser hole 200, that is, the bonding pad surrounds the laser hole 200, the aperture of the laser hole 200 is 0.1 ± 0.05mm, and the aperture of the bonding pad is 0.3 ± 0.05 mm.

Further, the PCB may further include a solder resist layer disposed on the outermost two layers 100 in the multi-layer structure, and the solder resist layer may expose the solder portion by opening a window in the entire solder resist material.

The technical solution of the present disclosure is exemplified below with reference to the PCB design shown in fig. 5. Wherein Hoz is Half ounce Copper thickness (about 18 μm) in terms of Half oz, Plate is surface Copper plated, PP1080 is the type of prepreg, core 0.076mm H/H oz is Half ounce Copper thickness on both sides of CCL surface (CCL) with Copper-clad Laminate (CCL) of 0.076mm as center, mil is thickness unit, 1mil is equal to 25.4 μm. Based on this, in the design of the PCB laminated structure, the via holes in each layer 100 are all laser holes 200, which specifically include laser holes 200 communicating between the first layer and the second layer, laser holes 200 communicating between the second layer and the third layer, laser holes 200 communicating between the third layer and the fourth layer, laser holes 200 communicating between the fourth layer and the fifth layer, and laser holes 200 communicating between the fifth layer and the sixth layer; wherein, the aperture of each radium hole 200 is 0.1mm, and the aperture of the peripheral bonding pad 400 is 0.3 mm.

It should be noted that: the design of fig. 5 is merely an exemplary illustration, and the PCB stack structure in the present disclosure may also be applied to other process designs as long as the communication between the two adjacent layers 100 is achieved by using the laser holes 200.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure should be limited only by the attached claims.

Claims (10)

1. The printed circuit board is characterized by comprising a multilayer structure and a via hole for communicating two adjacent layers in the multilayer structure, wherein the via hole comprises a laser hole and a conductive layer positioned in the laser hole, and the number of layers of the multilayer structure is more than or equal to three.

2. The printed circuit board of claim 1, wherein the two adjacent layers comprise a first predetermined layer and a second predetermined layer disposed adjacent to each other;

the multilayer structure further comprises a preset routing and a third preset layer which is laminated with the first preset layer and the second preset layer;

the laser holes between the first preset layer and the second preset layer are reference laser holes, and the third preset layer is provided with the preset routing lines at positions corresponding to the reference laser holes.

3. The printed circuit board of claim 2, wherein the third predetermined layer is adjacent to any one of the first predetermined layer and the second predetermined layer;

or the third preset layer is not adjacent to any preset layer of the first preset layer and the second preset layer.

4. The printed circuit board of claim 1, wherein the conductive layer is a conductive metal filled inside the laser holes.

5. The printed circuit board of claim 4, wherein the conductive metal fills the interior of the laser holes.

6. The printed circuit board of claim 4, wherein the conductive metal comprises copper.

7. The printed circuit board of claim 1, further comprising a pad surrounding the laser hole.

8. The PCB of claim 7, wherein the aperture of the laser hole is 0.1mm + 0.05mm, and the aperture of the bonding pad is 0.3mm + 0.05 mm.

9. The printed circuit board of claim 1, wherein the number of layers of the multilayer structure is an even number greater than or equal to 6.

10. The printed circuit board of claim 1, further comprising a solder resist layer disposed on an outer surface of the outermost two layers of the multilayer structure.

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