CN211377692U - Power management circuit applied to intelligent terminal - Google Patents
Power management circuit applied to intelligent terminal Download PDFInfo
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- CN211377692U CN211377692U CN201922165957.2U CN201922165957U CN211377692U CN 211377692 U CN211377692 U CN 211377692U CN 201922165957 U CN201922165957 U CN 201922165957U CN 211377692 U CN211377692 U CN 211377692U
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- intelligent terminal
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Abstract
The utility model discloses a be applied to intelligent terminal's power management circuit, including central processing module, super capacitor, electric capacity electric quantity detection circuitry and outage control circuit, super capacitor positive pole connects electric capacity electric quantity detection circuitry and outage control circuit respectively, central processing module electric quantity signal input is through connecting super capacitor and detecting super capacitor electric quantity, central processing module control end connects outage control circuit and controls outage control circuit break-make, super capacitor supplies power for intelligent terminal through outage control circuit, central processing module communication end connects intelligent terminal communication end; the utility model discloses can monitor intelligent terminal power supply electric quantity to power up and fall the electricity according to the required power requirement control intelligent terminal of intelligent terminal work, the power supply stability of guarantee intelligent terminal power can in time report the power status information simultaneously, conveniently in time carries out failure diagnosis and maintenance.
Description
Technical Field
The utility model relates to a system power management and go up power and slowly open power-down protection circuit technical field, especially relate to a be applied to intelligent terminal's power management circuit.
Background
At present, in intelligent terminals such as gateways and intelligent detectors, an intelligent terminal power supply often relates to peripherals with different working voltages, and the stability of the power supply is related to the stability of the functions of the whole system. Therefore, the fluctuation range of the power supply voltage of the intelligent terminal must be controlled to be in a proper range when the system is powered on and powered off.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a be applied to intelligent terminal's power management circuit can monitor intelligent terminal power supply electric quantity to power up and fall the electricity according to the required power requirement control intelligent terminal of intelligent terminal work, guarantee the power stability of intelligent terminal system power, can in time report power state information simultaneously, the convenient troubleshooting and the maintenance of in time carrying on.
The utility model adopts the technical proposal that:
a power supply management circuit applied to an intelligent terminal comprises a central processing module, a super capacitor, a capacitor electric quantity detection circuit and a power-off control circuit, wherein the anode of the super capacitor is respectively connected with the capacitor electric quantity detection circuit and the power-off control circuit; the communication end of the central processing module is connected with the communication end of the intelligent terminal;
the capacitance electric quantity detection circuit comprises a fifth resistor and a seventh resistor, one end of the fifth resistor is connected with the anode of the super capacitor, the other end of the fifth resistor is connected with the seventh resistor in series and then is grounded, and the common end of the fifth resistor and the seventh resistor is connected with the electric quantity signal input end of the central processing module.
Furthermore, the power-off control circuit comprises a third resistor, a PMOS tube, a sixth resistor and an NMOS tube; the source electrode of the PMOS tube is connected with the super capacitor, the drain electrode of the PMOS tube is connected with the intelligent terminal, the grid electrode of the PMOS tube is connected with the drain electrode of the NMOS tube, the third resistor is connected between the source electrode and the grid electrode of the PMOS tube in series, the grid electrode of the NMOS tube is connected with the central processing module, the source electrode of the NMOS tube is grounded, and the sixth resistor is connected between the source electrode and the grid electrode of the NMOS tube in series.
Further, a schottky diode is connected in series between the super capacitor and the power-off control circuit.
Further, the capacity of the super capacitor is 1.5F.
Furthermore, the central processing module adopts a singlechip.
Further, the single chip microcomputer is STM32F030F 4.
The utility model discloses following beneficial effect has:
(1) the super capacitor is used as a standby power supply for power-off alarm of intelligent terminals such as a gateway and an intelligent detector, the central processing module detects whether the electric quantity of the super capacitor meets the requirement of a system working voltage range by using the electric quantity detection circuit of the capacitor, the power supply of the super capacitor to the intelligent terminal is realized by connecting the power-off control circuit when the electric quantity of the super capacitor meets the requirement, and the power supply of the intelligent terminal is controlled to be cut off when the electric quantity of the capacitor is lower than the stable working voltage range of the system, so that the problems of abnormal system working and the like caused by the fact that the power supply voltage of the intelligent terminal is not in; meanwhile, the central processing module is adopted to detect the electric quantity information, so that the power supply state can be timely uploaded to the management platform, the platform can conveniently find the system abnormity and timely carry out fault diagnosis and maintenance, and the stability and maintainability of the utility model are improved;
(2) the central processing module is used for controlling the NMOS to be opened or disconnected to realize the on-off of the power-off control circuit, the intelligent terminal is powered on and powered off, and the intelligent terminal is high in sensitivity, strong in stability, simple in structure, convenient and practical.
Drawings
Fig. 1 is a schematic circuit block diagram of the present invention;
fig. 2 is an electrical schematic diagram of the present invention.
Detailed Description
As shown in fig. 1 and fig. 2, the utility model comprises a central processing module, a super capacitor, a capacitor electricity quantity detection circuit and a power-off control circuit, wherein the positive electrode of the super capacitor is respectively connected with the capacitor electricity quantity detection circuit and the power-off control circuit, the electricity quantity signal input end of the central processing module is connected with the super capacitor and detects the electricity quantity of the super capacitor, the control end of the central processing module is connected with the power-off control circuit and controls the power-off control circuit to be switched on and off, and the super capacitor supplies power to an intelligent terminal through the power-off control circuit; the communication end of the central processing module is connected with the communication end of the intelligent terminal; the intelligent terminal comprises a gateway, an intelligent detector and the like;
the capacitance electric quantity detection circuit comprises a fifth resistor and a seventh resistor, one end of the fifth resistor is connected with the anode of the super capacitor, the other end of the fifth resistor is connected with the seventh resistor in series and then is grounded, and the common end of the fifth resistor and the seventh resistor is connected with the electric quantity signal input end of the central processing module
In order to better understand the present invention, the technical solution of the present invention is further explained below with reference to the accompanying drawings.
As shown in fig. 1 and fig. 2, the utility model comprises a single chip microcomputer, a super capacitor C1, a capacitor electricity quantity detection circuit and a power-off control circuit, wherein a communication port of the single chip microcomputer is connected with a communication port of the intelligent terminal; the intelligent terminal comprises a gateway, an intelligent detector and the like.
The single chip microcomputer preferably adopts models such as STM32F030F4, and the capacity of super capacitor C1 selects 1.5F.
After the super capacitor C1 is charged by an external power supply, the first positive connecting point of the super capacitor C1 is connected with the capacitor electricity quantity detection circuit, and the second positive connecting point of the super capacitor C1 is connected with the power-off control circuit.
The capacitor electricity quantity detection circuit comprises a fifth resistor R5 and a seventh resistor R7, one end of the fifth resistor R5 is connected with a first connection point of the positive electrode of the super capacitor C1, the other end of the fifth resistor R5 is connected with the seventh resistor R7 in series and then is grounded, and the common end of the fifth resistor R5 and the seventh resistor R7 is connected with the ADC port of the single chip microcomputer and transmits an electricity quantity signal of the super capacitor C1 to the single chip microcomputer.
The fifth resistor R5 preferably has a resistance of 10K Ω and the seventh resistor R7 preferably has a resistance of 12K Ω.
The power-off control circuit comprises a third resistor R3, a PMOS tube T1, a sixth resistor R6 and an NMOS tube T2.
The source electrode of the PMOS tube T1 is connected with the second connection point of the anode of the super capacitor C1 through a Schottky diode D3, the drain electrode of the PMOS tube T1 is connected with an intelligent terminal, the grid electrode of the PMOS tube T1 is connected with the drain electrode of the NMOS tube T2, and the third resistor R3 is connected between the source electrode and the grid electrode of the PMOS tube T1 in series.
The grid electrode of the NMOS tube T2 is connected with an IO2 port of the single chip microcomputer, the source electrode of the NMOS tube T2 is grounded, and the sixth resistor R6 is connected between the source electrode and the grid electrode of the NMOS tube T2 in series.
The third resistor R3 and the sixth resistor R6 each preferably have a resistance of 10K Ω.
The working principle of the utility model is as follows:
the capacitor electricity quantity detection circuit collects voltage signals of the super capacitor C1 through the voltage dividing resistors R5 and R7 and supplies power to the intelligent terminal through the Schottky diode D3 and the PMOS transistor T1. The electric quantity of the super capacitor C1 is detected through an ADC port of the single chip microcomputer, and when the working voltage range of the system is reached, the single chip microcomputer controls an NMOS tube T2 to open a PMOS tube T1 to supply power to the intelligent terminal; when the electric quantity of the super capacitor C1 is lower than the stable working voltage range of the system, the single chip microcomputer controls the NMOS transistor T2 to disconnect the PMOS transistor T1, so that the power supply of the intelligent terminal is cut off, and the problems that the system works abnormally and the like due to the fact that the power supply voltage of the intelligent terminal is not in the stable working range are avoided. Meanwhile, the single chip microcomputer can upload the power state to the management platform in time through the intelligent terminal, so that the platform can conveniently find the reason of system abnormity, and the stability and maintainability of the system are improved.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that the technical solutions described in the foregoing embodiments may be modified or equivalent replaced by some or all of the technical features, and the modifications or the replacements may not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (6)
1. The utility model provides a be applied to intelligent terminal's power management circuit which characterized in that: the intelligent terminal comprises a central processing module, a super capacitor, a capacitor electric quantity detection circuit and a power-off control circuit, wherein the anode of the super capacitor is respectively connected with the capacitor electric quantity detection circuit and the power-off control circuit; the communication end of the central processing module is connected with the communication end of the intelligent terminal;
the capacitance electric quantity detection circuit comprises a fifth resistor and a seventh resistor, one end of the fifth resistor is connected with the anode of the super capacitor, the other end of the fifth resistor is connected with the seventh resistor in series and then is grounded, and the common end of the fifth resistor and the seventh resistor is connected with the electric quantity signal input end of the central processing module.
2. The power management circuit applied to the intelligent terminal according to claim 1, wherein: the power-off control circuit comprises a third resistor, a PMOS (P-channel metal oxide semiconductor) tube, a sixth resistor and an NMOS (N-channel metal oxide semiconductor) tube; the source electrode of the PMOS tube is connected with the super capacitor, the drain electrode of the PMOS tube is connected with the intelligent terminal, the grid electrode of the PMOS tube is connected with the drain electrode of the NMOS tube, the third resistor is connected between the source electrode and the grid electrode of the PMOS tube in series, the grid electrode of the NMOS tube is connected with the central processing module, the source electrode of the NMOS tube is grounded, and the sixth resistor is connected between the source electrode and the grid electrode of the NMOS tube in series.
3. The power management circuit applied to the intelligent terminal according to claim 1 or 2, wherein: and a Schottky diode is connected in series between the super capacitor and the power-off control circuit.
4. The power management circuit applied to the intelligent terminal according to claim 1, wherein: the capacity of the super capacitor is 1.5F.
5. The power management circuit applied to the intelligent terminal according to claim 1, wherein: the central processing module adopts a singlechip.
6. The power management circuit applied to the intelligent terminal according to claim 5, wherein: the single chip microcomputer is STM32F030F4 in model.
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CN201922165957.2U CN211377692U (en) | 2019-12-06 | 2019-12-06 | Power management circuit applied to intelligent terminal |
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CN201922165957.2U CN211377692U (en) | 2019-12-06 | 2019-12-06 | Power management circuit applied to intelligent terminal |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113709418A (en) * | 2021-08-26 | 2021-11-26 | 洛阳瑞光影视光电技术有限公司 | Monitor with photometry function |
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2019
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113709418A (en) * | 2021-08-26 | 2021-11-26 | 洛阳瑞光影视光电技术有限公司 | Monitor with photometry function |
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