CN211209577U - IO port protection module and terminal equipment - Google Patents

IO port protection module and terminal equipment Download PDF

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Publication number
CN211209577U
CN211209577U CN201921867155.XU CN201921867155U CN211209577U CN 211209577 U CN211209577 U CN 211209577U CN 201921867155 U CN201921867155 U CN 201921867155U CN 211209577 U CN211209577 U CN 211209577U
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resistor
pin
load
main chip
port
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丁永波
莫文林
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Shenzhen Weibu Information Co Ltd
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Shenzhen Weibu Information Co Ltd
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Abstract

The embodiment of the utility model discloses an IO port protection module and terminal equipment, the terminal equipment comprises a circuit board, the circuit board is provided with the IO port protection module, a main chip and a load; the IO port protection module is connected with the main chip and the load; the IO port protection module outputs a corresponding IO signal after carrying out current regulation and level conversion on the signal output by the main chip and transmits the IO signal to a load, and impedance matching is carried out according to the load. The impact of high voltage on the IO port of the main chip can be buffered or reduced through the IO port protection module, so that the main chip is protected from being damaged, and the quality of a product is improved.

Description

IO port protection module and terminal equipment
Technical Field
The utility model relates to the field of electronic technology, especially, relate to an IO mouth protection module and terminal equipment.
Background
With the development of cmos (complementary Metal Oxide semiconductor) integration processes, most of the I/O ports of the chips are provided with protection circuits, but the voltage endurance is relatively low (generally only 3.3V, 5V, etc.), which requires that protection measures must be added during application to reduce the impact of external voltage or static electricity on the chips. At present, a simpler mode is to adopt a level conversion circuit designed by a CMOS or a triode and additionally add an electrostatic protection circuit designed by a TVS tube. The circuit is suitable for the condition of low voltage or low static electricity, but the circuit can be out of work if the voltage with higher energy is used, and particularly, the main chip is easy to burn when the I/O port of a platform using an X86 chip is impacted by high voltage and static electricity.
SUMMERY OF THE UTILITY MODEL
To the technical problem, the embodiment of the utility model provides an IO mouth protection module and terminal equipment to solve the problem that current level shift circuit easily destroys the main chip under the condition of higher voltage.
The embodiment of the utility model provides an IO port protection module, which connects a main chip and a load and comprises a shaping conversion circuit and an output protection circuit; the shaping conversion circuit is connected with the output protection circuit and the main chip, and the output protection circuit is connected with a load;
the shaping conversion circuit is used for carrying out current regulation, waveform shaping and level conversion on the signals output by the main chip and then outputting corresponding IO signals to the output protection circuit, and the output protection circuit is used for carrying out impedance matching and transmitting the IO signals to a load.
Optionally, in the IO port protection module, the shaping conversion circuit includes a converter U1 first resistor;
the VCCA pin and the VCCB pin of the converter are both connected with a power supply end, the DIR pin and the GND pin of the converter are both grounded, the B pin of the converter is connected with the IO port of the main chip through a first resistor, and the A pin of the converter is connected with an output protection circuit.
Optionally, in the IO port protection module, the shaping conversion circuit further includes a first capacitor and a second capacitor;
one end of the first capacitor is connected with a VCCB pin and a power supply end of the converter, the other end of the first capacitor is grounded, one end of the second capacitor is connected with a VCCA pin and a power supply end of the converter, and the other end of the second capacitor is grounded.
Optionally, in the IO port protection module, the output protection circuit includes an interface, a first resistor, a second resistor, and a third resistor;
one end of the first resistor is connected with a pin A of the converter, the other end of the first resistor is connected with one end of the second resistor and one end of the third resistor, and the other end of the third resistor is connected with a pin 1 and a pin 2 of the interface; the other end of the second resistor and the pins 3 to 6 of the interface are grounded; pins 1 and 2 of the interface are connected to a load.
Optionally, in the IO port protection module, the output protection circuit further includes a first electrostatic protection tube and a second electrostatic protection tube;
the one end of second resistance and the one end of third resistance are connected to the one end of first static protection tube, and the 1 st foot of the other end of third resistance and interface is connected to the one end of second static protection tube, and the other end of first static protection tube and the other end of second static protection tube all ground connection.
A second aspect of the embodiment of the present invention provides a terminal device, including a circuit board, wherein the circuit board is provided with a main chip and a load, and the circuit board is further provided with an IO port protection module, and the IO port protection module is connected with the main chip and the load;
the IO port protection module outputs a corresponding IO signal after carrying out current regulation and level conversion on the signal output by the main chip and transmits the IO signal to a load, and impedance matching is carried out according to the load.
Optionally, in the terminal device, the model of the main chip is i 3-5005U.
Optionally, in the terminal device, the terminal device is an industrial personal computer, an all-in-one computer or a desktop computer.
In the technical solution provided by the embodiment of the present invention, the terminal device includes a circuit board, and the circuit board is provided with an IO port protection module, a main chip and a load; the IO port protection module is connected with the main chip and the load; the IO port protection module outputs a corresponding IO signal after carrying out current regulation and level conversion on the signal output by the main chip and transmits the IO signal to a load, and impedance matching is carried out according to the load. The impact of high voltage on the IO port of the main chip can be buffered or reduced through the IO port protection module 10, so that the main chip is protected from being damaged, and the quality of a product is improved.
Drawings
Fig. 1 is a block diagram of a terminal device according to an embodiment of the present invention.
Fig. 2 is a schematic circuit diagram of the IO port protection module in the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. The embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts, belong to the protection scope of the present invention.
Referring to fig. 1, a terminal device provided in an embodiment of the present invention includes a circuit board, where the circuit board is provided with an IO port protection module 10, a main chip 20 and a load; the IO port protection module 10 connects the main chip 20 and a load. The IO port protection module 10 performs current regulation and level conversion on the signal output by the main chip, outputs a corresponding IO signal and transmits the IO signal to a load, and performs impedance matching according to the load. The impact of high voltage on the IO port of the main chip can be buffered or reduced through the IO port protection module 10, so that the main chip is protected from being damaged, and the quality of a product is improved.
The circuit board is suitable for being arranged in all terminal devices needing IO port protection of a main chip, for example, an X86 platform (or other platforms) is matched with the main chip to realize IO port protection, and the terminal devices such as an industrial personal computer, an all-in-one computer and a small box (desktop computer) are related to the main chip (the model is i 3-5005U). The load may be a module that requires the main chip 20 to control driving and generates high voltage and static electricity, such as a screen backlight module. The load can be arranged on the circuit board and can also be arranged on other circuit boards.
Referring to fig. 2, the IO port protection module 10 includes a shaping conversion circuit 100 and an output protection circuit 200; the shaping conversion circuit 100 is connected with the output protection circuit 200 and the main chip 20, and the output protection circuit 200 is connected with a load. The shaping conversion circuit 100 performs current regulation, waveform shaping, and level conversion on the signal output by the main chip, and outputs a corresponding IO signal to the output protection circuit 200, which is configured to perform impedance matching and transmit the IO signal to a load.
With continued reference to fig. 2, the shaping converting circuit 100 includes a transformer U1 and a first resistor R1; the VCCA pin and the VCCB pin of the converter U1 are both connected with a power supply end (inputting 3.3V voltage + V3.3S), the DIR pin and the GND pin of the converter U1 are both grounded, the B pin of the converter U1 is connected with the IO port of the main chip through a first resistor R1, and the A pin of the converter U1 is connected with the output protection circuit 200.
The converter U1 is an and gate integrated circuit, such as a logic converter model SN74AVC1T45 DCKR. The IO port of the main chip can be selected correspondingly according to the type of the load, and if the load is a screen backlight module, the IO port of the main chip is an IO port for outputting a backlight driving signal. The magnitude of the input current can be adjusted by adjusting the resistance of the first resistor R1 to avoid the converter U1 from being burned out by excessive current of the signal output from the IO port, and the resistance is usually set according to the type of the main chip.
Taking the main chip (i3-5005U) outputting the PWM ac signal IO _ OUT as an example, after the current of the PWM ac signal IO _ OUT is adjusted by the first resistor R1, the PWM ac signal IO _ OUT is input into the converter U1 for waveform shaping and level conversion, and the corresponding IO signal is output to the output protection circuit 200. The converter U1 also has an isolation function, and can prevent the main chip (i3-5005U) from being damaged due to overvoltage or overcurrent.
In order to make the converter U1 operate more stably, the shaping conversion circuit 100 further includes a first capacitor C1 and a second capacitor C2; one end of the first capacitor C1 is connected with a VCCB pin and a power supply end of the converter U1, the other end of the first capacitor C1 is grounded, one end of the second capacitor C2 is connected with a VCCA pin and a power supply end of the converter U1, and the other end of the second capacitor C2 is grounded.
The voltage on the two pins is filtered by the first capacitor C1 (with the capacitance value of 0.1uF) and the second capacitor C2 (with the capacitance value of 10uF), so that the stability of level conversion can be ensured. In particular implementation, the first capacitor C1 is disposed near the VCCB pin of the inverter U1, and the second capacitor C2 is disposed near the VCCA pin of the inverter U1.
The output protection circuit 200 comprises an interface CN, a first resistor R1, a second resistor R2 and a third resistor R1; one end of the first resistor R1 is connected with a pin A of the converter U1, the other end of the first resistor R1 is connected with one end of the second resistor R2 and one end of the third resistor R3, and the other end of the third resistor R3 is connected with a pin 1 and a pin 2 of the interface CN; the other end of the second resistor R2 and the pins 3 to 6 of the interface CN are grounded; pins 1 and 2 of interface CN connect the load.
The first resistor R1, the second resistor R2 and the third resistor R1 form a T-shaped circuit, and the output impedance can be adjusted according to the input impedance of an external circuit board, so that different loads can be matched. By adjusting the voltage division ratio of R1, R2 and R3 (for example, the resistances of R1, R2 and R3 are respectively 0 omega, 1K omega and 10K omega), the impact effect of static electricity or voltage on the external circuit is reduced, and the whole circuit is protected from being damaged.
Preferably, the output protection circuit 200 further includes a first electrostatic protection tube D1 and a second electrostatic protection tube D2; one end of the first electrostatic protection tube D1 is connected with one end of the second resistor R2 and one end of the third resistor R3, one end of the second electrostatic protection tube D2 is connected with the other end of the third resistor R3 and the 1 st pin of the interface CN, and the other end of the first electrostatic protection tube D1 and the other end of the second electrostatic protection tube D2 are both grounded. The electrostatic protection is carried out through the electrostatic protection tube (or TVS tube), and different electrostatic protection grades can be achieved by selecting parameters corresponding to the electrostatic protection tube according to output requirements.
To sum up, the IO port protection module and the terminal device provided by the utility model adopt the converter integrated with the and gate to realize the level conversion and protection functions, and have good isolation, small volume and high reliability; meanwhile, the input current and the output current are adjustable, and the impedance matching of the three resistors and the buffering of the electrostatic protection tube are combined, so that higher voltage or static electricity is reduced to a range which can be borne by the main chip (most of static electricity is absorbed by the electrostatic protection tube firstly), the main chip is protected, the antistatic capability is stronger, the protection of static electricity generated by current discharge of the contact resistor during starting (the static electricity is easier to damage a CMOS circuit (including the main chip)) is improved, and the reliability of a product is improved. The whole circuit is simple and practical, the circuit is small in size, and the PCB design is convenient.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (8)

1. An IO port protection module is connected with a main chip and a load and is characterized by comprising a shaping conversion circuit and an output protection circuit; the shaping conversion circuit is connected with the output protection circuit and the main chip, and the output protection circuit is connected with a load;
the shaping conversion circuit is used for carrying out current regulation, waveform shaping and level conversion on the signals output by the main chip and then outputting corresponding IO signals to the output protection circuit, and the output protection circuit is used for carrying out impedance matching and transmitting the IO signals to a load.
2. The IO port protection module of claim 1, wherein the shaping conversion circuit comprises a converter U1 first resistor;
the VCCA pin and the VCCB pin of the converter are both connected with a power supply end, the DIR pin and the GND pin of the converter are both grounded, the B pin of the converter is connected with the IO port of the main chip through a first resistor, and the A pin of the converter is connected with an output protection circuit.
3. The IO port protection module according to claim 2, wherein the shaping conversion circuit further includes a first capacitor and a second capacitor;
one end of the first capacitor is connected with a VCCB pin and a power supply end of the converter, the other end of the first capacitor is grounded, one end of the second capacitor is connected with a VCCA pin and a power supply end of the converter, and the other end of the second capacitor is grounded.
4. The IO port protection module according to claim 2, wherein the output protection circuit includes an interface, a first resistor, a second resistor, and a third resistor;
one end of the first resistor is connected with a pin A of the converter, the other end of the first resistor is connected with one end of the second resistor and one end of the third resistor, and the other end of the third resistor is connected with a pin 1 and a pin 2 of the interface; the other end of the second resistor and the pins 3 to 6 of the interface are grounded; pins 1 and 2 of the interface are connected to a load.
5. The IO port protection module of claim 4, wherein the output protection circuit further comprises a first electrostatic protection tube and a second electrostatic protection tube;
the one end of second resistance and the one end of third resistance are connected to the one end of first static protection tube, and the 1 st foot of the other end of third resistance and interface is connected to the one end of second static protection tube, and the other end of first static protection tube and the other end of second static protection tube all ground connection.
6. A terminal device, comprising a circuit board, wherein the circuit board is provided with a main chip and a load, and is characterized in that an IO port protection module according to any one of claims 1 to 5 is further provided; the IO port protection module is connected with the main chip and the load;
the IO port protection module outputs a corresponding IO signal after carrying out current regulation and level conversion on the signal output by the main chip and transmits the IO signal to a load, and impedance matching is carried out according to the load.
7. The terminal device according to claim 6, wherein the master chip has a model number of i 3-5005U.
8. The terminal device of claim 7, wherein the terminal device is an industrial personal computer, an all-in-one computer or a desktop computer.
CN201921867155.XU 2019-11-01 2019-11-01 IO port protection module and terminal equipment Active CN211209577U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201921867155.XU CN211209577U (en) 2019-11-01 2019-11-01 IO port protection module and terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201921867155.XU CN211209577U (en) 2019-11-01 2019-11-01 IO port protection module and terminal equipment

Publications (1)

Publication Number Publication Date
CN211209577U true CN211209577U (en) 2020-08-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201921867155.XU Active CN211209577U (en) 2019-11-01 2019-11-01 IO port protection module and terminal equipment

Country Status (1)

Country Link
CN (1) CN211209577U (en)

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