Crystal oscillator circuit with oscillation amplitude limiting function
All as the field of technology
The utility model relates to a crystal oscillator technical field especially relates to a crystal oscillator circuit with oscillation amplitude limiting function.
All the above-mentioned background techniques
The crystal oscillator has good frequency accuracy and stability, small volume and low power consumption, is often used as a time frequency reference, and is widely applied to systems such as communication, radar, navigation and guidance. The crystal oscillator can provide high-precision clock signals for various electronic systems, and in some applications with higher requirements on the performance of the crystal oscillator clock, the too large amplitude of the crystal oscillator means that the crystal oscillator is overdriven, so that the radiation interference of the crystal oscillator is increased greatly, and the phase noise characteristic of the crystal oscillator clock is influenced. Therefore, controlling the oscillation amplitude of the crystal is a technical problem to be solved by those skilled in the art.
All kinds of practical novel contents
The utility model aims at providing a crystal oscillator circuit with oscillation amplitude limiting function controls crystal oscillator circuit output signal's amplitude, improves crystal oscillator circuit's reliability.
For the purpose of the utility model, the utility model discloses the technical scheme who takes as follows:
a crystal oscillator circuit with an oscillation amplitude limiting function comprises a current source and a crystal oscillator core circuit, wherein the crystal oscillator core circuit comprises an inverter, a feedback resistor, a crystal oscillator, a comparator, a buffer, a first capacitor and a second capacitor; the current output end of the current source is connected with the drive end of the inverter; the input end and the output end of the phase inverter are respectively connected with the two ends of the feedback resistor, the input end and the output end of the crystal oscillator, the two input ends of the comparator, one end of the first capacitor and one end of the second capacitor, and the grounding end is grounded; the output end of the comparator is connected with the input end of the buffer, and the output end of the buffer outputs a clock signal;
the crystal oscillator circuit with the oscillation amplitude limiting function also comprises an oscillation amplitude limiting control circuit; the oscillation amplitude limiting control circuit comprises a third capacitor, a fourth P-channel MOS tube and a transconductance operational amplifier; the source electrode of the fourth P-channel MOS tube, one end of the third capacitor and the inverting input end of the transconductance operational amplifier are connected with the driving end of the inverter; the grid electrode of the fourth P-channel MOS tube is connected with the other end of the third capacitor and the output end of the transconductance operational amplifier, and the drain electrode of the fourth P-channel MOS tube is grounded; the non-inverting input end of the transconductance operational amplifier receives a reference voltage.
In a specific embodiment, the current sources include a zeroth independent current source, a first independent current source, a second independent current source … …, an Nth independent current source, and second to Nth switches, where N is a positive integer and N is greater than or equal to 2; the input end of the zeroth independent current source receives the reference current, and the output end of the zeroth independent current source is connected with the input end of the first independent current source and the input end … … of the second independent current source; the output end of the first independent current source is connected with the driving end of the phase inverter, the output ends of the second independent current source to the Nth independent current source are respectively connected with one end of the second switch to one end of the Nth switch, and the other end of the second switch to the other end of the Nth switch are connected with the driving end of the phase inverter.
As a specific implementation, the zeroth independent current source includes a zeroth P-channel MOS transistor, a drain of the zeroth P-channel MOS transistor receives the reference current, and a gate of the zeroth P-channel MOS transistor is connected to the drain and to an input of the first independent current source and an input of the second independent current source … ….
As a specific implementation manner, the nth independent current source comprises an nth P-channel MOS transistor, a gate of the nth P-channel MOS transistor is connected with an output end of the zeroth independent current source, N is a positive integer, and N is greater than or equal to 2 and less than or equal to N; and the source electrode of the nth P-channel MOS tube is connected with the power supply, and the drain electrode of the nth P-channel MOS tube is connected with one end of the nth switch.
As a specific implementation manner, the inverter includes a first P-channel MOS transistor, a second P-channel MOS transistor, a third P-channel MOS transistor, a first N-channel MOS transistor, a second N-channel MOS transistor, and a third N-channel MOS transistor; the source electrode of the first P-channel MOS tube, the source electrode of the second P-channel MOS tube and the source electrode of the third P-channel MOS tube are connected with each other, and the connection point is the driving end of the phase inverter; the grid electrode of the first P-channel MOS tube is connected with the grid electrode of the first N-channel MOS tube, the connection point is the input end of the phase inverter, the grid electrode of the first P-channel MOS tube is connected with the grid electrode of the second P-channel MOS tube and the grid electrode of the third P-channel MOS tube, and the grid electrode of the first N-channel MOS tube is connected with the grid electrode of the second N-channel MOS tube and the grid electrode of the third N-channel MOS tube; the drain electrode of the third P-channel MOS tube is connected with the drain electrode of the third N-channel MOS tube, the connection point is the output end of the phase inverter, the drain electrode of the first P-channel MOS tube and the drain electrode of the second P-channel MOS tube MP2 are respectively connected with the drain electrode of the first N-channel MOS tube MN1 and the drain electrode of the second N-channel MOS tube MN2, and are connected with the drain electrode of the third P-channel MOS tube MP3 and the drain electrode of the third N-channel MOS tube MN 3; and the source electrode of the first N-channel MOS tube, the source electrode of the second N-channel MOS tube and the source electrode of the third N-channel MOS tube are connected, and the connection point is the grounding end of the phase inverter.
Furthermore, the crystal oscillator circuit with the oscillation amplitude limiting function further comprises a fourth N-channel MOS tube; and the grid electrode of the fourth N-channel MOS tube is connected with the driving end of the phase inverter, and the source electrode and the drain electrode are grounded.
The utility model discloses beneficial effect:
according to the above technical scheme, the utility model discloses an oscillation amplitude limiting control circuit clamps the amplitude limit to the crystal oscillator core circuit when oscillation amplitude is great, restricts crystal oscillator core circuit output signal's oscillation amplitude. Further, the utility model discloses a switch closure/disconnection, control output current gives the quantity of the independent current source of crystal oscillator core circuit for the electric current, and then the electric current size of crystal oscillator core circuit is given in the output of control current source.
Description of the drawings
In order to more clearly illustrate the embodiments of the present invention, the drawings used in the embodiments will be briefly described below. The drawings in the following description are only examples of the present invention, and other drawings can be obtained by those skilled in the art without inventive efforts.
Fig. 1 is a block diagram of a crystal oscillator circuit with an oscillation limiting function according to a first embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a crystal oscillator circuit with an oscillation limiting function according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a crystal oscillator circuit with an oscillation limiting function according to a second embodiment of the present invention.
(specific embodiments) in all cases
The present invention will be described in detail with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
As shown in FIG. 1, a crystal oscillator circuit with oscillation amplitude limiting function comprises a current source 100, a crystal oscillator core circuit 200, an oscillation amplitude limiting control circuit 300 and a fourth N-channel MOS transistor MN4, wherein the crystal oscillator core circuit comprises an inverter INV, a feedback resistor RF, a crystal oscillator XTA L, a comparator CMP, a buffer BUF, a first capacitor C1 and a second capacitor C2, the oscillation amplitude limiting control circuit comprises a third capacitor C3, a fourth P-channel MOS transistor MP4 and a transconductance operational amplifier OTA, a power supply end of the current source 100 is connected with a power supply VDD, and a current input end of the current source receives a reference current IREFThe current output end is connected with the driving end of the inverter INV, the source electrode of the fourth P-channel MOS tube MP4, the grid electrode of the fourth N-channel MOS tube MN4, one end of the third capacitor C3 and the inverting input end of the transconductance operational amplifier OTA, the input end of the inverter INV is connected with one end of the feedback resistor RF, the input end XI of the crystal oscillator XTA L, the non-inverting input end of the comparator CMP and one end of the first capacitor C1, the output end is connected with the other end of the feedback resistor RF, the output end XO of the crystal oscillator XTA L, the inverting input end of the comparator CMP and one end of the second capacitor C2, and the other end of the third capacitor C3 is connected with the otherThe grid electrode of the four-P channel MOS tube MP4 is connected with the output end of the transconductance operational amplifier OTA; the non-inverting input terminal of the operational transconductance amplifier OTA receives a reference voltage VREFThe output end of the comparator CMP is connected with the input end of the buffer BUF, the output end of the buffer BUF outputs a clock signal C L KO, the grounding end of the inverter INV, the grounding end of the transconductance operational amplifier OTA, the drain electrode of the fourth P-channel MOS tube MP4, the source electrode and the drain electrode of the fourth N-channel MOS tube MN4, the other end of the first capacitor C1 and the other end of the second capacitor C2 are grounded GND.
In this embodiment, the crystal oscillator XTA L, the first capacitor C1 and the second capacitor C2 form a resonant network, the center frequency of the resonant network is the natural oscillation frequency of the crystal oscillator XTA L, the inverter INV and the resonant network form a negative-resistance oscillator, and the current source 100 receives the reference current IREFThe crystal oscillator XTA L is used for reducing the risk of damage caused by over excitation, an input end XI and an output end XO of the crystal oscillator XTA L oscillate to output sine wave signals to a comparator CMP, the comparator CMP shapes the sine wave signals and outputs square wave signals to a buffer BUF, and the buffer BUF is used for improving the output load capacity of a crystal oscillator core circuit.
In this embodiment, the crystal oscillator circuit having the oscillation limiting function controls the clock signal output by the crystal oscillator core circuit to operate as follows:
when the crystal oscillator XTA L just starts oscillation, the oscillation amplitude of the signal output by the input terminal XI and the output terminal XO of the crystal oscillator XTA L is small, and the driving voltage V of the driving terminal of the inverter INVOSCIs also smaller (because the oscillation amplitude of the crystal oscillator XTA L is proportional to the driving energy of the driving circuit, namely the inverter INV, within a certain range), the driving voltage V isOSCLess than reference voltage VREF(ii) a The transconductance operational amplifier OTA outputs the over-amplified voltage to the gate of the fourth P-channel MOS transistor MP4, the over-amplified voltage is close to the power supply voltage VDD, the fourth P-channel MOS transistor MP4 is disconnected, and the driving voltage V at the driving end of the inverter INVOSCThe amplitude limiting control circuit 300 will not start the clamping amplitude limiting work when the oscillation amplitude of the signal output from the output terminal XO of the crystal oscillator XTA L is lowEnergy is saved;
along with the lapse of oscillation time, the oscillation amplitude of the output signals of the input end XI and the output end XO of the crystal oscillator XTA L is larger and larger, and the driving voltage V of the driving end of the inverter INVOSCAnd also gets larger and larger until the driving voltage VOSCGreater than a reference voltage VREFThe transconductance operational amplifier OTA outputs the over-amplified voltage to the gate of the fourth P-channel MOS transistor MP4, the over-amplified voltage is pulled down to the ground voltage GND, the fourth P-channel MOS transistor MP4 is turned on, and the driving voltage V at the driving end of the fourth P-channel MOS transistor MP4 is set to be VOSCThe current flowing into the crystal oscillator core circuit is reduced, the oscillation amplitude of the output signal of the crystal oscillator core circuit is reduced, and the oscillation amplitude of the output signal of the crystal oscillator core circuit is accurately controlled through continuous feedback control.
As shown in fig. 2, in the present embodiment, the current source 100 includes a zeroth independent current source 110, a first independent current source 111, a second independent current source 112, a third independent current source 113, a fourth independent current source 114, a second switch S2, a third switch S3, and a fourth switch S4; the input terminal of the zeroth independent current source 110 receives the reference current IREFThe output end of the current source is connected to the input end of the first independent current source 111, the input end of the second independent current source 112, the input end of the third independent current source 113 and the input end of the fourth independent current source 114, and outputs current to the first independent current source 111, the second independent current source 112, the third independent current source 113 and the fourth independent current source 114; an output end of the first independent current source 111 is connected to a driving end of the inverter INV, an output end of the second independent current source 112, an output end of the third independent current source 113, and an output end of the fourth independent current source 114 are connected to one end of the second switch S2, one end of the third switch S3, and one end of the fourth switch S4, respectively, the other end of the second switch S2, the other end of the third switch S3, and the other end of the fourth switch S4 are connected to a driving end of the inverter INV, and the second switch S2, the third switch S3, and the fourth switch S4 control the second independent current source 112, the third independent current source 112, and the fourth independent current source through on/off113 and a fourth independent current source 114 output current/stop outputting current to the crystal oscillator core circuit, thereby controlling the current magnitude output from the current source 100 to the crystal oscillator core circuit.
As shown in fig. 2, in the present embodiment, the zeroth independent current source 110 includes a zeroth P-channel MOS transistor MP _0, the first independent current source 111 includes a first P-channel MOS transistor MP _1, the second independent current source 111 includes a second P-channel MOS transistor MP _2, the third independent current source 113 includes a third P-channel MOS transistor MP _3, and the fourth independent current source 114 includes a fourth P-channel MOS transistor MP _ 4; the drain electrode of the zeroth P-channel MOS tube MP _0 receives the reference current IREFThe grid electrode is connected with the drain electrode and is connected with the grid electrode of a first P-channel MOS tube MP _1, the grid electrode of a second P-channel MOS tube MP _2, the grid electrode of a third P-channel MOS tube MP _3 and the grid electrode of a fourth P-channel MOS tube MP _ 4; the source electrode of the zeroth P-channel MOS tube MP _0, the source electrode of the first P-channel MOS tube MP _1, the source electrode of the second P-channel MOS tube MP _2, the source electrode of the third P-channel MOS tube MP _3 and the source electrode of the fourth P-channel MOS tube MP _4 are connected with a power supply VDD; the drain electrode of the first P-channel MOS tube MP _1 is connected with the driving end of the inverter INV; the drain of the second P-channel MOS transistor MP _2, the drain of the third P-channel MOS transistor MP _3, and the drain of the fourth P-channel MOS transistor MP _4 are respectively connected to one end of the second switch S2, one end of the third switch S3, and one end of the fourth switch S4, and the other end of the second switch S2, the other end of the third switch S3, and the other end of the fourth switch S4 are connected to the driving terminal of the inverter INV.
As shown in fig. 2, in the present embodiment, the inverter INV includes a first P-channel MOS transistor MP1, a second P-channel MOS transistor MP1, a third P-channel MOS transistor MP1, a first N-channel MOS transistor MN1, a second N-channel MOS transistor MN1 and a third N-channel MOS transistor MN1, a source of the first P-channel MOS transistor MP1, a source of the second P-channel MOS transistor MP1 and a source of the third P-channel MOS transistor MP1 are connected to each other, the connection point is a driving end of the inverter INV, and is connected to a current output end of the current source 100, a source of the fourth P-channel MOS transistor MP1, a gate of the fourth N-channel MOS transistor MN1, an end of the third capacitor C1 and an inverting input end of the OTA operational amplifier, a gate of the first P-channel MOS transistor MP1 and a gate of the first N-channel MOS transistor MP1, a connection point is an input end of the inverter INV, and a drain of the feedback resistor, a drain of the crystal oscillator a, a drain of the first N-channel MOS transistor MN1, a drain of the first N-channel MOS transistor MP1 and a drain of the third N-channel MOS transistor MP1 are connected to a drain of the first N-channel MOS transistor MN1, a drain of the first N-channel MOS transistor MP1 and a drain of the first N-channel MOS transistor MP1 are connected to a drain of the first N-channel MOS transistor MP1, a drain of the first N-channel MOS transistor MN1, a drain of the same-channel MOS transistor MP1, a drain of the same-N-drain of the same-channel MOS transistor MP-drain of the same-.
In this implementation, the highest value of the oscillation amplitude of the crystal oscillator core circuit output signal depends on the reference voltage VREFThe highest amplitude of the output XO voltage of the crystal oscillator XTA L is approximately VREF-0.1V, wherein 0.1V is approximately the turn-on voltage V of the first P-channel MOS transistor MP1, the second P-channel MOS transistor MP1 and the third P-channel MOS transistor MP1DS。
In the present embodiment, the reference voltage VREFIs to generate a voltage signal by a reference voltage generator, a reference current IREFA current signal is generated by a reference current generator.
Example two
The difference between this embodiment and the first embodiment is: the current source 100 includes a zeroth independent current source 110, a first independent current source 111, a second independent current source 112 … …, an Nth independent current source 11N, a second switch S2 to an Nth switch SN, where N is a positive integer and N is greater than or equal to 2; the input terminal of the zeroth independent current source 110 receives the reference current IREFThe output terminal of the first independent current source 111 is connected to the input terminal of the first independent current source 111 and the input terminal … … of the second independent current source 112, and the nth independent current source 11N outputs current to the first independent current source 111 and the second independent current sourceCurrent source 112 … … is independent of current source 11N; the output end of the first independent current source 111 is connected to the driving end of the inverter INV, the output ends of the second to nth independent current sources 112 to 11N are connected to one ends of the second to nth switches S2 to SN, the other ends of the second to nth switches S2 to SN are connected to the driving end of the inverter INV, and the second to nth switches S2 to SN control the second to nth independent current sources 112 to 11N to output/stop outputting current to the crystal oscillator core circuit by closing/opening, thereby controlling the magnitude of current output from the current source 100 to the crystal oscillator core circuit.
It is only above the preferred embodiment of the utility model, the utility model discloses a scope of protection does not only confine above-mentioned embodiment, the all belongings to the utility model discloses a technical scheme under the thinking all belongs to the utility model discloses a scope of protection. It should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.