CN210986115U

CN210986115U - High-compatibility isoSPI communication gateway

Info

Publication number: CN210986115U
Application number: CN201922210606.9U
Authority: CN
Inventors: 汤平; 高卫强; 熊刚; 孔腾; 池圣松; 邓秉杰
Original assignee: Fujian Nebula Electronics Co Ltd
Current assignee: Fujian Nebula Electronics Co Ltd
Priority date: 2019-12-11
Filing date: 2019-12-11
Publication date: 2020-07-10
Anticipated expiration: 2029-12-11

Abstract

The utility model provides a high-compatibility isoSPI communication gateway in the technical field of automobile communication, which comprises an Ethernet interface, an MCU, a first isoSPI chip, a second isoSPI chip and a third isoSPI chip; the Ethernet interface, the first isoSPI chip, the second isoSPI chip and the third isoSPI chip are respectively connected with the MCU. The utility model has the advantages that: the compatibility, the use portability, the communication stability and the transmission rate of the isoSPI communication gateway are greatly improved.

Description

High-compatibility isoSPI communication gateway

Technical Field

The utility model relates to an automotive communication technical field indicates a high compatible isoSPI communication gateway very much.

Background

With the implementation of new energy policies, more and more automobile manufacturers begin to develop electric automobiles, and the electric automobiles need a battery management chip (BMS) to manage lithium batteries of the whole automobiles, so that a demand for testing the battery management chip is generated.

The isoSPI is a novel high-speed isolation communication protocol, has the advantages of long communication distance, high communication speed, stable communication and the like, and is widely applied to communication between a computer and a battery management chip. However, the computer and the battery management chip cannot directly communicate through the isoSPI communication protocol, and the isoSPI communication protocol of the battery management chip needs to be converted into the SPI communication protocol by the isoSPI chip, and then the computer and the battery management chip communicate through the MCU.

However, the isoSPI chip and the MCU are designed in a separated mode in the prior art, so that the connection is complicated, and the communication stability is poor; traditionally, a USB serial port is adopted as a communication interface with a computer, and compared with the transmission rate of at least 1Mbps of isoSPI, the transmission rate of the serial port is slower; because there are battery management chips of multiple models, and the pin of different battery management chips is different for the battery management chip of different models need to be changed different isoSPI chips, compatibility is low.

Therefore, how to provide a highly compatible isoSPI communication gateway to improve the compatibility, the use portability, the communication stability and the transmission rate of the isoSPI communication gateway becomes a problem to be solved urgently.

Disclosure of Invention

The to-be-solved technical problem of the utility model lies in providing a high compatible isoSPI communication gateway, realizes promoting isoSPI communication gateway's compatibility, use portability, communication stability and transmission rate.

The utility model discloses a realize like this: a high-compatibility isoSPI communication gateway comprises an Ethernet interface, an MCU, a first isoSPI chip, a second isoSPI chip and a third isoSPI chip;

the Ethernet interface, the first isoSPI chip, the second isoSPI chip and the third isoSPI chip are respectively connected with the MCU.

Furthermore, the MCU is provided with a first SPI interface, a second SPI interface and a third SPI interface;

the first SPI interface is connected with a first isoSPI chip; the second SPI interface is connected with a second isoSPI chip; and the third SPI interface is connected with a third isoSPI chip.

Further, the ethernet interface is an RJ45 interface.

Further, the first, second and third isoSPI chips are of one of MC33664, L TC6820 and MAX14850, respectively.

The utility model has the advantages that:

1. through setting up first isoSPI chip, second isoSPI chip and third isoSPI chip make isoSPI communication gateway can be compatible the battery management chip of more models, very big promotion isoSPI communication gateway's compatibility, and avoided carrying a plurality of communication gateways simultaneously, very big promotion use the portability.

2. Through with MCU integration is in isoSPI communication gateway, has avoided the loaded down with trivial details of wiring in addition, and very big promotion isoSPI communication gateway's communication stability.

3. Through setting up ethernet interface communicates with the computer, for adopt the USB serial ports as the communication interface with the computer in the tradition, very big promotion isoSPI communication gateway's transmission rate, and forward the ethernet of isoSPI communication protocol's data conversion to seven layers of communication models to the computer for the data that the computer was received possess seven layers of models of complete OSI, and the compatibility is good can easily debug and evaluate the battery management chip.

Drawings

The invention will be further described with reference to the following examples with reference to the accompanying drawings.

Fig. 1 is the utility model discloses a high compatible isoSPI communication gateway's circuit schematic block diagram.

Fig. 2 is a schematic circuit block diagram of the MCU of the present invention.

Fig. 3 is a schematic view of the working principle of the present invention.

Description of the labeling:

100-a high-compatibility isoSPI communication gateway, 1-Ethernet interface, 2-MCU, 3-first isoSPI chip, 4-second isoSPI chip, 5-third isoSPI chip, 6-computer, 7-battery management chip, 21-first SPI interface, 22-second SPI interface, 23-third SPI interface.

Detailed Description

Referring to fig. 1 to fig. 3, the preferred embodiment of a highly compatible isosip communication gateway 100 of the present invention includes an ethernet interface 1, an MCU2, a first isosip chip 3, a second isosip chip 4, and a third isosip chip 5; the Ethernet interface 1 is used for communicating with a computer 6; the MCU2 is used to control the first, second and third isoSPI chips 3, 4 and 5 to convert the data of the isoSPI protocol with the data of the SPI protocol, and further to realize the communication between the computer 6 and the battery management chip 7, and in specific implementation, the MCU capable of realizing this function is selected from the prior art, and is not limited to any model, and the control program is well known to those skilled in the art, which is available to those skilled in the art without creative work; the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 are all used for converting data of an isoSPI protocol and data of an SPI protocol;

the Ethernet interface 1, the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 are respectively connected with the MCU 2. The Ethernet interface 1 is connected with a computer 6, and the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 are respectively connected with a battery management chip 7.

The MCU2 is provided with a first SPI interface 21, a second SPI interface 22 and a third SPI interface 23; the first SPI interface 21, the second SPI interface 22 and the third SPI interface 23 are independently controlled by using independent state machines, the communication state is read circularly and automatically, and the bottom layer communication state is judged automatically according to the control methods of different chips; the loop read is because the MCU2 is single-threaded, and can only process one state machine at a time;

the first SPI interface 21 is connected with a first isoSPI chip 3; the second SPI interface 22 is connected to the second isoSPI chip 4; and the third SPI interface 23 is connected with the third isoSPI chip 5.

Ethernet interface 1 is the RJ45 interface, through setting ethernet interface 1 communicates with computer 6, for adopt the USB serial ports as with computer 6's communication interface in the tradition, very big promotion isoSPI communication gateway 100's transmission rate, and transmit computer 6 with isoSPI communication protocol's data conversion to seven layers communication model's ethernet for the data that computer 6 received possess seven layers of models of complete OSI, it is compatible good, can easily debug and evaluate battery management chip 7.

The types of the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 are one of MC33664 under FreeSchale series, L TC6820 under ADI series and MAX14850 of Meixin, respectively, FreeSchale, ADI and Meixin are main manufacturers on the market, the three chips are compatible with most of battery management chips 7 on the market, and the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 can be switched to be used at will or used at the same time.

The utility model discloses the theory of operation:

the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 are respectively connected with three battery management chips 7 to be tested; the first isoSPI chip 3, the second isoSPI chip 4 and the third isoSPI chip 5 respectively convert data which are required to be uploaded to the computer 6 by each battery management chip 7 to be tested into an SPI communication protocol from an isoSPI communication protocol; MCU2 reads first isoSPI chip 3, second isoSPI chip 4 and third isoSPI chip 5 through first SPI interface 21, second SPI interface 22 and third SPI interface 23 circulation and converts the data into SPI communication protocol to through RJ45 interface 1 sends and carries out the analysis for computer 6.

To sum up, the utility model has the advantages that:

Although specific embodiments of the present invention have been described, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the claims appended hereto.

Claims

1. A high-compatibility isoSPI communication gateway is characterized in that: the system comprises an Ethernet interface, an MCU, a first isoSPI chip, a second isoSPI chip and a third isoSPI chip;

2. A high compatibility isoSPI communications gateway as recited in claim 1, wherein: the MCU is provided with a first SPI interface, a second SPI interface and a third SPI interface;

3. A high compatibility isoSPI communications gateway as recited in claim 1, wherein: the Ethernet interface is an RJ45 interface.

4. The ISoSPI communication gateway of claim 1, wherein said first, second and third ISoSPI chips are of one of MC33664, L TC6820 and MAX14850, respectively.