CN210958607U

CN210958607U - Debugging device of display equipment and display equipment

Info

Publication number: CN210958607U
Application number: CN202020161240.0U
Authority: CN
Inventors: 陈伟东
Original assignee: Guangzhou Shiyuan Electronics Thecnology Co Ltd; Guangzhou Shirui Electronics Co Ltd
Current assignee: Guangzhou Shiyuan Electronics Thecnology Co Ltd; Guangzhou Shirui Electronics Co Ltd
Priority date: 2020-02-11
Filing date: 2020-02-11
Publication date: 2020-07-07
Anticipated expiration: 2030-02-11

Abstract

The utility model provides a display device's debugging device and display device, this display device includes: the debugging device comprises a first system and a second system, and comprises: the first HDMI interface, control circuit. The power pin of the first HDMI interface, the first pin of the first HDMI interface, the second pin of the first HDMI interface, the debugging interface of the first system and the debugging interface of the second system are all connected with the control circuit; when the power pin of the first HDMI interface is at a low level and the first pin is at a low level, the control circuit communicates the second pin of the first HDMI interface with the debugging interface of the first system; when the power pin of the first HDMI interface is at a low level and the first pin is at a high level, the control circuit communicates the second pin of the first HDMI interface with the debugging interface of the second system. The debugging device can realize the debugging of the dual system by utilizing the HDMI interface.

Description

Debugging device of display equipment and display equipment

Technical Field

The utility model relates to a debugging technique especially relates to a display device's debugging device and display device.

Background

The smart television is a television product which is based on an Internet (Internet) application technology, is provided with an open operating system and a chip and is provided with an open application platform. While enjoying common television content, users can install and uninstall various application software by themselves to meet diversified and personalized requirements. Smart televisions have become a trending trend in television development at present.

Because the smart television needs to complete the decoding display function of the traditional television, and needs to run an operating system and numerous applications, some smart televisions adopt a dual-system setting, wherein one system is used for realizing the function of the traditional television, and the other system is used for realizing other functions of the smart television. For example, taking an intelligent television with the function of internet of things as an example, the intelligent television may be provided with two systems, wherein one System is a System on Chip (SoC) System of the television to implement the function of a traditional television, and the other System is an internet of things controller System to implement the function of internet of things.

At present, different debugging tools are mainly externally connected through different interfaces on the smart television, so that debugging of each system on the smart television is realized. However, when the number of the interfaces that can be externally connected with the debugging tool on the smart television is less than 2, that is, the number of the systems on the smart television is less, the debugging of the system of the smart television cannot be realized.

SUMMERY OF THE UTILITY MODEL

The utility model provides a display device's debugging device and display device for when solving the interface that can external debug on the current smart TV and being less than the system quantity on the smart TV, the technical problem of the debugging of the system of unable realization smart TV.

In a first aspect, the present invention provides a debugging device for a display device, the display device comprising: the device comprises a first system and a second system, and comprises: the first HDMI interface and the control circuit;

the power pin of the first HDMI interface, the first pin of the first HDMI interface, the second pin of the first HDMI interface, the debugging interface of the first system and the debugging interface of the second system are all connected with the control circuit;

when the power pin of the first HDMI interface is at a low level and the first pin is at a low level, the control circuit communicates the second pin of the first HDMI interface with the debugging interface of the first system;

when the power pin of the first HDMI interface is at a low level and the first pin is at a high level, the control circuit communicates the second pin of the first HDMI interface with the debugging interface of the second system.

Optionally, the display device further includes: a second HDMI interface and a third HDMI interface;

the second HDMI interface and the third HDMI interface are both connected with the control circuit;

when the power pin of the first HDMI interface is at a high level, the control circuit communicates the first pin of the first HDMI interface with the second HDMI interface, and communicates the second pin of the first HDMI interface with the third HDMI interface.

Optionally, the second pin includes: the control circuit comprises a change-over switch, a first switch, a second switch, a third switch and a fourth switch; the changeover switch includes: the first logic switch and the second logic switch;

a power pin of the first HDMI interface is respectively connected with a power supply end of the change-over switch, a first end of the first switch, a second end of the first switch, a first end of the second switch and a second end of the second switch;

an input pin of a second pin of the first HDMI interface is connected with an input pin of the first logic switch, a first output pin of the first logic switch is connected with an input pin of the third HDMI interface, a second output pin of the first logic switch is connected with an input pin of a debugging interface of the first system, and a third output pin of the first logic switch is connected with an input pin of a debugging interface of the second system;

an output pin of a second pin of the first HDMI interface is connected with an output pin of the second logical switch, a first input pin of the second logical switch is connected with an input pin of the third HDMI interface, a second input pin of the second logical switch is connected with an input pin of a debugging interface of the first system, and a third input pin of the second logical switch is connected with an input pin of a debugging interface of the second system;

a first pin of the first HDMI interface is connected to a first end of the third switch, a controlled end of the first logic switch is connected to a second end of the first switch and a second end of the third switch, and a third end of the first switch and a third end of the third switch are both grounded;

the second end of the third switch is connected with the first end of the fourth switch, the controlled end of the second logic switch is respectively connected with the second end of the second switch and the second end of the fourth switch, and the third end of the second switch and the third end of the fourth switch are grounded.

Optionally, the first switch, the second switch, the third switch and the fourth switch are all triodes;

the first end of the first switch, the first end of the second switch, the first end of the third switch and the first end of the fourth switch all adopt bases of triodes, the second end of the first switch, the second end of the second switch, the second end of the third switch and the second end of the fourth switch all adopt collectors of the triodes, and the third end of the first switch, the third end of the second switch, the third end of the third switch and the third end of the fourth switch all adopt emitters of the triodes.

Optionally, the control circuit further includes a fifth switch and a sixth switch;

the first pin of the first HDMI interface is connected with the first end of the fifth switch, the power pin of the first HDMI interface is connected with the second end of the fifth switch and the second end of the sixth switch, the third end of the fifth switch is connected with the third end of the sixth switch, and the first end of the sixth switch is connected with the second HDMI interface.

Optionally, the fifth switch and the sixth switch are both metal oxide semiconductor field effect transistors;

the first end of the fifth switch and the first end of the sixth switch both adopt the source electrodes of metal oxide semiconductor field effect transistors, the second end of the fifth switch and the second end of the sixth switch both adopt the grid electrodes of metal oxide semiconductor field effect transistors, and the third end of the fifth switch and the third end of the sixth switch both adopt the drain electrodes of metal oxide semiconductor field effect transistors.

Optionally, the first pin is an ARC pin of an audio return channel of the first HDMI interface, and the second HDMI interface is an HDMI ARC interface.

Optionally, the second pin is a display data channel DDC pin of the first HDMI interface, and the third HDMI interface is an HDMI DDC interface.

Optionally, the first system is a SoC system on a chip, and the second system is an internet-of-things controller system.

In a second aspect, the present invention further provides a display device, which includes the debugging apparatus as described in any one of the above first aspects.

The utility model provides a display device's debugging device and display device has following technological effect:

1. at present, most of systems arranged on display equipment can debug a single system through an HDMI (high-definition multimedia interface), so that the debugging device can debug a double system through the HDMI, and the universality and compatibility of a debugging tool can be improved.

2. The debugging device takes the voltage signals input to the control circuit from the power pin and the first pin of the first HDMI as the control signals, and the voltage signals input to the control circuit from the power pin and the first pin of the first HDMI are related to the external source connected to the first HDMI and cannot be influenced by the stability of each system in the display equipment, so that even if one system does not normally run, the debugging of the other system cannot be influenced, and the reliability of the debugging is ensured.

Drawings

In order to more clearly illustrate the technical solutions of the present invention or the prior art, the following briefly introduces the drawings needed to be used in the description of the embodiments or the prior art, and obviously, the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 is a first schematic structural diagram of a conventional smart television;

fig. 2 is a schematic structural diagram ii of a conventional smart television;

fig. 3 is a schematic structural diagram of a debugging apparatus of a display device according to the present invention;

fig. 4 is a first control schematic diagram of a debugging apparatus of a display device according to the present invention;

fig. 5 is a second control schematic diagram of a debugging apparatus of a display device according to the present invention;

fig. 6 is a third control schematic diagram of a debugging apparatus of a display device according to the present invention;

fig. 7 is a partial schematic view of a control circuit according to the present invention;

fig. 8 is a partial schematic diagram of a control circuit according to the present invention;

fig. 9 is a partial schematic diagram of a control circuit according to the present invention;

fig. 10 is a partial schematic diagram of a control circuit according to the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the accompanying drawings in the embodiments of the present invention are combined below to clearly and completely describe the technical solutions in the embodiments of the present invention, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

At present, the smart television mainly has the following interfaces:

1. a High Definition Multimedia Interface (HDMI) Interface.

2. Video Graphics Array (VGA) interface.

3. A Universal Serial BUS (USB) interface.

4. An RS232 interface.

5. Network port (for network connection).

6. Audio interface (such as earphone socket, sound socket, microphone socket, etc.)

The USB interface is used for transmitting high-speed signals, and the function of each pin of the USB interface is defined and is not suitable for an external debugging tool. And the RS232 interface is mainly used for receiving the centralized control signal and is not suitable for an external debugging tool. The network port can be used only after the system runs, and the protocol of the interface only supports receiving high-level debug data (debug), cannot receive low-level debug, and is not suitable for an external debugging tool. The audio interface is sensitive to interference of digital signals, and if debugging signals are transmitted through the audio interface, the audio signals are easily interfered, and the audio quality is affected.

Therefore, currently, the system on the smart television is mainly debugged through the HDMI interface or the VGA interface.

Fig. 1 is a first structural schematic diagram of a conventional smart television. As shown in fig. 1, taking the smart television provided with the system 1 and the system 2 as an example, it is assumed that the smart television includes two interfaces, i.e., interface 1 and interface 2, which can be used for externally connecting a debugging tool. The interface 1 is an HDMI interface, and the interface 2 is a VGA interface, or the interface 1 is a VGA interface, and the interface 2 is an HDMI interface.

The debugging interface of the system 1 of the intelligent television is connected with the interface 1 of the intelligent television, and the debugging interface of the system 2 of the intelligent television is connected with the interface 2 of the intelligent television. Thus, when the system 1 needs to be debugged, the interface 1 can be accessed to a debugging tool corresponding to the system 1, so as to debug the system 1. When the system 2 needs to be debugged, the interface 2 can be accessed to a debugging tool corresponding to the system 2, so as to debug the system 2.

However, when the number of interfaces that can be externally connected with a debugging tool on the smart tv is less than 2 (for example, the smart tv has only HDMI interfaces), that is, less than the number of systems on the smart tv, the debugging of the system of the smart tv cannot be realized.

In view of this problem, the prior art provides a scheme for implementing dual system debugging by multiplexing the same interface. Fig. 2 is a schematic structural diagram of a conventional smart television. As shown in fig. 2, taking the smart tv provided with the system 1 and the system 2 as an example, it is assumed that the smart tv includes an interface a that can be used for externally connecting a debugging tool. The interface a may be an HDMI interface or a VGA interface.

The debugging interface of the system 1 of the intelligent television is connected with the interface A of the intelligent television, and the debugging interface of the system 2 of the intelligent television is connected with the interface A of the intelligent television through the debugging interface of the system 1. Taking interface a as an HDMI interface as an example, the debugging interface of system 1 of the smart television is connected to an Audio Return Channel (ARC) pin of the HDMI interface of the smart television, and the debugging interface of system 2 of the smart television is connected to the ARC pin of the HDMI interface of the smart television through the debugging interface of system 1.

Thus, when the system 1 needs to be debugged, the interface a can access a debugging tool corresponding to the system 1, so as to debug the system 1. When the system 2 needs to be debugged, the interface a is accessed to a debugging tool corresponding to the system 2, and the system 1 forwards debugging data of the system 2, so that debugging of the system 2 is realized.

Although the debugging data of the other system is forwarded by one system, the debugging of the dual system can be realized when an interface for externally connecting a debugging tool is provided. However, this method has the following problems:

1. the above-described connection would cause part of the functionality of interface a to be lost. Taking the interface as an HDMI interface as an example, the above connection method may cause the original ARC function of the HDMI interface to be lost.

2. The debugging of system 2 needs to rely on the debug forwarding functionality of system 1, which results in a narrow range of applications since not all systems have this functionality.

3. If some debugging operations of protocols which are not developed exist in the system 2, namely, the debugging data of the system 2 cannot be analyzed and forwarded by the system 1, the debugging of the system 2 cannot be realized, and the debugging reliability is poor.

4. If the system 1 fails, the system 2 cannot be debugged, resulting in poor debugging reliability.

In view of this, the utility model provides a display device's debugging device can utilize this HDMI interface to realize the debugging of dual system, and simultaneously, the debugging of arbitrary system also does not receive the influence of other systems, has improved the debugging reliability.

It should be understood that the utility model provides a debugging device can be applicable to arbitrary display device that has the HDMI interface, and has dual system, for example smart television, computer etc. The dual system is referred to herein as a dual hardware system, each having its own independent control device.

The technical solution of the present invention is explained in detail by some embodiments. The following several embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.

Fig. 3 is a schematic structural diagram of a debugging apparatus of a display device according to the present invention. The display device includes: the system comprises a first system and a second system. For example, taking the display device as an intelligent television as an example, the first system may be used to implement the functions of a traditional television, and the second system may be used to implement other functions of an intelligent television. For example, in the case of a smart television with an internet of things function, the first system may be an SoC system of the television to implement the function of a conventional television, and the second system is an internet of things controller system to implement the internet of things function.

As shown in fig. 3, the debugging apparatus includes: the first HDMI interface, control circuit. The first HDMI interface is used for connecting an HDMI signal source, or a debugging tool of a first system, or a debugging tool of a second system.

The power pin (for example, a 5V power pin) of the first HDMI interface, the first pin of the first HDMI interface, the second pin of the first HDMI interface, the debugging interface of the first system, and the debugging interface of the second system are all connected to the control circuit. The voltage signals of the power pin and the first pin of the first HDMI interface are control signals of the control circuit, and the second pin of the first HDMI interface is used for debugging the first system and the second system. The working principle of the debugging device is as follows:

when the power pin of the first HDMI interface is at a low level (e.g., 0V), it indicates that a debug tool is connected to the first HDMI interface, or that no device is connected to the first HDMI interface. At this time, the control circuit may further determine a level of the first pin of the first HDMI interface.

Fig. 4 is a control schematic diagram of a debugging apparatus of a display device, which is shown in fig. 4, if the power pin of the first HDMI interface is at a low level and the level of the first pin is at a low level (e.g., 0V), it is described that the device connected to the first HDMI interface is a debugging tool corresponding to the first system, and then the control circuit enters a debugging mode of the first system. The control circuit communicates the second pin of the first HDMI interface with the debug interface of the first system, so that the debug tool corresponding to the first system debugs the first system through the first HDMI interface.

It should be understood that, in the case where the power pin of the first HDMI interface is at a low level and the first pin is at a low level, there may be a case where no device is connected to the first HDMI interface, and at this time, the control circuit also defaults to enter the debug mode of the first system.

Fig. 5 is a control schematic diagram two of a debugging device of display device, as shown in fig. 5, if the power pin of first HDMI interface is the low level, and the level of first pin is the high level (for example, 3.3V), the device that explains to insert first HDMI interface is the debugging instrument that the second system corresponds, then control circuit communicates the second pin of first HDMI interface and the debugging interface of second system to make the debugging instrument that the second system corresponds debug the second system through first HDMI interface.

It should be understood that the high level to which this application refers is a high voltage as opposed to a low level, which may be a level that enables the pin or a level that puts the pin in operation. The low level referred to in this application may be a level that disables the pin or a level that leaves the pin inactive. For example, the low level can be set to a value ranging from 0 to 0.25V, and the high level can be set to a value ranging from 3.3 to 5V.

As a possible implementation manner, the first pin of the first HDMI interface may be, for example, an Audio Return Channel (ARC) pin, a Consumer Electronics Control (CEC) pin, a ground pin, or the like.

As described above, the second pin of the first HDMI interface is used to implement debugging of the first system and the second system. It should be understood that, during the debugging process of the system, Data interaction between the debugging tool and the system needs to be performed multiple times, and therefore, the second pin of the first HDMI interface may include an input pin and an output pin, for example, a display Data channel DDC pin of the first HDMI interface, i.e., a Serial Data (SDA) pin and a Serial Clock (SCL) pin.

For example, the display device is a television, the first system is an SOC system, and the second system is an internet of things system, where the first pin of the first HDMI interface is an ARC pin and the second pin is a DDC pin. Specifically, when the debugging device is used, if a user needs to debug the system, the debugging tool is accessed to the first HDMI interface, the SOC system can be debugged when the ARC pin of the first HDMI interface is adjusted to a low level, and the controller system of the internet of things can be debugged when the ARC pin of the first HDMI interface is adjusted to a high level.

The double-system debugging is realized through the debugging device, and the following effects are achieved:

2. The debugging device takes the voltage signal input to the control circuit from the power pin and the first pin of the first HDMI as the control signal, and the voltage signal input to the control circuit from the power pin and the first pin of the first HDMI is related to the external source connected to the first HDMI and cannot be influenced by the stability of each system in the display device, so that even if one system does not normally operate, the debugging of the other system cannot be influenced.

Fig. 6 is a third control schematic diagram of a debugging apparatus of a display device according to the present invention, as shown in fig. 6, optionally, in some embodiments, the display device further includes: the second HDMI interface and the third HDMI interface, wherein, second HDMI interface, third HDMI interface all are connected with control circuit.

It should be understood that the second HDMI interface and the third HDMI interface may be interfaces of an HDMI system inside the display device, for implementing HDMI functions. For example, when the first pin of the first HDMI interface is an ARC pin, the second HDMI interface may be an HDMI ARC interface; when the first pin of the first HDMI interface is a CEC pin, the second HDMI interface may be an HDMI CEC interface; when the first pin of the first HDMI interface is a ground pin, the second HDMI interface may be replaced with a ground line of the HDMI system of the display device. When the second pin of the first HDMI interface is a DDC pin, the third HDMI interface may be an HDMI DDC interface.

In this embodiment, when the power pin of the first HDMI interface is at a high level (e.g., 5V), it is described that the HDMI signal source is connected to the first HDMI interface. Such as a DVD, a computer, etc. At this time, the control circuit may communicate the first pin of the first HDMI interface with the second HDMI interface and communicate the second pin of the first HDMI interface with the third HDMI interface, thereby implementing an HDMI input function.

Continuing with the example that the aforementioned display device is a television, the first system is an SOC system, and the second system is an internet of things system, in this implementation manner, if the user uses the first HDMI interface normally, and accesses the HDMI signal source to the first HDMI interface, the control circuit uses the first HDMI interface as the HDMI input interface of the display device, communicates the ARC pin of the first HDMI interface with the HDMI ARC interface of the display device, and communicates the DDC pin of the first HDMI interface with the HDMI DDC interface, so as to receive and display the HDMI signal normally.

By the mode, the debugging device can be ensured not to cause the loss of the functions of the first pin and the second pin of the first HDMI interface when the dual-system debugging is realized, and the original functions of the first HDMI interface are guaranteed.

In the above embodiment, the utility model relates to a control circuit can be for arbitrary can be based on the voltage signal's of the pin of first HDMI interface change, the circuit that switches on first HDMI pin and different interfaces. The control circuit is exemplified by taking the first pin of the first HDMI interface as an ARC pin and the second pin as a DDC pin. The SCL pin is an input pin of the second pin, and the SDA pin is an output pin of the second pin.

Fig. 7 is the utility model provides a pair of control circuit's local schematic diagram one, fig. 8 is the utility model provides a pair of control circuit's local schematic diagram two, fig. 9 is the utility model provides a pair of control circuit's local schematic diagram three, fig. 10 is the utility model provides a pair of control circuit's local schematic diagram four. Referring to fig. 7 to 10, the control circuit may include:

a change-over switch U5, a first switch QH4, a second switch QH6, a third switch QH9 and a fourth switch QH 10; the changeover switch U5 includes: the first logic switch and the second logic switch.

The power pin HDMI 25V of the first HDMI interface (it should be understood that fig. 7 to 10 are 5V power pins as an example, and the voltage of the power pin is not limited in the present application) is respectively connected to the power supply terminal VDD of the switch U5, the first terminal of the first switch QH4, the second terminal of the first switch QH4, the first terminal of the second switch QH6, and the second terminal of the second switch QH 6.

An input pin HDMI SCL E of a second pin of the first HDMI interface is connected with an input pin Y of the first logic switch, a first output pin 0Y of the first logic switch is connected with an input pin HDMI SCL of the third HDMI interface, a second output pin 1Y of the first logic switch is connected with an input pin DEBUG UART1-RX of a debugging interface of the first system, and a third output pin 2Y of the first logic switch is connected with an input pin DEBUG UART2-RX of a debugging interface of the second system.

An output pin HDMI SDA E of a second pin of the first HDMI interface is connected with an output pin X of the second logic switch, a first input pin 0X of the second logic switch is connected with an input pin HDMI SDA of a third HDMI interface, a second input pin 1X of the second logic switch is connected with an input pin DEBUG UART1-TX of a debugging interface of the first system, and a third input pin 2X of the second logic switch is connected with an input pin DEBUG 2-TX of the debugging interface of the second system.

The first pin HDMI ARC of the first HDMI interface is connected to the first end of the third switch QH9, the controlled terminal DEBUG S0 of the first path of logic switch is connected to the second end of the first switch QH4 and the second end of the third switch QH9, and the third end of the first switch QH4 and the third end of the third switch QH9 are both grounded.

The second end of the third switch QH9 is connected to the first end of the fourth switch QH10, the controlled end DEBUG S1 of the second logic switch is connected to the second end of the second switch QH6 and the second end of the fourth switch QH10, respectively, and the third end of the second switch QH6 and the third end of the fourth switch QH10 are grounded.

Optionally, the control circuit further comprises a fifth switch QW3 and a sixth switch QW 4. The first pin HDMI ARC of the first HDMI interface is connected to the first terminal of the fifth switch QW3, the power supply pin HDMI 25V of the first HDMI interface is connected to the second terminal of the fifth switch QW3 and the second terminal of the sixth switch QW4, the third terminal of the fifth switch QW3 is connected to the third terminal of the sixth switch QW4, and the first terminal of the sixth switch QW4 is connected to the second HDMI ARC.

The working principle of the control circuit is as follows:

when the power pin HDMI 25V of the first HDMI interface is at a low level and the first pin HDMI ARC is at a low level, the first switch QH4, the second switch QH6, the third switch QH9, the fifth switch QW3 and the sixth switch QW4 are all turned off, the fourth switch QH10 is turned on, the controlled terminal debog S0 of the first logic switch is at a high level, and the controlled terminal debog 1 of the second logic switch is at a low level. At this time, the switch switches X and 1X and Y and 1Y based on the controlled terminal DEBUG S0 of the first logic switch being at a high level and the controlled terminal DEBUG S1 of the second logic switch being at a low level, and enters the DEBUG mode of the first system.

When the power pin HDMI 25V of the first HDMI interface is at a low level and the first pin HDMI ARC is at a high level, the first switch QH4, the second switch QH6, the fourth switch QH10, the fifth switch QW3 and the sixth switch QW4 are all turned off, the third switch QH9 is turned on, the controlled terminal DEBUG S0 of the first logic switch is at a low level, and the controlled terminal DEBUG 1 of the second logic switch is at a high level. At this time, the switch switches X and 2X and Y and 2Y based on the values that the controlled terminal DEBUG S0 of the first logic switch is at a low level and the controlled terminal DEBUG S1 of the second logic switch is at a high level, and enters the DEBUG mode of the second system.

When the power pin HDMI 25V of the first HDMI interface is at a high level, the first switch QH4, the second switch QH6, the third switch QH9, the fifth switch QW3 and the sixth switch QW4 are all turned on, the fourth switch QH10 is turned off, the controlled terminal debog S0 of the first logic switch is at a low level, and the controlled terminal debog S1 of the second logic switch is at a low level. At this time, the switch U5 switches X and 0X and Y and 0Y on the basis that the controlled terminal DEBUG S0 of the first logic switch is at a low level and the controlled terminal DEBUG S1 of the second logic switch is at a low level, thereby implementing the HDMI input function.

The first switch QH4, the second switch QH6, the third switch QH9, the fourth switch QH10, the fifth switch QW3, and the sixth switch QW4 in the control circuit may be any switches that can be turned on and off according to the voltage, such as a transistor or a Metal-Oxide-Semiconductor Field-effect transistor (MOSFET).

Taking a triode as an example, when the first switch QH4, the second switch QH6, the third switch QH9 and the fourth switch QH10 are all triodes, the first end of the first switch QH4, the first end of the second switch QH6, the first end of the third switch QH9 and the first end of the fourth switch QH10 all adopt bases of the triode, the second end of the first switch QH4, the second end of the second switch QH6, the second end of the third switch QH9 and the second end of the fourth switch QH10 all adopt collectors of the triode, and the third end of the first switch QH4, the third end of the second switch QH6, the third end of the third switch QH9 and the third end of the fourth switch QH10 all adopt emitters of the triode.

Taking MOS transistors as an example, when the first switch QH4, the second switch QH6, the third switch QH9 and the fourth switch QH10 are all MOS transistors, the first end of the first switch QH4, the first end of the second switch QH6, the first end of the third switch QH9 and the first end of the fourth switch QH10 all adopt gates of MOSFETs, the second end of the first switch QH4, the second end of the second switch QH6, the second end of the third switch QH9 and the second end of the fourth switch QH10 all adopt drains of MOSFETs, and the third end of the first switch QH4, the third end of the second switch QH6, the third end of the third switch QH9 and the third end of the fourth switch QH10 all adopt sources of MOSFETs.

Although the above examples and illustrations have been described with the first switch QH4, the second switch QH6, the third switch QH9, and the fourth switch QH10 being the same type of transistor, it is understood that the first switch QH4, the second switch QH6, the third switch QH9, and the fourth switch QH10 may be different types of switches. For example, the first switch QH4 is a transistor, and the rest is a MOS transistor.

Taking a triode as an example, when the fifth switch QW3 and the sixth switch QW4 are both triodes, the first terminal of the fifth switch QW3 and the first terminal of the sixth switch QW4 both use the emitter of the triode, the second terminal of the fifth switch QW3 and the second terminal of the sixth switch QW4 both use the base of the triode, and the third terminal of the fifth switch QW3 and the third terminal of the sixth switch QW4 both use the collector of the triode.

Taking MOS transistors as an example, when the fifth switch QW3 and the sixth switch QW4 are both MOS transistors, the first terminal of the fifth switch QW3 and the first terminal of the sixth switch QW4 both use the source of a MOSFET, the second terminal of the fifth switch QW3 and the second terminal of the sixth switch QW4 both use the gate of a MOSFET, and the third terminal of the fifth switch QW3 and the third terminal of the sixth switch QW4 both use the drain of a MOSFET.

Although the above examples and illustrations have been described with the fifth switch QW3 and the sixth switch QW4 being the same type of MOS switch, it is to be understood that the fifth switch QW3 and the sixth switch QW4 may be different types of switches. For example, the fifth switch QW3 is a transistor and the sixth switch QW4 is a MOS transistor, or the fifth switch QW3 is a MOS transistor and the sixth switch QW4 is a transistor.

It is understood that the transistor may be an NPN transistor, for example. In particular, other transistors, such as PNP transistors, may be used. When the PNP triode is used, the connection relationship of the PNP triode in the control circuit can be adjusted according to the working principle of the PNP triode, and the connection relationship is not limited. The MOS transistor may be, for example, an NMOS transistor. In particular, other MOS transistors, such as PMOS transistors, may also be used. When the PMOS transistor is used, the connection relationship of the PMOS transistor in the control circuit can be adjusted according to the operating principle of the PMOS transistor, which is not limited.

It should be understood that the switch may be any switch having at least two logic switches. Such as a two-way four-channel logic switch, or a three-way four-channel logic switch, etc. Fig. 7 is a schematic diagram of the two-way four-channel logic switch 74hc4052pw as a switch. In some embodiments, when the number of the switches is large, the ARC pin of the first HDMI interface may also be communicated with the ARC pin of the second HDMI interface through the switch, and at this time, the control circuit does not need to include the local circuit shown in fig. 10, which is not described again.

In the control circuits shown in fig. 7 to 10, optionally, in some embodiments, the control circuit may further include any one of the following resistors:

the resistor includes a first resistor RH116, a second resistor RH152, a third resistor RH151, a fourth resistor RH83, a fifth resistor RH150, a sixth resistor RH34, a seventh resistor RH18, an eighth resistor RH8, a ninth resistor RH1, and a tenth resistor RW 28.

When the first resistor RH116 is included, the power pin HDMI 25V of the first HDMI interface may be connected to the second end of the first switch QH4 through the first resistor RH116, and at this time, the first resistor RH116 serves as a pull-up resistor for providing a high level to the first switch QH 4.

When the second and third resistors RH152 and RH151 are included, the power pin HDMI 25V of the first HDMI interface may be connected to the first terminal of the first switch QH4 through the second and third resistors RH152 and RH 151. One end of the third resistor RH151 is grounded. At this time, the second resistor RH152 and the third resistor RH151 are used for current limiting and interference resistance improvement, and the stability of the circuit is improved. It should be understood that one of the second resistor RH152 and the third resistor RH151 may be provided here as well to achieve the corresponding function.

When the fourth resistor RH83 is included, the power pin HDMI 25V of the first HDMI interface may be connected to the second terminal of the second switch QH6 through the fourth resistor RH83, and at this time, the fourth resistor RH83 serves as a pull-up resistor for supplying a high level to the second switch QH 6.

When the fifth and sixth resistors RH150 and RH34 are included, the power pin HDMI 25V of the first HDMI interface may be connected to the first terminal of the second switch QH6 through the fifth and sixth resistors RH150 and RH 34. One end of the sixth resistor RH34 is grounded. At this time, the fifth resistor RH150 and the sixth resistor RH34 are used for current limiting and interference resistance improvement, and the stability of the circuit is improved. It should be understood that one of the fifth resistor RH150 and the sixth resistor RH34 may be provided herein to achieve the corresponding function.

When the seventh resistor RH18 is included, the second terminal of the third switch QH9 is connected to the first terminal of the fourth switch QH10 through the seventh resistor RH18, and at this time, the seventh resistor RH18 is used to provide a current limiting function.

When the eighth resistor RH8 and the ninth resistor RH1 are included, the power pin HDMI 25V of the first HDMI interface may be connected to the first terminal of the third switch QH9 through the eighth resistor RH8 and the ninth resistor RH 1. One end of the ninth resistor RH1 is grounded. At this time, the eighth resistor RH8 and the ninth resistor RH1 are used for current limiting and interference resistance improvement, and the stability of the circuit is improved. It should be understood that one of the eighth resistor RH8 and the ninth resistor RH1 may be provided to perform the corresponding functions.

When the tenth resistor RW28 is included, the power pin HDMI 25V of the first HDMI interface is connected to the second terminal of the fifth switch QW3 and the second terminal of the sixth switch QW4 through the tenth resistor RW28, and at this time, the tenth resistor RW28 is used to provide a current limiting function.

It should be understood that these resistors of the above examples are not essential to the control circuit, and may be omitted or replaced with any other device, circuit, etc. having similar functions.

Optionally, in some embodiments, when the power supply terminal VDD of the switch U5 is also used for connecting with a power supply pin of another interface, for example, a power supply pin of a Set Top Box (STB) interface, a diode DH20 may be disposed between the power supply terminal VDD of the switch U5 and the power supply pin HDMI 25 of the first HDMI interface HDMI 25V. By the mode, the two interfaces can be isolated, and the current backflow is avoided.

It should be noted that, although fig. 7 to fig. 10 are described above by taking the ARC pin of the first HDMI interface as the first pin, the example is illustrated. However, it will be understood by those skilled in the art that the above-described functions may also be implemented using the circuit diagrams shown in fig. 7 to 10 when the CEC pin or the ground pin of the first HDMI interface is used as the first pin. Optionally, in some embodiments, when the ground pin is used as the first pin, the first pin may be connected to the HDMI ground interface of the display device through one switch (e.g., a fifth switch), and it is not necessary to arrange two switches to implement bidirectional isolation, which is not described herein again.

The utility model also provides a display device, this display device can include the debugging device that any preceding embodiment provided for realize the debugging of dual system, its realization principle is similar with technological effect, no longer gives unnecessary details to this.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.

Claims

1. A debugging device of a display device, characterized in that the display device comprises: the device comprises a first system and a second system, and comprises: the high-definition multimedia interface comprises a first high-definition multimedia interface HDMI interface and a control circuit;

a power pin of a first HDMI interface, a first pin of the first HDMI interface, a second pin of the first HDMI interface, a debugging interface of the first system and a debugging interface of the second system are all connected with the control circuit;

2. The apparatus of claim 1, wherein the display device further comprises: a second HDMI interface and a third HDMI interface;

3. The apparatus of claim 2, wherein the second pin comprises: the control circuit comprises a change-over switch, a first switch, a second switch, a third switch and a fourth switch; the changeover switch includes: the first logic switch and the second logic switch;

4. The apparatus of claim 3, wherein the first switch, the second switch, the third switch, and the fourth switch are all transistors;

5. The apparatus of claim 3, wherein the control circuit further comprises a fifth switch, a sixth switch;

6. The apparatus of claim 5, wherein the fifth switch and the sixth switch are both MOSFETs;

7. The apparatus according to any of claims 2-6, wherein the first pin is an ARC pin of an audio return channel of the first HDMI interface, and the second HDMI interface is an HDMI ARC interface.

8. The device according to any of claims 2-6, wherein the second pin is a Display Data Channel (DDC) pin of the first HDMI interface, and the third HDMI interface is an HDMIDDC interface.

9. The apparatus according to any of claims 1-6, wherein the first system is a SoC system on a chip and the second system is an Internet of things controller system.

10. A display device, characterized in that the display device comprises a commissioning apparatus according to any one of claims 1-9.