CN210958309U - Pin system of chip with comparison module - Google Patents
Pin system of chip with comparison module Download PDFInfo
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- CN210958309U CN210958309U CN201922471630.8U CN201922471630U CN210958309U CN 210958309 U CN210958309 U CN 210958309U CN 201922471630 U CN201922471630 U CN 201922471630U CN 210958309 U CN210958309 U CN 210958309U
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Abstract
The utility model provides a pin system of chip with comparison module, which comprises a chip with comparison module, wherein the comparison module comprises N two-input comparators, N is a natural number more than or equal to 2, and one input end of each two-input comparator is interconnected; the chip comprises N +1 input pins, N interconnected input ends receive 1 reference signal outside the chip through 1 input pin, and the rest N input ends respectively receive N comparison signals outside the chip through the rest N input pins. One input end of each two-input comparator is interconnected, and N interconnected input ends are led out through 1 input pin to be connected with 1 external reference signal, so that N-1 input pins of the chip are reduced, the using number of the input pins of the chip is effectively reduced while the using function of the chip is met, and the packaging volume of the chip is effectively reduced; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of chip design is reduced.
Description
Technical Field
The utility model relates to a chip design field especially relates to a pin system of chip with comparison module.
Background
With the continuous progress of integrated circuit technology, the complexity of integrated circuits is increasing, the functions are perfecting, and the number of elements integrated in a single chip is developing from the first ten thousands to the present hundreds of millions or even billions. The continuous increase of chip functions leads to the continuous increase of input and output pins at the periphery of a chip, each die needs dozens of pins if being small and hundreds of pins if being large, the pins occupy a large amount of area, sometimes even larger than the area occupied by a core circuit in the chip, and the development requirements of multifunction and miniaturization of the chip are severely restricted; meanwhile, the increasing number of pins and layout area lead to the complexity of chip interconnection lines, and the complexity of chip design is improved.
SUMMERY OF THE UTILITY MODEL
In view of the above shortcomings in the prior art, an object of the present invention is to provide a pin system of a chip with a comparison module, for solving the problems of the prior art that the chip with the comparison module needs to use too many input pins for the input ports of the comparison module and external signals, resulting in a larger chip package size and improving the chip design complexity.
To achieve the above and other related objects, the present invention provides a pin system of a chip having a comparison module, including a chip having a comparison module, where the comparison module includes N two-input comparators, N is a natural number greater than or equal to 2, and one of input terminals of each of the two-input comparators is interconnected;
the chip comprises N +1 input pins, wherein N interconnected input ends receive 1 reference signal outside the chip through 1 input pin, and the rest N input ends respectively receive N comparison signals outside the chip through the rest N input pins.
Optionally, each of the two-input comparators comprises a positive input terminal and a negative input terminal, wherein the negative input terminals of each of the two-input comparators are interconnected; the N interconnected negative input ends receive 1 reference signal outside the chip through 1 input pin, and the remaining N positive input ends receive N comparison signals outside the chip through the remaining N input pins, respectively.
Optionally, a low-pass filter is connected to an output end of each of the two-input comparators, and the output of each of the two-input comparators is subjected to low-pass filtering processing.
Optionally, the reference signal is obtained by dividing and summing each comparison signal.
Optionally, the N comparison signals are divided and then connected to the N positive input ends through the N input pins.
Optionally, the chip with the comparison module is a control circuit chip of the dc brushless motor.
Optionally, the comparison module of the control circuit chip includes 3 two-input comparators, the control circuit chip includes 4 input pins, each positive input terminal receives 3 back electromotive force signals of the dc brushless motor through the 3 input pins, respectively, which are: the three-phase brushless direct current motor comprises a U counter electromotive force signal, a V counter electromotive force signal and a W counter electromotive force signal, wherein 3 interconnected negative input ends receive 1 reference signal of the direct current brushless direct current motor through the rest 1 input pins, and the reference signals are obtained by dividing and summing each counter electromotive force signal.
Optionally, when the comparison module of the control circuit chip includes 3 two-input comparators, 1 common two-input comparator is used to replace the 3 two-input comparators; at this time, the comparison module further includes 1 three-input gate, the control circuit chip includes 4 input pins, 3 input ends of the three-input gate receive 3 back electromotive force signals of the dc brushless motor through 3 input pins respectively, an output end of the three-input gate is connected with a positive input end of the common two-input comparator, a negative input end of the common two-input comparator receives 1 reference signal of the dc brushless motor through the remaining 1 input pins, and the reference signal is obtained after voltage division and summation based on each back electromotive force signal.
As described above, the pin system of the chip with the comparison module of the present invention interconnects one of the input terminals of each of the two input comparators, and leads out the N interconnected input terminals through 1 input pin to be connected with the external 1 reference signal, so as to avoid that the 1 reference signal can be connected with the comparison module only by setting N input pins through the chip, so that N-1 input pins are reduced for the chip, the number of the chip input pins is effectively reduced while the use function of the chip is satisfied, and the packaging volume of the chip can be effectively reduced; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of chip design is reduced.
Drawings
Fig. 1 is a schematic diagram of an external input signal connection circuit of a control circuit chip of a prior art dc brushless motor with a comparison module.
Fig. 2 to fig. 4 are schematic circuit diagrams of the pin system of the chip with the comparison module according to the present invention.
Fig. 5 to fig. 7 are schematic circuit diagrams showing the connection between the pin of the comparison module and the back electromotive force signal of the dc brushless motor according to the present invention.
Description of the element reference numerals
10 chip with comparison module
11 comparison module
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
Please refer to fig. 1 to 7. It should be understood that the structure, ratio, size and the like shown in the drawings attached to the present specification are only used for matching with the content disclosed in the specification, so as to be known and read by those skilled in the art, and are not used for limiting the limit conditions that the present invention can be implemented, so that the present invention has no technical essential meaning, and any structure modification, ratio relationship change or size adjustment should still fall within the scope that the technical content disclosed in the present invention can cover without affecting the function that the present invention can produce and the purpose that the present invention can achieve. Meanwhile, the terms such as "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for convenience of description, and are not intended to limit the scope of the present invention, and changes or adjustments of the relative relationship thereof may be made without substantial technical changes, and the present invention is also regarded as the scope of the present invention.
With the continuous progress of integrated circuit technology, the complexity of integrated circuits is increasing, the functions are perfecting, and the number of elements integrated in a single chip is developing from the first ten thousands to the present hundreds of millions or even billions. The continuous increase of chip functions leads to the continuous increase of input and output pins at the periphery of a chip, each die needs dozens of pins if being small and hundreds of pins if being large, the pins occupy a large amount of area, sometimes even larger than the area occupied by a core circuit in the chip, and the development requirements of multifunction and miniaturization of the chip are severely restricted; meanwhile, the increasing number of pins and layout area lead to the complexity of chip interconnection lines, and the complexity of chip design is improved.
Taking a control circuit chip of a dc brushless MOTOR with a comparison module as an example, a schematic diagram of an external input signal connection circuit of the control circuit chip is shown in fig. 1, a three-phase back electromotive force signal MOTOR-A, MOTOR-B, MOTOR-C of the dc brushless MOTOR is divided and then respectively input to 3 input pins of the control circuit chip through AIN1, AIN3 and AIN5, and is connected to three input ends of the comparison module in the control circuit chip through the 3 input pins; three-phase back electromotive force signals MOTOR-A, MOTOR-B, MOTOR-C of the direct current brushless MOTOR are subjected to voltage division and summation and then are input to the other 3 input pins of the control circuit chip through the AIN4, so that only a comparison module of the control circuit chip needs 6 input pins, and the packaging volume of the chip cannot be further reduced.
Based on this, as shown in fig. 2, the present invention provides a pin system of a chip having a comparison module, the chip 10 includes a comparison module 11, the comparison module 11 includes N two-input comparators CMP1, CMP2 to CMP (N), N is a natural number greater than or equal to 2, wherein one input terminal of each of the two-input comparators is interconnected;
the chip 10 includes N +1 input pins P1, P2 to P (N +1), wherein N of the interconnected input terminals receive 1 reference signal in (N +1) outside the chip 10 through 1 of the input pins P (N +1), and the remaining N of the input terminals receive N comparison signals in1, in2 to in (N) outside the chip 10 through the remaining N of the input pins P1, P2 to P (N), respectively.
The utility model discloses with every one of them input of two input comparator interconnects, and with N of interconnect the input is drawn forth through 1 input pin P (N +1) and is connected with 1 outside reference signal in (N +1), has avoided 1 reference signal to need to set up N input pins through the chip and can be connected with the comparison module, makes the chip reduce N-1 input pins, has effectively reduced the use quantity of chip input pin when satisfying chip service function, can effectively reduce the encapsulation volume of chip; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of chip design is reduced.
As shown in fig. 3, each of the two-input comparators CMP1, CMP 2-CMP (n) includes a positive input terminal and a negative input terminal, wherein the negative input terminals of each of the two-input comparators CMP1, CMP 2-CMP (n) are interconnected, as an example; the N interconnected negative input terminals receive 1 reference signal in (N +1) outside the chip 10 through 1 of the input pins P (N +1), and the remaining N positive input terminals receive N comparison signals in1, in 2-in (N) outside the chip 10 through the remaining N input pins P1, P2-P (N), respectively.
As shown in fig. 2 and 3, as an example, the output end of each of the two input comparators CMP1, CMP2 to CMP (n) is connected to a low pass filter M1, M2 to M (n), and the output of each of the two input comparators CMP1, CMP2 to CMP (n) is low pass filtered. The interconnection influence is removed, and the accuracy of the comparison result of each of the two input comparators CMP1, CMP2 to CMP (n) is improved. Here, the low pass filters M1, M2 to M (n) may be conventional low pass filters, and may be selected according to specific circuit requirements, which is not limited herein.
As shown in fig. 4, the reference signal in (N +1) is obtained by dividing and summing each of the comparison signals in1, in2 to in (N), as an example. For example, in fig. 4, each of the comparison signals in1, in2 to in (N) is divided by R21, R22 to R2(N) N voltage dividing resistors, and the divided voltages are summed to obtain the reference signal in (N + 1).
As shown in fig. 3 and 4, for example, the N comparison signals in1, in2 to in (N) are divided and then connected to the N positive input terminals through the N input pins P1, P2 to P (N). For example, in fig. 3 and 4, the N comparison signals in1, in2 to in (N) are respectively divided by N voltage dividing resistors R11, R12 to R1(N), and after voltage division, the N comparison signals are respectively connected to the N positive input terminals through N input pins P1, P2 to P (N).
As shown in fig. 5 to 7, the chip 10 with the comparison module 11 may be applied to a control circuit chip of a dc brushless motor as an example.
As shown in fig. 5 and 6, the present invention is described by taking a control circuit chip 10 of a dc brushless motor as an example, the comparison module 11 of the control circuit chip 10 includes 4, the control circuit chip 10 includes 4 input pins P1, P2, P3, P4, each of the positive input terminals receives 3 back electromotive force signals of the dc brushless motor through 3 input pins P1, P2, P3, respectively, and they are: u back electromotive force signal BEMF-U, V back electromotive force signal BEMF-V and W back electromotive force signal BEMF-W, 3 of the negative input terminals of the interconnection receive 1 reference signal in4 of the dc brushless motor through the remaining 1 of the input pins P4, and the reference signal in4 is obtained by dividing and summing up the back electromotive force signal BEMF-V and the W back electromotive force signal BEMF-W based on each of the back electromotive force signals U back electromotive force signal BEMF-U, V. As shown in fig. 5, the 3 back electromotive force signals BEMF-U, BEMF-V, BEMF-W are respectively divided by three voltage dividing resistors R1, R2, and R3, and then respectively connected to the positive input terminals of the 3 two-input comparators CMP1, CMP2, and CMP3 through the 3 input pins P1, P2, and P3 after voltage division; the 3 back electromotive force signals BEMF-U, BEMF-V, BEMF-W are divided by three voltage dividing resistors R4, R5 and R6 respectively, and the reference signal in4 is obtained through summation after voltage division.
As shown in fig. 6, low pass filters M1, M2, and M3 are connected to output terminals of the 3 two-input comparators CMP1, CMP2, and CMP3, and low pass filtering is performed on outputs of the two-input comparators CMP1, CMP2, and CMP 3. The interconnection influence is removed, and the accuracy of the comparison result of each of the two-input comparators CMP1, CMP2 and CMP3 is improved.
The negative input ends of 3 two-input comparators in a control circuit chip comparison module of the direct-current brushless motor are interconnected, and the connection with an external reference signal is realized through one input pin, the whole comparison module can realize the signal input of the comparison module only by 4 input pins, the comparison function of the chip comparison module is met, and the use number of the input pins of the chip is effectively reduced, so that the packaging volume of the control circuit chip can be effectively reduced; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of the design of a control circuit chip is reduced.
As an example, in the application of the control circuit chip of the dc brushless motor, the comparison module 11 including the 3 two-input comparators CMP1, CMP2, CMP3 described above may be modified, and specifically, as shown in fig. 7, when the comparison module 11 of the control circuit chip 10 includes 3 two-input comparators CMP1, CMP2, CMP3, 1 common two-input comparator CMP is used instead of 3 two-input comparators CMP1, CMP2, CMP 3; at this time, the comparing module 11 further includes 1 three-input gate MUX, the control circuit chip 10 includes 4 input pins P1, P2, P3, and P4, and 3 input ends of the three-input gate MUX respectively receive 3 back electromotive force signals of the dc brushless motor through 3 input pins P1, P2, and P3, where the signals are: u back electromotive force signal BEMF-U, V back electromotive force signal BEMF-V and W back electromotive force signal BEMF-W, an output terminal of the three-input gate MUX is connected to a positive input terminal of the common two-input comparator CMP, a negative input terminal of the common two-input comparator CMP receives 1 reference signal in4 of the dc brushless motor through the remaining 1 input pins P4, and the reference signal in4 is obtained by dividing and summing up the back electromotive force signals BEMF-V and W back electromotive force signal BEMF based on each of the back electromotive force signals U back electromotive force signal BEMF-U, V. Preferably, the output terminals of 1 of the common two-input comparators CMP are connected to a low-pass filter M, and the output terminals of the common two-input comparators CMP are low-pass filtered. Improving the accuracy of the comparison result of the common two-input comparator CMP
3 two-input comparators in a control circuit chip comparison module of the direct-current brushless electrode are replaced by one gating device, meanwhile, the gating device is additionally arranged in the comparison module, so that the comparison function of the 3 two-input comparators is realized, the use of the gating device is equivalent to the interconnection of the negative input ends of the 3 two-input comparators, so that the connection with a reference signal can be realized only by 1 input pin, the whole comparison module can realize the signal input of the comparison module only by 4 input pins, the use number of the input pins of the chip is effectively reduced while the comparison function of the chip comparison module is met, and the packaging volume of the control circuit chip is effectively reduced; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of the design of a control circuit chip is reduced.
To sum up, the utility model provides a pin system of chip with comparison module, through with every one of them input of two input comparators interconnects, and draw forth the N of interconnect the input through 1 the input pin with 1 outside reference signal connection, avoided 1 reference signal to need through the chip set up N input pin just can be connected with comparison module, make the chip reduce N-1 input pin, effectively reduced the use quantity of chip input pin when satisfying the chip service function, can effectively reduce the encapsulation volume of chip; in addition, peripheral elements of current detection and current protection can be reduced, and the complexity of chip design is reduced. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. A pin system for a chip having a comparison module, comprising a chip having a comparison module, wherein:
the comparison module comprises N two-input comparators, wherein N is a natural number greater than or equal to 2, and one input end of each two-input comparator is interconnected;
the chip comprises N +1 input pins, wherein N interconnected input ends receive 1 reference signal outside the chip through 1 input pin, and the rest N input ends respectively receive N comparison signals outside the chip through the rest N input pins.
2. The pin system of a chip with a comparison module according to claim 1, characterized in that: each of the two-input comparators comprises a positive input terminal and a negative input terminal, wherein the negative input terminals of each of the two-input comparators are interconnected; the N interconnected negative input ends receive 1 reference signal outside the chip through 1 input pin, and the remaining N positive input ends receive N comparison signals outside the chip through the remaining N input pins, respectively.
3. Pin-out system of a chip with a comparison module according to claim 1 or 2, characterized in that: and the output end of each two-input comparator is connected with a low-pass filter, and the low-pass filter processing is carried out on the output of each two-input comparator.
4. Pin-out system of a chip with a comparison module according to claim 2, characterized in that: the reference signal is obtained by dividing and summing each comparison signal.
5. The pin system of a chip with a comparison module according to claim 4, characterized in that: the N comparison signals are respectively divided and then are connected with the N positive input ends through the N input pins.
6. The pin system of a chip with a comparison module according to claim 5, characterized in that: the chip with the comparison module is a control circuit chip of the direct current brushless motor.
7. The pin system of a chip with a comparison module according to claim 6, characterized in that: the comparison module of the control circuit chip comprises 3 two-input comparators, the control circuit chip comprises 4 input pins, each positive input end receives 3 back electromotive force signals of the brushless direct-current motor through the 3 input pins respectively, and the two input pins are respectively: the three-phase brushless direct current motor comprises a U counter electromotive force signal, a V counter electromotive force signal and a W counter electromotive force signal, wherein 3 interconnected negative input ends receive 1 reference signal of the direct current brushless direct current motor through the rest 1 input pins, and the reference signals are obtained by dividing and summing each counter electromotive force signal.
8. The pin system of a chip with a comparison module of claim 7, wherein: when the comparison module of the control circuit chip comprises 3 two-input comparators, 1 common two-input comparator is adopted to replace the 3 two-input comparators; at this time, the comparison module further includes 1 three-input gate, the control circuit chip includes 4 input pins, 3 input ends of the three-input gate receive 3 back electromotive force signals of the dc brushless motor through 3 input pins respectively, an output end of the three-input gate is connected with a positive input end of the common two-input comparator, a negative input end of the common two-input comparator receives 1 reference signal of the dc brushless motor through the remaining 1 input pins, and the reference signal is obtained after voltage division and summation based on each back electromotive force signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922471630.8U CN210958309U (en) | 2019-12-31 | 2019-12-31 | Pin system of chip with comparison module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922471630.8U CN210958309U (en) | 2019-12-31 | 2019-12-31 | Pin system of chip with comparison module |
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| Publication Number | Publication Date |
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| CN210958309U true CN210958309U (en) | 2020-07-07 |
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| CN201922471630.8U Active CN210958309U (en) | 2019-12-31 | 2019-12-31 | Pin system of chip with comparison module |
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