CN210956703U

CN210956703U - Flat panel detector

Info

Publication number: CN210956703U
Application number: CN202020143081.1U
Authority: CN
Inventors: 宫奎; 张志海
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Optoelectronics Technology Co Ltd
Priority date: 2020-01-21
Filing date: 2020-01-21
Publication date: 2020-07-07
Anticipated expiration: 2030-01-21

Abstract

The utility model discloses a flat panel detector. The flat panel detector includes: a substrate base plate; the first flat layer is arranged on one side of the substrate base plate, and a groove is formed in one side, away from the substrate base plate, of the first flat layer; the first electrode layer is arranged on one side, away from the substrate base plate, of the first flat layer, the first electrode layer covers the groove, and the surface, away from the substrate base plate, of the first electrode layer in the groove has light reflectivity; and the photodiode is arranged on one side of the first electrode layer, which is far away from the substrate base plate, and is positioned in the groove. When incident light irradiates the surface of the first electrode layer in the groove, the first electrode layer can reflect the incident light into the photodiode, so that the absorption rate of the photodiode to the incident light is enhanced, the photoelectric conversion efficiency of the photodiode is improved, and the detection sensitivity of the flat panel detector is improved.

Description

Flat panel detector

Technical Field

The utility model relates to a survey technical field, concretely relates to flat panel detector.

Background

In recent years, the flat panel detection technology has been dramatically developed. The flat panel detection technology can be classified into a direct type and an indirect type. A key component of the indirect flat panel detection technique is a Flat Panel Detector (FPD) used to acquire images. The flat panel detector comprises an array substrate, and the array substrate comprises an X-ray conversion layer. The array substrate comprises a plurality of detection units which are arranged in an array. Each detection unit includes a thin film transistor and an amorphous silicon photodiode. The amorphous silicon photodiode operates under the reverse voltage. When the array substrate is irradiated by X rays, the X ray conversion layer converts the X rays into visible light, the amorphous silicon photodiode converts the visible light into an electric signal and stores the electric signal, the thin film transistors are turned on line by line under the action of the driving circuit, the electric charge converted by the photodiode is transmitted to the data processing circuit, and the data processing circuit further amplifies and converts the electric signal into analog/digital conversion and the like, so that image information is finally obtained.

The research of the inventor of the application finds that the photoelectric conversion efficiency of the conventional flat panel detector is reduced after the conventional flat panel detector works for a long time. In addition, in the case of a flat panel detector of an Indium Gallium Zinc Oxide (IGZO) type thin film transistor, a characteristic drift of the thin film transistor occurs, and reliability of the thin film transistor is lowered.

Disclosure of Invention

The embodiment of the utility model provides a, provide a flat panel detector to solve the problem that flat panel detector photoelectric conversion is inefficient.

In order to solve the technical problem, an embodiment of the utility model provides a flat panel detector, include:

a substrate base plate;

the first flat layer is arranged on one side of the substrate base plate, and a groove is formed in one side, away from the substrate base plate, of the first flat layer;

the first electrode layer is arranged on one side, away from the substrate base plate, of the first flat layer, the first electrode layer covers the groove, and the surface, away from the substrate base plate, of the first electrode layer in the groove has light reflectivity; and the number of the first and second groups,

the photodiode is arranged on one side, away from the substrate base plate, of the first electrode layer and is located in the groove.

In one exemplary embodiment, a material of the first electrode layer includes at least one of aluminum and titanium.

In one exemplary embodiment, the substrate comprises a thin film transistor, the material of an active layer of the thin film transistor comprises indium gallium zinc oxide,

the material of the first electrode layer comprises titanium, or the first electrode layer comprises a first sub-film layer and a second sub-film layer which are arranged in a laminated mode, the first sub-film layer is located between the first flat layer and the second sub-film layer, the material of the first sub-film layer comprises one of titanium and aluminum, and the material of the second sub-film layer comprises the other one of titanium and aluminum.

In one exemplary embodiment, the thickness of the first flat layer is 3 μm to 5 μm, the distance between the bottom side of the groove and the side of the first flat layer facing the substrate base plate is 1.5 μm to 2.5 μm, and the thickness is a dimension in a direction perpendicular to the substrate base plate.

In an exemplary embodiment, an opening angle between a sidewall and a bottom wall of the recess is greater than or equal to 90 °

In one exemplary embodiment, an orthographic projection of the photodiode on the substrate base plate is within an orthographic projection range of the groove bottom surface on the substrate base plate.

In one exemplary embodiment, the photodiode is an amorphous silicon photodiode, and the thickness of the photodiode in a direction perpendicular to the substrate base plate is 2 μm to 5 μm.

In one exemplary embodiment, the first electrode layer is electrically connected to a source electrode or a drain electrode of a thin film transistor of the substrate base through a via hole penetrating the first flat layer.

In one exemplary embodiment, an orthographic projection of the first electrode layer on the substrate covers an orthographic projection of the active layer of the thin film transistor on the substrate.

In an exemplary embodiment, the flat panel detector further includes a second insulating layer disposed between the first planarization layer and the first electrode layer, and the second insulating layer defines a via hole for exposing a source electrode or a drain electrode of the thin film transistor.

In an exemplary embodiment, the flat panel detector further includes a second electrode layer located on a surface of the photodiode on a side facing away from the substrate base, the flat panel detector further includes a second flat layer and a metal bridging layer sequentially disposed on the second electrode layer on the side facing away from the substrate base, the metal bridging layer is electrically connected to the second electrode layer through a via hole penetrating through the second flat layer, the flat panel detector further includes an X-ray conversion layer disposed on the metal bridging layer on the side facing away from the substrate base, and the X-ray conversion layer is configured to convert an X-ray irradiated onto the X-ray conversion layer into a visible light.

The flat panel detector of this application embodiment, when incident light from photodiode deviate from the surface of the first electrode layer in the recess is shone to one side of substrate base plate, the first electrode layer that has the reflectivity can be with incident light reflection in the photodiode, and the reinforcing photodiode is to incident light's absorptivity, improves photodiode's photoelectric conversion efficiency, improves flat panel detector's detectivity.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

The accompanying drawings are included to provide a further understanding of the embodiments of the present invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the embodiments of the invention and not to limit the embodiments of the invention.

FIG. 1 is a schematic diagram of a dynamic flat panel detector;

FIG. 2 is a schematic structural diagram of a flat panel detector according to an embodiment of the present disclosure;

FIG. 3a is a schematic diagram of a flat panel detector after a substrate base plate is formed;

FIG. 3b is a schematic diagram of a flat detector after a first planarization layer is formed;

FIG. 3c is a schematic diagram of the flat panel detector after a first electrode layer is formed;

FIG. 3d is a schematic diagram of a flat panel detector after photodiodes are formed therein;

fig. 3e is a schematic structural diagram of the flat panel detector after a third insulating layer is formed.

Description of reference numerals:

10-a substrate base plate; 11-a substrate; 12-a gate electrode;

13-a gate insulating layer; 14-an active layer; 151-drain electrode;

152-source electrode; 16 — a first insulating layer; 161-first via;

21 — a first planarization layer; 211-a groove; 212 — a second via;

22 — a second insulating layer; 23 — a first electrode layer; 24-a photodiode;

25 — a second electrode layer; 26 — a third insulating layer; 261-a fourth via;

27 — a second planarization layer; 28 — a fourth insulating layer; 29-a metallic lap layer;

30-a fifth insulating layer.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.

In the drawings, the size of each component, the thickness of layers, or regions may be exaggerated for clarity. Therefore, the present invention is not necessarily limited to the dimensions, and the shapes and sizes of the respective members in the drawings do not reflect actual proportions. In addition, the drawings schematically show desirable examples, and one embodiment of the present invention is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present specification are provided for avoiding confusion among the constituent elements, and are not limited in number.

In this specification, functions of the "source electrode" and the "drain electrode" may be interchanged when a transistor having opposite polarities is used, when a current direction changes during circuit operation, or the like. Therefore, in this specification, "source electrode" and "drain electrode" may be exchanged with each other.

Fig. 1 is a schematic structural diagram of a dynamic flat panel detector. As shown in fig. 1, the flat panel detector includes a substrate 11 and a thin film transistor disposed on the substrate 11. The thin film transistor includes a gate electrode 12, an active layer 14, a drain electrode 151, and a source electrode 152. The gate electrode 12 is disposed on one side of the substrate 11, the gate insulating layer 13 is disposed on one side of the gate electrode 12 facing away from the substrate 11, the active layer 14 is disposed on one side of the gate insulating layer 13 facing away from the substrate 11, and the drain electrode 151 and the source electrode 152 are disposed on one side of the active layer 14 facing away from the substrate 11. The drain electrode 151 and the source electrode 152 are lap-connected to the active layer 14 at both ends of the active layer 14, respectively. The first insulating layer 16 is disposed on the drain electrode 151 and the source electrode 152 at a side away from the substrate 11, and the first insulating layer 16 is opened with a first via hole exposing the source electrode 152.

As shown in fig. 1, the flat panel detector further includes a first planarization layer 21 disposed on a side of the first insulating layer 16 away from the substrate 11, and the first planarization layer 21 is opened with a second via hole at the first via hole position for exposing the source electrode 152. The first planarization layer 21 may be an organic planarization layer. A second insulating layer 22 is disposed on a side of the first planarization layer 21 away from the substrate 11, and a third via hole for exposing the source electrode 152 is opened at the second via hole of the second insulating layer 22.

As shown in fig. 1, the flat panel detector further includes a PIN detection device disposed on the second insulating layer 22. The PIN detection device comprises a first electrode layer 23 arranged on the side of the second insulating layer 22 facing away from the substrate 11. The first electrode layer 23 is electrically connected to the source electrode 152 through the third via hole. The orthographic projection of the first electrode layer 23 on the substrate 11 covers the orthographic projection of the active layer 14 on the substrate 11. A PIN-type photodiode 24 is arranged on the side of the first electrode layer 23 facing away from the substrate 11, a second electrode layer 25 is arranged on the side of the photodiode 24 facing away from the substrate 11, and the second electrode layer 25 is located directly above the photodiode 24. A third insulating layer 26 is disposed on a side of the second electrode layer 25 away from the substrate 11, and the third insulating layer 26 is provided with a fourth via hole exposing the second electrode layer 25. A second flat layer 27 is disposed on a side of the third insulating layer 26 facing away from the substrate 11, and a fifth via hole for exposing the second electrode layer 25 is opened at the fourth via hole of the second flat layer 27. The second planarization layer 27 may be an organic planarization layer. A fourth insulating layer 28 is disposed on a side of the second flat layer 27 away from the substrate 11, and a sixth via hole for exposing the second electrode layer 25 is opened at the fifth via hole of the fourth insulating layer 28. A side of the fourth insulating layer 28 facing away from the substrate 11 is provided with a metal lap joint layer 29, and the metal lap joint layer 29 is electrically connected with the second electrode layer 25 through a sixth via hole. The flat panel detector further comprises a fifth insulating layer 30 arranged on a side of the metal strap layer 29 facing away from the substrate 11, the fifth insulating layer 30 covering the entire upper surface of the fourth insulating layer 28.

The material of the active layer 14 of the thin film transistor may be amorphous silicon (a-Si) or Indium Gallium Zinc Oxide (IGZO). The first planarization layer 21 is provided to reduce parasitic capacitance between the upper and lower metal layers.

It will be readily understood that the flat panel detector may further comprise an X-ray conversion layer (not shown in the figures) on the side of the fifth insulating layer 30 facing away from the substrate 11. When the X-ray irradiates the X-ray conversion layer, the X-ray conversion layer converts the X-ray into visible light. The photodiode converts visible light into an electric signal and stores the electric signal, the thin film transistors are turned on line by line under the action of the driving circuit, charges converted by the photodiode are transmitted to the data processing circuit, and the data processing circuit can further amplify, convert analog/digital and the like the electric signal to finally obtain image information.

The amorphous silicon film in the amorphous silicon photodiode has a light-induced degradation effect, so that the photoelectric conversion efficiency of the amorphous silicon photodiode is reduced after the amorphous silicon photodiode is illuminated for a long time. In order to reduce the occurrence of the light-induced degradation phenomenon, the thickness of the amorphous silicon thin film can be reduced. However, the reduction in thickness of the amorphous silicon thin film may cause the incident light to be insufficiently absorbed, so that a large amount of light passes through the amorphous silicon photodiode, and the conversion efficiency of the amorphous silicon photodiode is reduced.

In addition, when the active layer of the thin film transistor is made of IGZO, a large amount of hydrogen is introduced into the amorphous silicon photodiode 24 during the manufacturing process, so that oxygen atoms in the IGZO are reduced, and oxygen vacancies are generated in the active layer, which causes the characteristic drift of the thin film transistor. How to block the diffusion of hydrogen toward the thin film transistor in the process of manufacturing the amorphous silicon photodiode is also one of the problems to be solved.

In view of the above technical problem, an embodiment of the present application provides a flat panel detector. The flat panel detector includes:

a substrate base plate;

The technical content of the present invention will be described in detail by specific embodiments.

Fig. 2 is a schematic structural diagram of a flat panel detector according to an embodiment of the present application. As shown in fig. 2, the flat panel detector includes a substrate base plate 10 and a first planarization layer 21 disposed on one side of the substrate base plate 10. The first flat layer 21 is provided with a groove 211 at a side thereof facing away from the substrate base plate 10. The flat panel detector further comprises a first electrode layer 23 arranged on the side of the first flat layer 21 facing away from the substrate base plate 10, wherein the first electrode layer 23 covers the surface of the groove 211. The flat panel detector further comprises a photodiode 24 arranged on a side of the first electrode layer 23 facing away from the substrate base plate 10, the photodiode 24 being located in the recess 211. In the recess 211, a surface of the first electrode layer 23 facing away from the substrate base plate 10 has light-reflecting properties.

The flat panel detector of the embodiment of the application, photodiode 24 sets up in recess 211, and in recess 211, the surface that deviates from substrate base plate 10 one side of first electrode layer 23 has the reflectivity, thereby, when incident light shines the surface of the first electrode layer 23 in the recess 211 from one side that photodiode deviates from substrate base plate, the first electrode layer 23 that has the reflectivity can be with incident light reflection in photodiode 24, strengthen photodiode to incident light's absorptivity, improve photodiode's photoelectric conversion efficiency, improve flat panel detector's detectivity.

In one exemplary embodiment, the photodiode 24 is an amorphous silicon photodiode including an N-type amorphous silicon layer, an intrinsic amorphous silicon layer, and a P-type amorphous silicon layer sequentially stacked. The N-type amorphous silicon layer is adjacent to the first electrode layer 23. The photodiode 24 has a thickness of 2 to 5 μm. The photodiode with the thickness can fully absorb the light irradiated on the photodiode, so that the loss of the light passing through the photodiode is avoided, and the conversion efficiency of the photodiode is improved. Adopt the flat panel detector of this application embodiment, need not be with the thickness attenuate of photodiode's amorphous silicon film, avoided the light that amorphous silicon film thickness attenuate leads to can not fully absorb, guaranteed photodiode's light absorptivity, avoided a large amount of light to see through photodiode.

In one exemplary embodiment, as shown in fig. 2, the material of the first electrode layer 23 may include aluminum or titanium. The metal aluminum and the metal titanium both have good light reflecting performance, and the first electrode layer 23 made of the metal aluminum or the metal titanium can have good light reflecting performance, so that more incident light can be reflected into the photodiode 24, and the absorption rate of the photodiode to the incident light is further improved.

In other embodiments, other metals (such as molybdenum Mo, chromium Cr, tantalum Ta, titanium Ti, or tungsten W, etc.) may be used to fabricate the first electrode layer 23, and a reflective film may be coated on the first electrode layer 23 in the groove to achieve the reflective performance.

In one exemplary embodiment, as shown in fig. 2, the base substrate 10 includes a base 11, a thin film transistor disposed on the base 11, and a first insulating layer 16 disposed on a side of the thin film transistor facing away from the base 11. The thin film transistor includes a gate electrode 12, an active layer 14, a drain electrode 151, and a source electrode 152. The gate electrode 12 is disposed on one side of the substrate 11, the gate insulating layer 13 is disposed on one side of the gate electrode 12 facing away from the substrate 11, the active layer 14 is disposed on one side of the gate insulating layer 13 facing away from the substrate 11, and the drain electrode 151 and the source electrode 152 are disposed on one side of the active layer 14 facing away from the substrate 11. The drain electrode 151 and the source electrode 152 are lap-connected to the active layer 14 at both ends of the active layer 14, respectively. The first insulating layer 16 is disposed on a side of the drain electrode 151 and the source electrode 152 facing away from the substrate 11, and the first insulating layer 16 is opened with a first via hole exposing the source electrode 152.

The first planarization layer 21 is disposed on a side of the first insulating layer 16 away from the substrate 11, the first planarization layer 21 is provided with a second via hole located at the first via hole, and the source electrode 152 is exposed through the second via hole. The first electrode layer 23 is electrically connected to the source electrode 152 through the second via hole. It is easily understood that, in another exemplary embodiment, the first electrode layer 23 may also be disposed to be electrically connected to the drain electrode 151.

In one exemplary embodiment, as shown in fig. 2, the flat panel detector further includes a second insulating layer 22 disposed between the first planarization layer 21 and the first electrode layer 23. The second insulating layer 22 is provided with a third via hole at the position of the second via hole, and the source electrode 152 is exposed through the third via hole. The first electrode layer 23 is electrically connected to the source electrode 152 through the third via hole.

In one exemplary embodiment, an orthographic projection of the first electrode layer 23 on the substrate 11 covers an orthographic projection of the active layer 14 on the substrate 11. Thus, the incident light does not irradiate the active layer 14, and the influence of the incident light on the thin film transistor is prevented. In fig. 2, the thin film transistor is a bottom gate type thin film transistor, and in another exemplary embodiment, the thin film transistor may also be a top gate type thin film transistor or the like.

In one exemplary embodiment, the material of the active layer of the thin film transistor includes an IGZO material. The first electrode layer 23 may include a lamination arrangement of a first sub-film layer and a second sub-film layer. The first sub-film layer is adjacent to the first planarization layer 21 and the second sub-film layer is disposed between the first sub-film layer and the photodiode 24.

In one exemplary embodiment, the material of the first sub-film layer includes titanium (Ti). The first sub-film layer containing titanium has a hydrogen-absorbing function. During the preparation of the subsequent layers (e.g., insulating layer, amorphous silicon layer, etc.) after the first electrode layer 23, there are several high temperature processes, so that hydrogen atoms in the subsequent layers are released. The released hydrogen atoms will diffuse around. The hydrogen atoms diffuse into the titanium metal and stay in the titanium metal lattice in the form of an impurity (intercity atom), or form titanium hydride (TiHx; x ═ 1.5 to 1.99) with the titanium metal. When hydrogen atoms enter the titanium metal, a higher activation energy must be used to disengage the hydrogen atoms from the titanium metal. Therefore, the first sub-film layer can effectively limit hydrogen atoms released from the subsequent film layer in titanium metal, reduce the reaction of the hydrogen atoms and IGZO, prevent the characteristic drift of the thin film transistor and improve the reliability of the thin film transistor.

In the embodiment of the present application, the amorphous silicon photodiode 24 is disposed in the groove, a large amount of hydrogen is introduced into the amorphous silicon photodiode during the manufacturing process, and the amorphous silicon photodiode itself continuously releases hydrogen. The first sub-film layer covered on the surface of the groove can effectively prevent hydrogen in the amorphous silicon photodiode from diffusing to the bottom and the side direction, and the characteristic of the IGZO thin film transistor is prevented from being influenced.

In one exemplary embodiment, a material of the second sub-film layer includes aluminum (Al). The second sub-film layer has good light reflection performance, and can reflect the light incident to the inner surface of the groove into the photodiode 24, so that the absorption rate of the photodiode 24 to the incident light is improved.

In one exemplary embodiment, the material of the first sub-film layer includes aluminum, and the material of the second sub-film layer includes titanium. The second sub-film layer can effectively prevent hydrogen released by the subsequent film layer from diffusing to the bottom and the side direction, and the characteristics of the IGZO thin film transistor are prevented from being influenced. The second sub-film layer positioned in the groove can reflect incident light into the photodiode, so that the absorption rate of the photodiode to the incident light is enhanced, and the photoelectric conversion efficiency of the photodiode is improved.

In one exemplary embodiment, the material of the first electrode layer 23 includes titanium. Therefore, when the active layer is made of IGZO, the first electrode layer 23 can effectively prevent hydrogen released by the subsequent film layer from diffusing to the bottom and the side direction, and the characteristics of the IGZO thin film transistor are prevented from being affected.

In one exemplary embodiment, as shown in fig. 2, the material of the first planarization layer 21 includes a photosensitive organic resin. The thickness h1 of the first flat layer 21 is 3 μm to 5 μm. At the groove 211, the distance h2 between the bottom edge of the groove 211 and the side of the first flat layer 21 facing the substrate 11 is 1.5 μm to 2.5 μm. In particular implementations, h1 can be 3 μm, 4 μm, or 5 μm, and correspondingly h2 can be 1.5 μm, 2 μm, or 2.5 μm. The "thickness" herein is a dimension in a direction perpendicular to the substrate 11.

In one exemplary embodiment, as shown in FIG. 2, the side of the recess 211 facing away from the substrate base is open. Thus, the first electrode layer 23 covering the upper surface of the recess 211 is also open-type. The open-type first electrode layer 23 can better reflect the incident light irradiated on the sidewall into the photodiode 24 according to the reflection principle when the incident light is irradiated on the side surface of the first electrode layer 23, thereby reducing the loss of the reflected light. In an exemplary embodiment, the opening angle θ between the side wall and the bottom wall of the recess is greater than or equal to 90 °. In particular implementations, θ may be 90 °, 120 °, 135 °, or 150 °. In one exemplary embodiment, the opening angle θ between the side wall and the bottom wall of the groove is greater than 90 °, so that the side surface of the first electrode layer 23 can reflect light irradiated thereon into the photodiode regardless of whether the incident light is an oblique light or a vertical light, reducing loss of light.

In one exemplary embodiment, the orthographic projection of the photodiode on the substrate base plate is within the range of the orthographic projection of the groove bottom surface on the substrate base plate. Thus, in the groove 211, the side surface of the first electrode layer 23 may be completely exposed to the incident light, and the light reflection may be performed more sufficiently using the side surface of the first electrode layer 23.

In an exemplary embodiment, as shown in fig. 2, the flat panel detector further comprises a second electrode layer 25 arranged on a side of the photodiode 24 facing away from the substrate base plate. The second electrode layer 25 is located on the surface of the photodiode 24 on the side facing away from the substrate base plate.

In an exemplary embodiment, as shown in fig. 2, the flat panel detector further includes a third insulating layer 26 disposed on a side of the second electrode layer 25 facing away from the substrate, and the third insulating layer 26 is opened with a fourth via hole exposing the second electrode layer 25. A second flat layer 27 is disposed on a side of the third insulating layer 26 facing away from the substrate base plate, and a fifth via hole for exposing the second electrode layer 25 is opened at the fourth via hole of the second flat layer 27. The second planarization layer 27 may be an organic planarization layer. A fourth insulating layer 28 is disposed on a side of the second planar layer 27 away from the substrate base plate, and a sixth via hole for exposing the second electrode layer 25 is opened at the fifth via hole of the fourth insulating layer 28. A metal lap joint layer 29 is arranged on the side of the fourth insulating layer 28 facing away from the substrate base plate, and the metal lap joint layer 29 is electrically connected with the second electrode layer 25 through a sixth via hole. The flat panel detector further comprises a fifth insulating layer 30 arranged on a side of the metal strap layer 29 facing away from the substrate 11, the fifth insulating layer 30 covering the entire upper surface of the fourth insulating layer 28.

The technical solution of the embodiment of the present application is described in detail below by a method for manufacturing a flat panel detector. It is to be understood that "patterning" in this embodiment includes processes of coating photoresist, mask exposure, development, etching, stripping photoresist, etc. when the material to be patterned is an inorganic material or a metal, and includes processes of mask exposure, development, etc. when the material to be patterned is an organic material, and evaporation, deposition, coating, etc. in this embodiment are well-established preparation processes in the related art. In the description of the present embodiment, it is to be understood that "thin film" refers to a layer of a material deposited or coated on a substrate. The "thin film" may also be referred to as a "layer" if it does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process during the entire fabrication process, it is referred to as "thin film" before the patterning process and "layer" after the patterning process. The "layer" after the patterning process includes at least one "pattern".

A base substrate 10 is provided. Fig. 3a is a schematic structural diagram of a flat probe after a substrate base plate is formed. As shown in fig. 3a, the base substrate 10 comprises a base 11, a thin film transistor arranged on the base 11, and a first insulating layer 16 arranged on a side of the thin film transistor facing away from the base 11. The first insulating layer 16 defines a first via 161 exposing the source electrode 152. The first insulating layer 16 may be a silicon nitride film or a silicon oxide film, or the first passivation layer 16 may be a multilayer film in which a silicon nitride film and a silicon oxide film are stacked. The first via 161 is formed on the first passivation layer 16 through a patterning process. The substrate base 10 may be formed using techniques conventional in the art and will not be described in detail herein.

A first flat layer 21 is formed on the substrate base plate 10, a second via hole 212 exposing the source electrode 152 is opened in the first via hole 161 of the first flat layer 21, and a groove 211 is formed on one side of the first flat layer 21 away from the substrate base plate. This step may include: coating a first flat film on the side of the first insulating layer 16 facing away from the substrate 11; the first flat film is exposed and developed by using a Halftone Mask (Halftone Mask), a complete exposure region is formed at the first via hole position to form a second via hole 212 exposing the source electrode 152, and a partial exposure region is formed at the groove position to form a groove 211, as shown in fig. 3b, where fig. 3b is a schematic structural view after a first flat layer is formed in the flat detector. Wherein the material of the first flat film comprises photosensitive organic resin, and the thickness of the first flat film is h1 and is 3-5 μm. At the groove 211, the distance h2 between the bottom edge of the groove 211 and the side of the first flat layer 21 facing the substrate 11 is 1.5 μm to 2.5 μm. The side of the groove 211 departing from the substrate base plate is open, and the open angle theta between the side wall and the bottom wall of the groove is larger than or equal to 90 degrees. In particular implementations, θ may be 90 °, 120 °, 135 °, or 150 °.

A second insulating layer 22 and a first electrode layer 23 are formed in this order on the side of the first planar layer 21 facing away from the base substrate 10. The method comprises the following steps: (1) depositing a second insulating film on the side of the first flat layer 21 away from the substrate base plate 10; the second insulating film is patterned to form a third via hole exposing the source electrode 152 at the second via hole position, thereby forming the second insulating layer 22. (2) Depositing a first metal film and a second metal film in sequence on the side of the second insulating layer 22 away from the substrate; patterning the first metal film and the second metal film to form a first electrode layer 23 including a first sub-film layer and a second sub-film layer which are stacked, wherein the first sub-film layer is located on one side of the second insulating layer 22, which is far away from the substrate base plate, and the second sub-film layer is located on one side of the first sub-film layer, which is far away from the substrate base plate. The first electrode layer 23 covers the groove 211, and the first electrode layer 23 is electrically connected to the source electrode 152 through the third via hole, as shown in fig. 3c, fig. 3c is a schematic structural view after the first electrode layer is formed in the flat detector. The second insulating film may be a silicon nitride film or a silicon oxide film, or the second insulating film is a multilayer film formed by overlapping a silicon nitride film and a silicon oxide film. The first sub-film layer is made of titanium, and the second sub-film layer is made of aluminum. The orthographic projection of the first electrode layer 23 on the substrate 11 covers the orthographic projection of the active layer 14 on the substrate 11. In fig. 3c, only the composite film layer of the first and second sub-film layers is illustrated, and the first and second sub-film layers are not illustrated separately.

A photodiode 24 is formed in the recess 211 on the side of the first electrode layer 23 facing away from the substrate base plate. This step may include: depositing an N-type amorphous silicon thin film, an intrinsic amorphous silicon thin film and a P-type amorphous silicon thin film on one side of the first electrode layer 23, which is far away from the substrate; the N-type amorphous silicon thin film, the intrinsic amorphous silicon thin film and the P-type amorphous silicon thin film are processed by a patterning process to form a photodiode 24 located in the groove 211, wherein the photodiode 24 comprises an N-type amorphous silicon layer, an intrinsic amorphous silicon layer and a P-type amorphous silicon layer which are sequentially stacked, as shown in fig. 3d, and fig. 3d is a schematic structural diagram of a flat panel detector after a photodiode is formed. Wherein the photodiode 24 has a thickness of 2 to 5 μm. The thickness of the photodiode is the dimension of the photodiode in the direction perpendicular to the substrate 11.

A second electrode layer 25 and a third insulating layer 26 are formed in this order on the side of the photodiode 24 facing away from the substrate, the second electrode layer 25 being located on the surface of the photodiode 24 facing away from the substrate. This step may include: depositing a second electrode film on the side of the photodiode 24, which is far away from the substrate, patterning the second electrode film to form a second electrode layer 25 on the surface of the photodiode 24, which is far away from the substrate; depositing a third insulating film on the side of the second electrode layer 25 away from the substrate, patterning the third insulating film to form a fourth via 261 on the second electrode layer 25, thereby forming a third insulating layer 26, as shown in fig. 3e, where fig. 3e is a schematic structural diagram of the flat panel detector after the third insulating layer is formed. The third insulating film may be a silicon nitride film or a silicon oxide film, or the third insulating film is a multilayer film formed by overlapping a silicon nitride film and a silicon oxide film.

A second planar layer 27, a fourth insulating layer 28, a metal lap layer 29 and a fifth insulating layer 30 are formed in this order on the side of the third insulating layer 26 facing away from the substrate base, as shown in fig. 2. The second planarization layer 27 is provided with a fifth via hole at the fourth via hole position for exposing the second electrode layer 25. The fourth insulating layer 28 is provided with a sixth via hole at the fifth via hole position for exposing the second electrode layer 25. The metal strap layer 29 is electrically connected to the second electrode layer 25 through a sixth via. The fifth insulating layer 30 covers the entire upper surface of the fourth insulating layer 28. The second planarization layer 27, the fourth insulation layer 28, the metal strap layer 29 and the fifth insulation layer 30 may be formed by conventional techniques in the art, and will not be described herein.

In one exemplary embodiment, the flat panel detector includes a plurality of detection cells arranged in an array, each detection cell including a thin film transistor and an amorphous silicon photodiode. The flat panel detector further comprises an X-ray conversion layer on the side of the metal overlap layer 29 facing away from the substrate. The X-ray conversion layer is configured to convert external X-rays into visible light. The visible light emitted from the X-ray conversion layer is irradiated onto the photodiode. Light irradiated on the surface of the first electrode layer in the groove is reflected by the first electrode layer to enter the photodiode, so that the visible light absorption rate of the photodiode is improved, and the detection sensitivity of the flat panel detector is improved. The flat panel detector provided by the embodiment of the application is used in the medical field, can reduce the X-ray radiation dose absorbed by a patient, and also protects medical staff.

In the description of the embodiments of the present invention, it should be understood that the terms "inside", "outside", "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

In the description of the embodiments of the present invention, it should be noted that the terms "connected" and "contacting" are used broadly and can be, for example, mechanical or electrical connections unless explicitly stated or limited otherwise; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Although the embodiments of the present invention have been described above, the description is only for the convenience of understanding the present invention, and the present invention is not limited thereto. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A flat panel detector, comprising:

a substrate base plate;

2. The flat panel detector according to claim 1, wherein the material of the first electrode layer comprises at least one of aluminum and titanium.

3. The flat panel detector according to claim 1, wherein the substrate comprises a thin film transistor, the active layer of the thin film transistor comprises indium gallium zinc oxide,

4. The flat panel detector according to claim 1, wherein the first planarization layer has a thickness of 3 μm to 5 μm, a distance between a bottom side of the groove and a side of the first planarization layer facing the substrate base plate is 1.5 μm to 2.5 μm, and the thickness is a dimension in a direction perpendicular to the substrate base plate.

5. The flat panel detector according to claim 1, wherein an opening angle between the side wall and the bottom wall of the recess is greater than or equal to 90 °.

6. The flat panel detector according to claim 1, wherein an orthographic projection of the photodiode on the substrate base is within an orthographic projection range of the groove bottom surface on the substrate base.

7. The flat panel detector according to claim 1, wherein the photodiode is an amorphous silicon photodiode, and the thickness of the photodiode in a direction perpendicular to the substrate base plate is 2 μm to 5 μm.

8. The flat panel detector according to any one of claims 1 to 7, wherein the first electrode layer is electrically connected to a source electrode or a drain electrode of the thin film transistor of the substrate base through a via hole penetrating through the first flat layer.

9. The flat panel detector according to claim 8, wherein an orthographic projection of the first electrode layer on the substrate base plate covers an orthographic projection of the active layer of the thin film transistor on the substrate base plate.

10. The flat panel detector according to claim 8, further comprising a second insulating layer disposed between the first planarization layer and the first electrode layer, wherein the second insulating layer defines a via hole for exposing a source electrode or a drain electrode of the thin film transistor.

11. The flat panel detector according to claim 8, further comprising a second electrode layer on a surface of the photodiode on a side facing away from the substrate base, the flat panel detector further comprising a second flat layer and a metal bridging layer sequentially disposed on a side of the second electrode layer facing away from the substrate base, the metal bridging layer being electrically connected to the second electrode layer through a via hole penetrating the second flat layer, the flat panel detector further comprising an X-ray conversion layer disposed on a side of the metal bridging layer facing away from the substrate base, the X-ray conversion layer being configured to convert X-rays irradiated onto the X-ray conversion layer into visible light.