CN210956664U

CN210956664U - Packaging device

Info

Publication number: CN210956664U
Application number: CN201922041673.2U
Authority: CN
Inventors: 李仕俊; 赵瑞华; 常青松; 徐达; 杨阳阳; 王志会; 霍现荣; 冯涛; 高长征; 马海阔; 王会从
Original assignee: CETC 13 Research Institute
Current assignee: CETC 13 Research Institute
Priority date: 2019-11-22
Filing date: 2019-11-22
Publication date: 2020-07-07
Anticipated expiration: 2029-11-22

Abstract

The utility model discloses a package device, include: the packaging shell adopts a ceramic substrate as a packaging bottom plate, the ceramic substrate is provided with through holes penetrating through the front surface and the back surface of the ceramic substrate, metal is filled in the through holes of the ceramic substrate, and the metal in the through holes is marked as metal columns; the chip is arranged in the packaging shell, and a bonding pad of the chip is connected with the metal column on the ceramic substrate through a bonding wire; and the copper heat-conducting columns are arranged on the back surface of the ceramic substrate, wherein at least a preset number of copper heat-conducting columns are used as input and output pins of the packaging device and are connected with the metal columns. The utility model discloses a set up copper heat conduction post at ceramic substrate's the back, and be equipped with the copper heat conduction post that links to each other with the metal column, the input/output pin of copper heat conduction post as the encapsulation device is higher than the heat conductivity of traditional table type welding dish or solder ball, has improved the heat-sinking capability of encapsulation device.

Description

Packaging device

Technical Field

The utility model relates to a chip package technical field especially relates to a package device.

Background

Ceramic packaging is a common packaging method for radio frequency chips. In order to reduce the thermal resistance of the package, the ceramic package is generally mounted on the PCB motherboard by means of QFN (Quad Flat No-lead package) surface mount. The ceramic package and the PCB mounting mother board have larger thermal mismatch, and the heat dissipation condition of the device needs to be considered during mounting.

The existing heat dissipation methods mainly include two types, and for a surface-mounted ceramic package with a smaller size, the package size is controlled to be smaller than 10 x 10mm in order to prevent package cracking caused by thermal stress. For the surface-mounted ceramic package with larger size, a metal buffer pad is generally welded on the bottom surface of the ceramic package at high temperature, or a solder ball or a solder column is implanted to buffer the thermal stress. However, the conventional methods such as solder balls and solder columns still cannot meet the heat dissipation requirement of the high-power device package, so that the high-power device has poor heat dissipation when in use, and normal use is influenced.

SUMMERY OF THE UTILITY MODEL

An embodiment of the utility model provides a packaging device aims at solving the poor problem of heat dissipation ability of present packaging device.

An embodiment of the utility model provides a package device, include:

the packaging shell adopts a ceramic substrate as a packaging bottom plate, the ceramic substrate is provided with through holes penetrating through the front surface and the back surface of the ceramic substrate, metal is filled in the through holes of the ceramic substrate, and the metal in the through holes is marked as metal columns;

the chip is arranged in the packaging shell, and a bonding pad of the chip is connected with the metal column on the ceramic substrate through a bonding wire;

and the copper heat-conducting columns are arranged on the back surface of the ceramic substrate, wherein at least a preset number of copper heat-conducting columns are used as input and output pins of the packaging device and are connected with the metal columns.

In an embodiment of the present application, the package housing includes:

the metal enclosure frame is arranged on the front surface of the ceramic substrate;

the cover plate is welded on the upper surface of the metal enclosure frame; the ceramic substrate, the metal enclosure frame and the cover plate form a hermetic package housing that contains the chip.

In an embodiment of the present application, the packaged device further comprises:

and the solder mask is arranged on the back surface of the ceramic substrate and is positioned in other areas except the area of the copper heat conduction column.

the front seed layer is positioned on the front surface of the ceramic substrate and the inner side wall of the through hole of the ceramic substrate; the first area of the upper surface of the front seed layer is used for preparing the metal enclosure frame, and the second area of the upper surface of the front seed layer is used for arranging a chip;

correspondingly, the through hole of the ceramic substrate with the front seed layer prepared is filled with metal slurry;

the back seed layer is positioned on the back of the ceramic substrate;

correspondingly, the copper heat-conducting column is arranged on the back of the back seed layer.

the front side conductor layer is arranged on the front side seed layer, a first area of the upper surface of the front side conductor layer is used for preparing the metal enclosure frame, a second area of the upper surface of the front side conductor layer is used for arranging a chip, and a third area of the front side conductor layer is used for thickening the metal column;

the back conductor layer is arranged on the back of the back seed layer;

correspondingly, the copper heat conduction column is arranged on the back of the back conductor layer.

In an embodiment of the present application, the metal enclosure includes: a metal enclosure wall;

when the chip is at least two, and need keep apart between the chip, the metal encloses the frame and still includes: and the plurality of chips to be isolated are positioned in different airtight spaces, and the airtight spaces are isolated by the isolation walls.

In the embodiment of the application, the metal column connected with the bonding pad of the chip is marked as a conducting column, and a circle of signal shielding structure formed by the metal column is further arranged on the periphery of the conducting column.

and the radiating fins are arranged on the front surface of the cover plate.

In the embodiment of the application, a cover plate through hole is formed in the cover plate, the cover plate through hole penetrates through the upper surface and the lower surface of the cover plate, metal is filled in the cover plate through hole, and the metal in the cover plate through hole is marked as a cover plate metal column;

correspondingly, the packaging device further comprises:

the lower surface of the planar antenna is attached to the upper surface of the cover plate, the planar antenna is connected with one cover plate metal column, and the cover plate metal column connected with the planar antenna is connected with the chip through a connecting structure.

In an embodiment of the application, the connection structure is a spring post.

The utility model discloses a set up copper heat conduction post at ceramic substrate's the back, and be equipped with the copper heat conduction post that links to each other with the metal column, the input/output pin of copper heat conduction post as the encapsulation device is higher than the heat conductivity of traditional table type welding dish or solder ball, has improved the heat-sinking capability of encapsulation device.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 is a schematic structural view of a cross section of a package device provided with a through hole on a ceramic substrate according to an embodiment of the present invention;

fig. 2 is a schematic top view of a ceramic substrate with a through hole according to an embodiment of the present invention;

fig. 3 is a schematic cross-sectional structure diagram after depositing a front seed layer and a back seed layer according to an embodiment of the present invention;

fig. 4 is a schematic cross-sectional structure diagram after a second photoresist layer is formed according to an embodiment of the present invention;

fig. 5 is a schematic cross-sectional structure diagram after manufacturing a front conductor layer and a back conductor layer according to an embodiment of the present invention;

fig. 6 is a schematic cross-sectional structure diagram after the first photoresist layer is formed according to an embodiment of the present invention;

fig. 7 is a schematic cross-sectional view of the first photoresist layer thinned at the position of fabricating the copper heat-conducting pillar according to an embodiment of the present invention;

fig. 8 is a schematic cross-sectional view of the first and second photoresist layers after being removed according to an embodiment of the present invention;

fig. 9 is a schematic cross-sectional structure view of a metal enclosure frame according to an embodiment of the present invention;

fig. 10 is a schematic top view of a metal enclosure according to an embodiment of the present invention;

fig. 11 is a schematic cross-sectional structure diagram after a cover plate is manufactured and a chip is mounted according to an embodiment of the present invention;

fig. 12 is a schematic cross-sectional structure view after the heat dissipation fins are manufactured according to an embodiment of the present invention.

Wherein: 1. a ceramic substrate; 2. a through hole; 3. a front seed layer; 4. a second photoresist layer; 5. a metal post; 6. a front side conductor layer; 7. a back side conductor layer; 8. a first photoresist layer; 9. a copper heat-conducting post; 10. a metal enclosure wall; 11. a chip; 12. a cover plate; 13. a solder resist layer; 14. a partition wall; 15. a heat dissipating fin; 16. a back side seed layer.

Detailed Description

In order to make the technical solution better understood by those skilled in the art, the technical solution in the embodiment of the present invention will be clearly described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is a part of the embodiment of the present invention, and not a whole embodiment. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present disclosure without any creative effort shall fall within the protection scope of the present disclosure.

The terms "include" and any other variations in the description and claims of this document and the above-described figures, mean "including but not limited to", and are intended to cover non-exclusive inclusions. Furthermore, the terms "first" and "second," etc. are used to distinguish between different objects and are not used to describe a particular order.

The following detailed description of implementations of the present invention is provided in conjunction with the accompanying drawings:

fig. 1 to 12 illustrate a package device provided by an embodiment of the present invention, and for convenience of illustration, only the parts related to the embodiment of the present invention are shown, and detailed descriptions are as follows:

as shown in fig. 10-11, an embodiment of the present invention provides a packaged device, including:

the packaging shell adopts a ceramic substrate 1 as a packaging bottom plate, the ceramic substrate 1 is provided with a through hole 2 penetrating through the front surface of the ceramic substrate 1 and the back surface of the ceramic substrate 1, metal is filled in the through hole 2 of the ceramic substrate 1, and metal in the through hole 2 is marked as a metal column 5.

In the present embodiment, the package housing is a hermetic package structure of the packaged chip 11. The ceramic substrate 1 is a pre-sintered ceramic substrate 1, and may be, for example, alumina ceramic, aluminum nitride ceramic, quartz, or the like. The metal filled in the via hole 2 of the ceramic substrate 1 may be copper. The through holes of the ceramic substrate can be filled with metal by adopting a metal slurry filling mode, and if the through holes are internally provided with the front seed layer, the through holes can also be filled by an electroplating mode.

In this embodiment, when the through hole 2 is prepared on the pre-sintered ceramic substrate 1, a picosecond cold laser machining drilling may be used, and the machined through hole 2 penetrates through the front surface and the back surface of the ceramic substrate 1. The through hole 2 prepared in the way has smooth hole wall and high verticality, the difference value of the hole diameters of the front surface and the back surface of the ceramic substrate 1 is less than 5%, the metal slurry is injected into the through hole 2 in the subsequent process to be used as a signal transmission line, and the transmission loss can be reduced after the metal slurry is injected into the through hole 2 prepared in the way. The diameter of the through-hole 2 can be selected with reference to the following constraints: the ratio of the thickness of the ceramic substrate 1 to the diameter of the through hole 2 is 3:1 to 4:1, and the diameter of the through hole 2 may be set to 70-125 μm according to the thickness of the ceramic substrate 1 at the time of actual packaging.

In this embodiment, the metal posts 5 connected to the bonding pads of the chip 11 are marked as conducting posts, and a circle of signal shielding structures formed by the metal posts 5 is further disposed on the periphery of the conducting posts. Since the conductive via needs to transmit a signal, a signal shielding structure needs to be provided for the conductive via. The signal shielding structure in the present application may be configured as follows: when the through hole 2 corresponding to the conducting column is prepared, a circle of through hole 2 is prepared at the periphery of the through hole 2, metal slurry is injected into the circle of through hole 2 to form a metal column 5, and the metal column 5 surrounding the conducting column can form a signal shielding structure.

By adopting the mode, the signal shielding structure does not need to be additionally prepared, and the conducting column is manufactured together when being prepared, so that the process cost is saved.

Metal is injected into the through-hole 2 of the ceramic substrate 1 to form a metal post 5 penetrating the upper and lower surfaces of the ceramic substrate 1. Because the hermetic package requires that the package housing to be prepared is hermetic, after the metal is injected into the through hole 2 of the ceramic substrate 1, the metal is required to be accumulated around the through hole 2 and integrated with the metal layer on the surface of the ceramic, so that the ceramic substrate 1 is hermetic as the bottom plate of the package housing. And the chip 11 is installed inside the packaging shell, and a bonding pad of the chip 11 is connected with the metal column 5 on the ceramic substrate 1 through a bonding wire.

In this embodiment, the chip 11 needs to be packaged inside the hermetic package housing, the chip 11 may be mounted inside the metal frame on the ceramic substrate 1 by surface mounting, and the chip 11 needs to be connected to the metal in the through hole 2 of the ceramic substrate 1 by a bonding wire.

In this embodiment, the chip 11 may be a radio frequency chip 11. The metal column 5 connected with the bonding pad of the chip 11 is marked as a conduction column, and a circle of signal shielding structure formed by the metal column 5 is further arranged on the periphery of the conduction column. The signal shielding structure may be a coaxial-like signal shielding structure.

Since the conductive via needs to transmit a signal, a signal shielding structure needs to be provided for the conductive via. The signal shielding structure in the present application may be configured as follows: when the through hole 2 corresponding to the conducting post is prepared, a circle of through hole 2 is prepared at the periphery of the through hole 2, metal is also injected into the circle of through hole 2 to form a metal post 5, and the metal post 5 surrounding the conducting post can form a signal shielding structure.

And the copper heat-conducting columns 9 are arranged on the back surface of the ceramic substrate 1, wherein at least a preset number of copper heat-conducting columns 9 are used as input and output pins of the packaging device and are connected with the metal columns 5.

In the present embodiment, the copper heat-conducting pillars 9 on the back surface of the ceramic substrate 1 satisfy the following constraint conditions: the height of the copper heat-conducting column 9 is 200 and 1000 microns, and the precision of the copper heat-conducting column 9 is +/-5 microns.

In this embodiment, the copper heat-conducting pillar 9 is prepared by the following steps: firstly, coating a first photoresist layer 8 on the back surface of a ceramic substrate 1, photoetching a back surface seed layer 16 for preparing a copper heat conduction column 9 on the first photoresist layer 8, and depositing copper on the back surface seed layer again; finally, the first photoresist layer is stripped to obtain the copper heat-conducting column 9.

The material of the first photoresist layer 8 can be a high-viscosity photoresist or a high-resolution photosensitive dry film, the thickness of the first photoresist layer 8 is larger than 15 μm, and the line resolution is smaller than 10 μm.

The embodiment of the utility model provides an in, can have partly copper heat conduction post 9 direct with ceramic substrate 1 links to each other, and the copper heat conduction post 9 that is connected with ceramic substrate 1 can be with the heat effluvium on the ceramic substrate 1 on the one hand, and on the other hand can play the supporting role to holistic encapsulation shell, and is more stable when making encapsulation shell link to each other with other structures. The copper heat-conducting column 9 connected with the metal column 5 serves as a packaging I/O leading-out end and can serve as a heat dissipation channel to help a packaging device dissipate heat, and on the other hand, the heat stress of the packaging device and a PCB mounting mother board can be buffered, so that the cracking caused by thermal mismatch when the packaging device is connected with the PCB mounting mother board is avoided. Because adopted and injected the metal in through-hole 2 after preparing through-hole 2 on ceramic substrate 1, the utility model discloses inject the metal into earlier sintering ceramic substrate 1 back, metal thick liquids and ceramic substrate 1 can not sinter simultaneously, can not cause the position of through-hole 2 to change when the metal thick liquids solidification to the uniformity of chip 11 encapsulation has been improved.

As shown in fig. 11, in an embodiment of the present invention, the package housing further includes:

and the metal enclosure frame is arranged on the front surface of the ceramic substrate 1.

In this embodiment, the metal frame is used as a sidewall of the package housing, and the metal frame may be made of copper. And a grounding through hole 2 is formed in the corresponding ceramic substrate 1 below the metal enclosure frame, and metal slurry is filled in the grounding through hole 2. The height of the metal enclosure frame can be 200-1000 μm.

In this embodiment, the metal enclosure frame is used as a sidewall of a packaged device, and when the metal enclosure frame is prepared, the metal enclosure frame prepared in advance may be reinforced on the ceramic substrate 1, or may be formed by a semiconductor process: for example, the photoresist at the position of the metal frame reserved on the ceramic substrate 1 is removed by photolithography, the photoresist is left at other areas of the ceramic substrate 1, and then the metal frame is prepared at the position of the metal frame reserved on the ceramic substrate 1 by electroplating. Of course, in practical application, the metal enclosure frame can be prepared in other ways. The metal enclosure frame directly grows on the ceramic substrate 1, the height of the metal enclosure frame is controllable, the height of the metal enclosure frame is accurately matched with the frequency of the chip 11, the spatial coupling degree is adjustable, and the radio frequency characteristic of the chip 11 is improved.

The cover plate 12 is welded on the upper surface of the metal enclosure frame; the ceramic substrate 1, the metal enclosure and the cover plate 12 form a hermetic package housing the chip 11.

In this embodiment, the cover plate 12 may be made of metal.

In this embodiment, in order to ensure the air tightness of the package casing, the cover plate 12 may be welded to the metal enclosure frame by parallel seam welding or laser welding, and the material of the cover plate 12 may be a metal material. The ceramic substrate 1, the metal enclosure frame and the cover plate 12 form an airtight packaging structure, and the chip 11 is located inside the airtight packaging structure.

As shown in fig. 10, in an embodiment of the present invention, the metal enclosure frame includes: a metal peripheral wall 10;

when the number of the chips 11 to be packaged is at least two and the chips 11 to be packaged need to be isolated from each other, the metal enclosure frame further includes: and a plurality of chips 11 to be isolated are positioned in different airtight spaces by the isolation wall 14, and the airtight spaces are isolated by the isolation wall 14.

In this embodiment, the chips 11 are separated by the partition wall 14, so that the chips 11 do not interfere with each other. The thickness of the partition walls 14 may be between 150-200 μm, the height of the partition walls being the same as the height of the metal peripheral walls. The partition wall 14 may be made of a metal material, such as a copper material.

As shown in fig. 11, in an embodiment of the present invention, the package device further includes:

and a solder resist layer 13 provided on the back surface of the ceramic substrate 1 in a region other than the region of the copper heat conductive post 9.

In the present embodiment, providing the solder resist layer 13 on the outer mounting surface on the back surface of the ceramic substrate 1 can improve the reliability and environmental resistance of the packaged device.

As shown in fig. 3 to 11, in an embodiment of the present invention, the package device further includes:

the front seed layer 3 is positioned on the front surface of the ceramic substrate 1 and the inner side wall of the through hole 2 of the ceramic substrate 1; a first area of the upper surface of the front-side seed layer 3 is used for preparing the metal enclosure frame, and a second area of the upper surface of the front-side seed layer 3 is used for arranging a chip 11;

correspondingly, the through holes 2 of the ceramic substrate 1 with the front seed layer 3 prepared are filled with metal;

a back seed layer 16 located on the back of the ceramic substrate 1;

correspondingly, copper heat-conducting pillars 9 are provided on the backside of the backside seed layer 16.

In this embodiment, the front seed layer 3 is deposited on the front surface of the ceramic substrate 1 by physical vapor deposition or chemical vapor deposition. The front seed layer 3 and the back seed layer 16 can be both made of Ti or copper, the thickness can be 50nm-5000nm, and other thicknesses can be selected according to specific needs.

As shown in fig. 5 to 11, in an embodiment of the present invention, the package device further includes:

the positive conductor layer 6 sets up on the positive seed layer 3, wherein, the first region of the upper surface of positive conductor layer 6 is used for preparing the frame is enclosed to the metal, the second region of the upper surface of positive conductor layer 6 is used for setting up chip 11, the third region of positive conductor layer 6 is used for thickening metal post 5.

A back side conductor layer 7 disposed under the back side seed layer 16;

correspondingly, copper heat-conducting pillars 9 are provided on the back side of the back conductor layer 7.

In the present embodiment, a front-side conductor layer 6 is prepared on the front-side seed layer 3 by an electrochemical deposition method. The thickness of the front conductor layer 6 and the back conductor layer 7 can be between 15-20 μm, and the front conductor layer on the surface is prepared on the metal column to realize air tightness. The material of the front conductor layer 6 and the back conductor layer 7 may be copper.

In the present embodiment, the number of the copper heat-conducting pillars 9 disposed under the back conductor layer 7 in one area may be one or two or more.

As shown in fig. 12, in the embodiment of the present invention, the front surface of the cover plate 12 may be further provided with heat dissipation fins 15.

In the present embodiment, the heat dissipation fins 15 are directly formed on the cover plate 12, which is beneficial to heat dissipation of the chip 11. When the cover plate 12 is provided with the heat dissipation fins 15, the bottom of the chip 11 is connected with the metal enclosure frame, and heat is transferred upwards to the heat dissipation fins 15 through the metal enclosure frame.

The utility model discloses an in the embodiment, the front of apron 12 can also be equipped with the antenna, is equipped with the apron through-hole on the apron 12, and the metal paste packs in the apron through-hole, and the metal paste in the apron through-hole is marked as the apron metal column. The antenna is connected with a cover plate metal column in a cover plate through hole. The lower end of the cover plate metal column is connected with the first end of the spring column, and the second end of the spring column is connected with the chip 11. The spring column is made in the metal surrounding frame. The second end of the spring column is connected with the chip 11 or the metal seed layer or the surface conductor layer under the chip 11 by welding. The first end of the spring post is snap-fitted to the cover plate 12.

In the present embodiment, the antenna is directly formed on the cover 12, and the lower surface of the antenna is attached to the upper surface of the cover 12. To avoid the radiation effect of the antenna on the chip 11, a shielding layer is provided on the back side of the cover plate 12.

In the embodiment of the present invention, the method further comprises:

and the coupling structure is arranged on the back surface of the cover plate 12 and is positioned above the chip 11 to be coupled.

In the present embodiment, the coupling structure is a planar structure or a stepped structure.

In practice, the coupling structure can be obtained by photolithography, deposition and lift-off, in the same way as the antenna is made above, and will not be described in more detail here.

Fig. 1 to 12 are schematic structural diagrams of a package corresponding to different steps in a process flow for manufacturing a packaged device according to an embodiment of the present application.

First, a through hole 2 is prepared on a ceramic substrate 1, wherein the through hole 2 penetrates through the upper surface and the lower surface of the ceramic substrate 1. The cross-sectional view of the ceramic substrate 1 after the through-hole 2 is formed can be seen in fig. 1, and the plan view of the ceramic substrate 11 after the through-hole 2 is formed can be seen in fig. 2.

Secondly, depositing metal on the front surface of the ceramic substrate 1 and the inner side wall of the through hole 2 to form a front surface seed layer 3, as shown in fig. 3, reserving a metal enclosure frame on the upper surface of the ceramic substrate 1, and preparing the metal enclosure frame on the metal seed layer by an electrochemical deposition method.

In this embodiment, the ceramic substrate 1 and the inside of the via hole 2 are subjected to a cleaning process before the front-side seed layer 3 is deposited. Of course, the thickness of the front-side seed layer 3 may be set and the front-side seed layer 3 may be set in other ways as needed.

In this embodiment, a position for disposing the chip 11 may be reserved on the front-side seed layer 3. The chip 11 may be disposed at a position where the chip 11 is reserved.

Thirdly, injecting metal into the through hole 2 of the ceramic substrate 1 provided with the front seed layer 3 by an electroplating method to form a metal column 5 penetrating through the front and the back of the ceramic substrate 1.

In practical application, the front-side conductor layer 6 can be prepared on the front-side seed layer 3 while injecting metal into the through hole 2. As shown with particular reference to fig. 4-8.

The first region of positive conductor layer 6 is used for preparing the metal and encloses the frame, the second region of positive conductor layer 6 is used for the table to paste the chip 11 of treating the encapsulation, the third region of positive conductor layer 6 is used for thickening the conduction post with the peripheral signal shielding structure of conduction post.

If the metal enclosure frame 10 needs to be prepared, correspondingly, preparing the metal enclosure frame on the front-side seed layer 3 by an electrochemical deposition method at the position where the metal enclosure frame is reserved on the upper surface of the ceramic substrate 1 includes:

and preparing a metal enclosure frame on a first area of the front conductor layer 6 by an electrochemical deposition method at a position where the metal enclosure frame is reserved on the upper surface of the ceramic substrate 1.

In the embodiment of the present application, the specific method for preparing the front-side conductor layer 6 and the metal pillar 5 is as follows: coating a second photoresist layer 4 on the front seed layer 3 on the upper surface of the front seed layer 3 in a spin coating or film-covering hot pressing mode, then carrying out standard photoetching processes such as exposure, development and the like on the position, where the front conductor layer 6 needs to be prepared, on the second photoresist layer 4 to obtain metal by an electrochemical deposition method, wherein metal slurry in the through hole 2 needs to be higher than the through hole 2, the metal filled in the through hole 2 is marked as a metal column 5, and finally removing the second photoresist layer 4 to obtain the front conductor layer 6 on the front seed layer 3 and above the metal column 5. The front conductor layer 6 and the metal column 5 are prepared by metal filling by adopting an electroplating method, and pulse plating and direct current plating are combined for use during electroplating, so that the efficiency can be improved under the condition that no cavity exists in copper deposition in the through hole 2.

The material of the second light resistance layer 4 can be high-viscosity photoresist or high-resolution photosensitive dry film, and the second light resistance layer 4 meets the constraint condition: the thickness is larger than 15 microns, the line resolution is smaller than 10 microns, and the inner side wall of the conductor layer through hole 2 obtained after the second photoresist layer 4 is exposed is free of residual glue.

After the front-side conductor layer 6 is prepared, in order to obtain the front-side conductor layer 6 with a preset thickness and also in order to obtain the front-side conductor layer 6 with higher precision and lower surface roughness, thickness reduction and polishing treatment can be performed on the front-side conductor layer 6.

Specifically, the front side conductor layer 6 may be thinned during the manufacturing process, some scratches may be present during the grinding process, and the front side conductor layer 6 needs to be polished to reduce the surface roughness of the front side conductor layer 6. When the second photoresist layer 4 needs to be preserved for manufacturing the metal enclosure frame conveniently, the surface of the second photoresist layer 4 needs to be ground and polished to reduce the surface roughness, and the transmission loss of the packaging device can be reduced when the packaging device is used through the grinding and polishing.

Fourthly, preparing the copper heat-conducting column 9 at a position where the copper heat-conducting column 9 is reserved on the back surface of the ceramic substrate 1, wherein the position where the copper heat-conducting column 9 is reserved comprises: the positions of the metal posts 5 on the back surface of the ceramic substrate 1 are shown in fig. 6-8.

Specifically, when making, can carry out the attenuate to copper heat conduction post 9, at the in-process of grinding treatment, probably can have some mar, still need continue to carry out polishing treatment to copper heat conduction post 9 to reduce copper heat conduction post 9 roughness. The Z-direction height of the conductive column is controlled within + -5 μm after grinding and polishing.

And fifthly, removing the front seed layer 3 except the position corresponding to the front conductor layer 6 on the ceramic substrate 1.

In this embodiment, the method of removing the front seed layer 3 may be a chemical etching method. If the seed layer 3 on the front surface adopts copper, the copper is removed by using acid washing etching liquid; if the front seed layer 3 is made of titanium, the titanium is removed by using an oxide etching liquid.

Of course, in practical applications, if the front-side conductor layer 6 is not fabricated, the front-side seed layer 3 in the region for preparing the metal enclosure frame, the region for surface-mounting the chip 11 to be packaged, and the region other than the region for thickening the conductive via and the signal shielding structure at the periphery of the conductive via may be removed, as shown in fig. 9.

Sixthly, welding the metal enclosing frame to the front conductor layer 6 at the position where the metal enclosing frame is reserved on the upper surface of the ceramic substrate 1, and referring to 9-11.

In this embodiment, during actual manufacturing, the upper surface of the metal enclosure frame may also be thinned, during the grinding process, there may be some scratches, and it is further necessary to continue to perform polishing process on the upper surface of the metal enclosure frame to reduce the surface roughness. In this embodiment, the spatial coupling of the hermetically packaged device can be reduced by precisely controlling the height of the metal enclosure and the inner isolation wall 14 through electroplating thickening and CMP thinning processes.

Seventhly, after preparing the copper heat conduction column 9 at the position where the copper heat conduction column 9 is reserved on the back surface of the ceramic substrate 1, in order to improve the tolerance of the airtight packaging device to the environment, a nickel gold chemical plating mode is adopted, and a solder mask layer 13 is prepared on the back surface of the ceramic substrate 1 and on other areas except the position where the copper heat conduction column 9 is reserved.

Eighthly, mounting the chip 11 to be packaged inside the metal enclosure frame on the ceramic substrate 1, and leading out the bonding pad of the chip 11 to be packaged and the metal column 5 on the ceramic substrate 1 through a bonding wire, as shown in fig. 11.

In the embodiment of the present application, the metal enclosure frame includes a metal enclosure wall 10; of course, when there are at least two chips 11 to be packaged and the chips 11 to be packaged need to be isolated from each other, the metal enclosure frame further includes: and a plurality of chips 11 to be isolated are positioned in different airtight spaces by the isolation wall 14, and the airtight spaces are isolated by the isolation wall 14. The chips 11 are separated by the partition wall 14, so that the chips 11 do not interfere with each other.

Ninthly, sealing the cover plate 12 on the upper surface of the metal enclosure frame by welding to form a hermetic package structure, as shown in fig. 11.

As shown in fig. 12, in practical applications, it is of course possible to fabricate heat dissipation fins 15 on the front surface of the cover plate 12 before the cover plate 12 is sealed on the upper surface of the metal enclosure.

Specifically, the method for manufacturing the heat dissipation fin 15 includes manufacturing a third photoresist layer on the front surface of the cover plate 12 by spin coating or film-coating hot pressing, etching a through hole for manufacturing the heat dissipation fin 15 on the third photoresist layer, depositing metal on the position of the through hole for manufacturing the heat dissipation fin 15 etched on the third photoresist layer, and removing the third photoresist layer to obtain the heat dissipation fin 15.

In a specific application, when the heat dissipation fins 15 are manufactured, the bottom of the chip 11 is connected with the metal enclosure frame, if the chip 11 is mounted on the front seed layer, the front seed layer under the chip 11 is connected with the metal enclosure frame, heat is transferred to the metal enclosure frame through the front seed layer, and the heat is upwards transferred to the heat dissipation fins 15 through the metal enclosure frame. If the chip 11 is fabricated on the front side conductor layer, the front side conductor layer and the front side seed layer under the chip 11 may be connected to the metal enclosure frame, or the front side seed layer may be connected to the metal enclosure frame.

In the embodiment of the present invention, before the cover plate 12 is sealed on the upper surface of the metal enclosure frame, an antenna can be further fabricated on the front surface of the cover plate 12.

Specifically, the method for manufacturing the antenna includes the steps of manufacturing a fourth photoresist layer on the front surface of the cover plate 12 in a spin coating or film-coating hot pressing manner, etching a pattern for manufacturing the antenna on the fourth photoresist layer, depositing metal on the position of the pattern for manufacturing the antenna etched on the fourth photoresist layer, and removing the fourth photoresist layer to obtain the antenna.

In a specific application, when the antenna is manufactured, a picosecond cold laser machining drilling can be adopted on the cover plate 12 to machine a cover plate through hole, metal is deposited in the cover plate through hole, metal slurry in the cover plate through hole is recorded as a cover plate metal column, and the antenna is connected with the cover plate metal column in one cover plate through hole.

Correspondingly, a spring column is also arranged in the metal enclosure frame, and the second end of the spring column is connected with the chip 11 or the front seed layer or the front conductor layer below the chip 11 through welding. The first end of the spring post is fastened to the cover plate 12 and connected to the lower end of the cover plate metal post connected to the antenna.

In a specific application, in order to avoid radiation of the antenna to the chip 11, a shielding layer is provided on the back surface of the cover plate 12, and the shielding layer is obtained by depositing a shielding material, and the shielding layer may be a metal material, such as a copper material. Or a fifth photoresist layer is manufactured on the back surface of the cover plate 12 in a spin coating or film-covering hot pressing mode, a pattern for manufacturing the shielding layer is etched on the fifth photoresist layer by etching the fifth photoresist layer, a shielding material is deposited on the pattern for manufacturing the shielding layer, and finally the shielding layer can be obtained by removing the fifth photoresist layer.

In practical applications, a coupling structure may be further disposed on the back surface of the cover plate 12 above the chip 11, and the coupling structure may be a planar structure or a step structure.

In practical application, the air tightness of the airtight packaging structure can be further verified, and whether the airtight packaging structure is qualified or not is further judged.

Specifically, the hermetic package structure is placed in a leak-tight vessel, which is filled with helium and pressurized at 0.5 Mpa. And after 4 hours, taking out the airtight packaging structure, performing rough detection by adopting a leakage detection liquid soaking method, and if no bubble is generated on the surface of the leakage detection liquid, determining that the airtight packaging structure is qualified, otherwise, determining that the airtight packaging structure is not qualified. And finally, performing fine inspection on the qualified airtight packaging structure by using a helium mass spectrometer, and if the leak detector shows that the helium flow is lower than 1 × 10-9pa.cm < 3 >/s, the airtight packaging structure is qualified, otherwise, the airtight packaging structure is not qualified.

The steps in the first to ninth steps can be deleted or recombined according to actual needs.

It should be noted that, in the above embodiment, the front-side seed layer 3 and the front-side conductor layer 6 are both disposed on the ceramic substrate 1, in practical application, a back-side seed layer 16 may also be disposed on the back side of the ceramic substrate 1, and the copper heat conduction pillars 9 are prepared at positions where the copper heat conduction pillars 9 are reserved under the back-side seed layer 16, and the specific steps are the same as those of the front-side seed layer 3.

The back conductor layer 7 may also be disposed under the back seed layer 16, and the back conductor layer 7 may be obtained by depositing a first lower photoresist layer under the back seed layer 16, and then performing photolithography, deposition and the like on the first lower photoresist layer, and the specific steps are the same as those of the front conductor layer 6. And preparing the copper heat-conducting columns 9 at the positions, reserved under the back conductor layer 7, of the copper heat-conducting columns 9. The back conductor layer covers the lower parts of the ceramic substrate and the metal column at the same time, and a complete coating structure is formed between the ceramic substrate and the metal column, so that the air tightness is ensured.

The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims

1. A packaged device, comprising:

2. The packaged device of claim 1, wherein the package housing comprises:

3. The packaged device of claim 1, wherein the packaged device further comprises:

4. The packaged device of claim 2, wherein the packaged device further comprises:

correspondingly, the through holes of the ceramic substrate with the front seed layer prepared are filled with metal;

the back seed layer is positioned on the back of the ceramic substrate;

5. The packaged device of claim 4, wherein the packaged device further comprises:

the back conductor layer is arranged on the back of the back seed layer;

6. The packaged device of claim 2, wherein the metal enclosure comprises: a metal enclosure wall;

7. The packaged device according to claim 1, wherein the metal posts connected to the bonding pads of the chip are conductive posts, and a signal shielding structure formed by a ring of metal posts is further provided at the periphery of the conductive posts.

8. The packaged device of claim 2, wherein the packaged device further comprises:

and the radiating fins are arranged on the front surface of the cover plate.

9. The package device according to claim 2, wherein a cover plate through hole is formed in the cover plate, the cover plate through hole penetrates through the upper surface and the lower surface of the cover plate, metal is filled in the cover plate through hole, and the metal in the cover plate through hole is marked as a cover plate metal column;

correspondingly, the packaging device further comprises:

10. The packaged device of claim 9, wherein the connection structure is a spring post.