CN210780773U - TDD optimization circuit - Google Patents

TDD optimization circuit Download PDF

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Publication number
CN210780773U
CN210780773U CN201922432208.1U CN201922432208U CN210780773U CN 210780773 U CN210780773 U CN 210780773U CN 201922432208 U CN201922432208 U CN 201922432208U CN 210780773 U CN210780773 U CN 210780773U
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pin
inductor
coupled
output
tdd
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CN201922432208.1U
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曾神
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Shanghai Ruiwei Electronic Technology Co ltd
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Shanghai Ruiwei Electronic Technology Co ltd
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Abstract

The utility model discloses a TDD optimization circuit, which solves the problems of high cost, limited space of a goods of furniture and difficult balance of design cost and performance of the existing TDD circuit, and the technical proposal has the key points that the TDD optimization circuit comprises an integrated SAW filter chip provided with TX and RX double channels, and also comprises an RX input unit, an RX output unit, a TX output unit and a TX input unit; integrated SAW filter chip integration has a plurality of pins, including RX input pin, RX output pin, TX input pin, TX output pin and be used for the ground connection's ground connection pin, the utility model discloses a TDD optimization circuit can satisfy the performance, reduces the cost and saves space simultaneously.

Description

TDD optimization circuit
Technical Field
The utility model relates to a radio frequency field, in particular to TDD optimization circuit.
Background
At the present stage, people have higher and higher experience requirements on the RF terminal equipment, and the RF whole network is already a popular design. On one hand, the whole network communication needs to support a plurality of frequency bands, and the cost is high; on the other hand, the space of the terminal mainboard ornament is limited; the existing design adopts two separate SAW modes, namely one SAW channel is used for passing through a TX channel, and the other SAW channel is used for passing through an RX channel, so that the performance is optimized, but the cost is high, and the space is not saved; in another mode, a single discrete SAW and a SAW integrated in the power amplifier are used for processing, the cost is low, but an impedance line is long, the path loss is large, the performance is poor, and the cost, the space and the performance are difficult to balance.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a TDD optimization circuit can satisfy the performance, reduces the cost and saves space simultaneously.
The above technical purpose of the present invention can be achieved by the following technical solutions:
a TDD optimization circuit comprises an integrated SAW filter chip provided with TX and RX dual channels, an RX input unit externally connected with a switch device, an RX output unit externally connected with a converter, a TX output unit externally connected with the switch device and a TX input unit externally connected with a power amplifier;
the integrated SAW filter chip is integrated with a plurality of pins, and comprises an RX input pin, an RX output pin, a TX input pin, a TX output pin and a grounding pin, wherein the RX input pin is coupled with an RX input unit to transmit a received signal to the integrated SAW filter chip for filtering, the RX output pin is coupled with an RX output unit to output the received signal after filtering, the TX input pin is coupled with the TX input unit to transmit a transmitted signal to the integrated SAW filter chip for filtering, the TX output pin is coupled with the TX output unit to output the transmitted signal after filtering, and the grounding pin is used for grounding.
Preferably, the pins are uniformly and symmetrically arranged on two sides of the integrated SAW filter chip.
Preferably, the RX input unit includes a first inductor coupled between the switching device and the RX input pin, a second inductor having one end coupled to a node between the first inductor and the switching device and the other end grounded, and a third inductor having one end coupled to a node between the first inductor and the RX input pin and the other end grounded.
Preferably, the RX output unit includes a first capacitor coupled between the converter and the RX output pin, a fourth inductor having one end coupled to a node between the first capacitor and the converter and the other end grounded, and a fifth inductor having one end coupled to a node between the first capacitor and the RX output pin and the other end grounded.
Preferably, the TX input unit includes a sixth inductor coupled between the power amplifier and the TX input pin, a seventh inductor having one end coupled to a node between the sixth inductor and the power amplifier and the other end grounded, and an eighth inductor having one end coupled to a node between the sixth inductor and the TX input pin and the other end grounded.
Preferably, the TX output unit includes a second capacitor coupled between the switching device and the TX output pin, a third capacitor having one end coupled to a node between the second capacitor and the switching device and the other end grounded, and a ninth inductor having one end coupled to a node between the second capacitor and the TX output pin and the other end grounded.
To sum up, the utility model discloses following beneficial effect has:
through the integrated SAW filter chip of TX/RX double-channel, can realize RX passageway and TX passageway's signal transmission through a chip, small, the compact mainboard of being convenient for on goods of furniture for display rather than for use and manufacturing cost reduce, can avoid the anti-impedance line setting of long path, reduce the path loss, improve performance.
Drawings
Fig. 1 is a circuit schematic diagram of the optimization circuit.
In the figure: 1. integrating the SAW filter chip; 2. a TX input unit; 3. a TX output unit; 4. an RX input unit; 5. an RX output unit.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
According to one or more embodiments, the utility model discloses a TDD optimization circuit, as shown in fig. 1, including being provided with TX and RX double-channel integrated SAW filter chip 1, still including RX input unit 4 of external switching device, RX output unit 5 of external converter, TX output unit 3 of external switching device and TX input unit 2 of external power amplifier. The integrated SAW filter chip 1 is integrated with a plurality of pins, the number of the pins is set to 8, the pins are respectively 1-8 pins, and the integrated SAW filter chip comprises an RX input pin which is coupled to an RX input unit 4 and used for transmitting a received signal to the integrated SAW filter chip 1 for filtering processing, namely 8 pins, an RX output pin which is coupled to an RX output unit 5 and used for outputting the received signal after the filtering processing, namely 1 pin, a TX input pin which is coupled to a TX input unit 2 and used for transmitting a transmitting signal to the integrated SAW filter chip 1 for filtering processing, namely 4 pins, a TX output pin which is coupled to a TX output unit 3 and used for outputting the transmitting signal after the filtering processing, namely 5 pins, and grounding pins for grounding, comprising pins 2, 3, 6 and 7. The RX input unit 4, the RX output unit 5 and the integrated SAW filter chip 1 form an RX channel; the TX input unit 2, the TX output unit 3 and the integrated SAW filter chip 1 form a TX channel.
All the pins are symmetrically divided into two groups and are respectively positioned on two sides of the integrated SAW filter chip 1, the pins are arranged from the lower right of the integrated SAW filter chip 1 in an anticlockwise sequence, the RX input pin and the RX output pin are symmetrically arranged on two sides of the lower part of the integrated SAW filter chip 1, the TX input pin and the TX output pin are symmetrically arranged on two sides of the upper part of the integrated SAW filter chip 1, and the grounding pins are put in the middle and are centralized and then are subjected to unified grounding treatment. The RX channel and the TX channel are mutually independent, the integration volume is smaller, centralized processing is carried out, a plurality of SAW chips are not needed, the manufacturing cost is reduced, meanwhile, the impedance route can be reduced, the path loss is reduced, and the use performance is improved. The sensitivity of TDD (B40/B41) can reach below-101, and the performance requirement is met.
The RX input unit 4 includes a first inductor coupled between the switching device and the RX input pin, a second inductor having one end coupled to a node between the first inductor and the switching device and the other end grounded, and a third inductor having one end coupled to a node between the first inductor and the RX input pin and the other end grounded. The RX output unit 5 includes a first capacitor coupled between the converter and the RX output pin, a fourth inductor having one end coupled to a node between the first capacitor and the converter and the other end grounded, and a fifth inductor having one end coupled to a node between the first capacitor and the RX output pin and the other end grounded. The TX input unit 2 includes a sixth inductor coupled between the power amplifier and the TX input pin, a seventh inductor having one end coupled to a node of the sixth inductor and the power amplifier and the other end grounded, and an eighth inductor having one end coupled to a node of the sixth inductor and the TX input pin and the other end grounded. The TX output unit 3 includes a second capacitor coupled between the switching device and the TX output pin, a third capacitor having one end coupled to a node between the second capacitor and the switching device and the other end grounded, and a ninth inductor having one end coupled to a node between the second capacitor and the TX output pin and the other end grounded.
The present embodiment is only for explaining the present invention, and it is not limited to the present invention, and those skilled in the art can make modifications to the present embodiment without inventive contribution as required after reading the present specification, but all of them are protected by patent laws within the scope of the claims of the present invention.

Claims (6)

1. A TDD optimization circuit is characterized in that: the integrated SAW filter chip comprises a TX and RX dual-channel integrated SAW filter chip, an RX input unit externally connected with a switch device, an RX output unit externally connected with a converter, a TX output unit externally connected with the switch device and a TX input unit externally connected with a power amplifier;
the integrated SAW filter chip is integrated with a plurality of pins, and comprises an RX input pin, an RX output pin, a TX input pin, a TX output pin and a grounding pin, wherein the RX input pin is coupled with an RX input unit to transmit a received signal to the integrated SAW filter chip for filtering, the RX output pin is coupled with an RX output unit to output the received signal after filtering, the TX input pin is coupled with the TX input unit to transmit a transmitted signal to the integrated SAW filter chip for filtering, the TX output pin is coupled with the TX output unit to output the transmitted signal after filtering, and the grounding pin is used for grounding.
2. The TDD optimization circuit of claim 1, wherein: and the pins are uniformly and symmetrically arranged on two sides of the integrated SAW filter chip.
3. The TDD optimization circuit of claim 2, wherein: the RX input unit comprises a first inductor coupled between the switching device and the RX input pin, a second inductor with one end coupled to a node between the first inductor and the switching device and the other end grounded, and a third inductor with one end coupled to a node between the first inductor and the RX input pin and the other end grounded.
4. The TDD optimization circuit of claim 3, wherein: the RX output unit comprises a first capacitor coupled between the converter and the RX output pin, a fourth inductor with one end coupled to a node of the first capacitor and the converter and the other end grounded, and a fifth inductor with one end coupled to a node of the first capacitor and the RX output pin and the other end grounded.
5. The TDD optimization circuit of claim 4, wherein: the TX input unit comprises a sixth inductor coupled between the power amplifier and the TX input pin, a seventh inductor with one end coupled to a node of the sixth inductor and the power amplifier and the other end grounded, and an eighth inductor with one end coupled to a node of the sixth inductor and the TX input pin and the other end grounded.
6. The TDD optimization circuit of claim 5, wherein: the TX output unit comprises a second capacitor coupled between the switching device and the TX output pin, a third capacitor with one end coupled to a node of the second capacitor and the switching device and the other end grounded, and a ninth inductor with one end coupled to a node of the second capacitor and the TX output pin and the other end grounded.
CN201922432208.1U 2019-12-30 2019-12-30 TDD optimization circuit Active CN210780773U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201922432208.1U CN210780773U (en) 2019-12-30 2019-12-30 TDD optimization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201922432208.1U CN210780773U (en) 2019-12-30 2019-12-30 TDD optimization circuit

Publications (1)

Publication Number Publication Date
CN210780773U true CN210780773U (en) 2020-06-16

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Application Number Title Priority Date Filing Date
CN201922432208.1U Active CN210780773U (en) 2019-12-30 2019-12-30 TDD optimization circuit

Country Status (1)

Country Link
CN (1) CN210780773U (en)

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