CN210724829U - Multi-scroll chaotic circuit - Google Patents
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- CN210724829U CN210724829U CN201821106446.2U CN201821106446U CN210724829U CN 210724829 U CN210724829 U CN 210724829U CN 201821106446 U CN201821106446 U CN 201821106446U CN 210724829 U CN210724829 U CN 210724829U
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Abstract
The utility model discloses a many scrolls chaotic circuit, include: a basic chaotic signal generating circuit N1, a sequence generator N2 for generating a switching control function f (x); the basic chaotic signal generating circuit N1 is provided with an output end x, the output end x is used for outputting chaotic signals in the x direction, the output end x is connected with the input end of a sequence generator N2, and the output end of a sequence generator N2 is connected with the input end of a basic chaotic signal generating circuit N1; the utility model discloses the circuit of creation can reach the scroll of a certain amount, guarantees the secret degree of communication. Meanwhile, the circuit structure is simple, and hardware is easy to realize. The invention can be used in the technical field of chaotic communication.
Description
Technical Field
The utility model relates to a chaos circuit that needs among the chaos secret communication, concretely relates to many scrolls chaos circuit.
Background
How to generate various chaotic circuits and use them in chaotic secure communication is a new research field of nonlinear circuit and system disciplines in recent years, and some related research results are obtained, such as chinese patent application No.: 200410015517.4 discloses a multi-spiral chaotic generator, which is disclosed in the Chinese patent application No.: 200510086603.9 discloses a scroll chaotic signal generator, and the chinese patent application No. 201410136855.7 discloses a method for chaotic encryption of multiple paths of image digital information, but the number of multi-scroll chaotic circuits is small, so there is a limitation in chaotic secure communication.
SUMMERY OF THE UTILITY MODEL
The utility model aims at: the chaotic signal generator is provided, so that hardware of the chaotic signal generator is easier to realize, and the encryption performance is stronger.
The utility model provides a solution of its technical problem is: a multi-scroll chaotic circuit comprising: a basic chaotic signal generating circuit N1, a sequence generator N2 for generating a switching control function f (x); the basic chaotic signal generating circuit N1 is provided with an output end x, the output end x is used for outputting chaotic signals in the x direction, the output end x is connected with the input end of a sequence generator N2, and the output end of a sequence generator N2 is connected with the input end of a basic chaotic signal generating circuit N1; wherein, the mathematical expression of the switching control function f (x) is:
or
Wherein N is more than or equal to 1.
Further, the basic chaotic signal generating circuit N1 includes: operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP 9;
the output end of the operational amplifier OP1 is respectively connected with the negative input ends of the operational amplifiers OP1 and OP2 through resistors;
the output end of the operational amplifier OP2 is respectively connected with the negative input ends of the operational amplifiers OP3 and OP4 through resistors; the output end of the operational amplifier OP2 is connected with the negative input end of the operational amplifier OP2 through a capacitor;
the output end of the operational amplifier OP3 is respectively connected with the negative input ends of the operational amplifiers OP1 and OP3 through resistors, and the output end of the operational amplifier OP3 is connected with the output end x;
the output end of the operational amplifier OP4 is respectively connected with the negative input ends of the operational amplifiers OP4 and OP5 through resistors;
the output end of the operational amplifier OP5 is respectively connected with the negative input ends of the operational amplifiers OP1, OP6 and OP7 through resistors, and the output end of the operational amplifier OP5 is connected with the negative input end of the operational amplifier OP5 through a capacitor;
the output end of the operational amplifier OP6 is connected with the negative input end of the operational amplifier OP6 through a resistor, and the output end of the operational amplifier OP6 is connected with the output end y;
the output end of the operational amplifier OP7 is respectively connected with the negative input ends of the operational amplifiers OP7 and OP8 through resistors;
the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP9 through a resistor, and the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP8 through a capacitor;
the output end of the operational amplifier OP9 is respectively connected with the negative input ends of the operational amplifiers OP4, OP7 and OP9 through resistors, and the output end of the operational amplifier OP9 is connected with the output end z;
the positive input terminals of the operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP9 are grounded.
Further, the sequencer N2 includes: operational amplifiers OP10, OP11, OP12, OP13, OP14, OP15, OP16, OP17, OP18, OP19, OP 20;
the output end of the operational amplifier OP10 is respectively connected with the negative input ends of the operational amplifiers OP10 and OP19 through resistors, and the output end of the operational amplifier OP10 is connected with the ground through a resistor;
the output end of the operational amplifier OP11 is respectively connected with the negative input ends of the operational amplifiers OP11 and OP19 through resistors, and the output end of the operational amplifier OP11 is connected with the ground through a resistor;
the output end of the operational amplifier OP12 is respectively connected with the negative input ends of the operational amplifiers OP12 and OP19 through resistors, and the output end of the operational amplifier OP12 is connected with the ground through a resistor;
the output end of the operational amplifier OP13 is respectively connected with the negative input ends of the operational amplifiers OP13 and OP19 through resistors, and the output end of the operational amplifier OP13 is connected with the ground through a resistor;
the output end of the operational amplifier OP14 is respectively connected with the negative input ends of the operational amplifiers OP14 and OP19 through resistors, and the output end of the operational amplifier OP14 is connected with the ground through a resistor;
the output end of the operational amplifier OP15 is respectively connected with the negative input ends of the operational amplifiers OP15 and OP19 through resistors, and the output end of the operational amplifier OP15 is connected with the ground through a resistor;
the output end of the operational amplifier OP16 is respectively connected with the negative input ends of the operational amplifiers OP16 and OP19 through resistors, and the output end of the operational amplifier OP16 is connected with the ground through a resistor;
the output end of the operational amplifier OP17 is respectively connected with the negative input ends of the operational amplifiers OP17 and OP19 through resistors, and the output end of the operational amplifier OP17 is connected with the ground through a resistor;
the output end of the operational amplifier OP18 is respectively connected with the negative input ends of the operational amplifiers OP18 and OP19 through resistors, and the output end of the operational amplifier OP18 is connected with the ground through a resistor;
the output end of the operational amplifier OP19 is respectively connected with the negative input ends of the operational amplifiers OP19 and OP20 through resistors;
the output end of the operational amplifier OP20 is connected with the negative input end of the operational amplifier OP20 through a resistor; and is connected with the negative input end of an operational amplifier OP1 in the basic chaotic signal generating circuit N1 through a resistor;
the output end x is respectively connected with the negative input ends of operational amplifiers OP10, OP12, OP14, OP16 and OP18 through resistors, the output end x is respectively connected with the positive input ends of the operational amplifiers OP11, OP13, OP15 and OP17, and the output end x is connected with the negative input end of the operational amplifier OP19 through a resistor;
the positive input ends of the operational amplifiers OP10, OP12, OP14, OP16, OP18, OP19 and OP20 are grounded; the negative input terminals of the operational amplifiers OP11, OP13, OP15 and OP17 are connected to ground through resistors, respectively.
Furthermore, the resistors adopted by the basic chaotic signal generating circuit N1 and the sequencer N2 are both precision adjustable resistors.
Further, the sequencer N2 further includes switches S0, S1, S2, S3, S4; the switch S0 is disposed between the output terminal of the operational amplifier OP18 and the negative input terminal of the operational amplifier OP 19; the switch S1 is disposed between the output of the operational amplifiers OP16, OP17 and the negative input of the operational amplifier OP 19; the switch S2 is disposed between the output of the operational amplifiers OP14, OP15 and the negative input of the operational amplifier OP 19; the switch S3 is disposed between the output of the operational amplifiers OP12, OP13 and the negative input of the operational amplifier OP 19; the switch S4 is disposed between the output of the operational amplifiers OP10, OP12 and the negative input of the operational amplifier OP 19.
The utility model has the advantages that: the circuit of the invention can reach a certain amount of scrolls, ensures the secrecy degree of communication, and has simple circuit structure and easy hardware realization.
Drawings
In order to more clearly illustrate the technical solution in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is clear that the described figures represent only some embodiments of the invention, not all embodiments, and that a person skilled in the art can also derive other designs and figures from these figures without inventive effort.
FIG. 1 is a schematic diagram of the electrical connections of the generator of the present invention;
fig. 2 is a schematic circuit connection diagram of the sequencer N2.
Detailed Description
The conception, the specific structure, and the technical effects produced by the present invention will be clearly and completely described below in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the features, and the effects of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and other embodiments obtained by those skilled in the art without inventive labor based on the embodiments of the present invention all belong to the protection scope of the present invention. In addition, all the coupling/connection relationships mentioned herein do not mean that the components are directly connected, but mean that a better coupling structure can be formed by adding or reducing coupling accessories according to specific implementation conditions. All technical characteristics in the invention can be interactively combined on the premise of not conflicting with each other.
Embodiment 1, referring to fig. 1 and 2, a multi-scroll chaotic circuit includes: a basic chaotic signal generating circuit N1, a sequence generator N2 for generating a switching control function f (x); the basic chaotic signal generating circuit N1 is provided with an output end x, an output end y and an output end z, wherein the output end x is used for outputting chaotic signals in the x direction, the output end y is used for outputting chaotic signals in the y direction, the output end z is used for outputting chaotic signals in the z direction, and the output end x is connected with the input end of the sequence generator N2.
The basic chaotic signal generating circuit N1 includes: operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP9, resistors R1-R19 and capacitors C1-C3;
the output end of the operational amplifier OP1 is respectively connected with the negative input ends of the operational amplifiers OP1 and OP2 through resistors R4 and R5;
the output end of the operational amplifier OP2 is respectively connected with the negative input ends of the operational amplifiers OP3 and OP4 through resistors R6 and R8; the output end of the operational amplifier OP2 is connected with the negative input end of the operational amplifier OP2 through a capacitor C1;
the output end of the operational amplifier OP3 is connected with the negative input ends of the operational amplifiers OP1 and OP3 through resistors R1 and R7 respectively, and the output end of the operational amplifier OP3 is connected with the output end x;
the output end of the operational amplifier OP4 is respectively connected with the negative input ends of the operational amplifiers OP4 and OP5 through resistors R10 and R11;
the output end of the operational amplifier OP5 is respectively connected with the negative input ends of operational amplifiers OP1, OP6 and OP7 through resistors R3, R12 and R15; the output end of the operational amplifier OP5 is connected with the negative input end of the operational amplifier OP5 through a capacitor C2;
the output end of the operational amplifier OP6 is connected with the negative input end of the operational amplifier OP6 through a resistor R13, and the output end of the operational amplifier OP6 is connected with the output end y;
the output end of the operational amplifier OP7 is respectively connected with the negative input ends of the operational amplifiers OP7 and OP8 through resistors R16 and R17;
the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP9 through a resistor R18; the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP8 through a capacitor C3;
the output end of the operational amplifier OP9 is respectively connected with the negative input ends of operational amplifiers OP4, OP7 and OP9 through resistors R9, R14 and R19, and the output end of the operational amplifier OP9 is connected with the output end z;
the positive input terminals of the operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP9 are grounded.
The sequencer N2 includes: operational amplifiers OP10, OP11, OP12, OP13, OP14, OP15, OP16, OP17, OP18, OP19 and OP20, resistors R20-R68 and switches S0-S4;
the output end of the operational amplifier OP10 is connected with the negative input end of the operational amplifier OP10 through a resistor R23, the output end of the operational amplifier OP10 is connected with one end of a switch S4 through resistors R22 and R20 in sequence, the other end of the switch S4 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP10 is connected with the ground through resistors R22 and R21 in sequence;
the output end of the operational amplifier OP11 is connected with the negative input end of the operational amplifier OP11 through a resistor R28, the output end of the operational amplifier OP11 is connected with one end of a switch S4 through resistors R27 and R25 in sequence, the other end of the switch S4 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP11 is connected with the ground through resistors R27 and R26 in sequence;
the output end of the operational amplifier OP12 is connected with the negative input end of the operational amplifier OP12 through a resistor R33, the output end of the operational amplifier OP12 is connected with one end of a switch S3 through resistors R32 and R30 in sequence, the other end of the switch S3 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP12 is connected with the ground through resistors R32 and R31 in sequence;
the output end of the operational amplifier OP13 is connected with the negative input end of the operational amplifier OP13 through a resistor R38, the output end of the operational amplifier OP13 is connected with one end of a switch S3 through resistors R37 and R35 in sequence, the other end of the switch S3 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP13 is connected with the ground through resistors R37 and R36 in sequence;
the output end of the operational amplifier OP14 is connected with the negative input end of the operational amplifier OP14 through a resistor R43, the output end of the operational amplifier OP14 is connected with one end of a switch S2 through resistors R42 and R40 in sequence, the other end of the switch S2 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP14 is connected with the ground through resistors R42 and R41 in sequence;
the output end of the operational amplifier OP15 is connected with the negative input end of the operational amplifier OP15 through a resistor R48, the output end of the operational amplifier OP15 is connected with one end of a switch S2 through resistors R47 and R45 in sequence, the other end of the switch S2 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP15 is connected with the ground through resistors R47 and R46 in sequence;
the output end of the operational amplifier OP16 is connected with the negative input end of the operational amplifier OP16 through a resistor R53, the output end of the operational amplifier OP16 is connected with one end of a switch S1 through resistors R52 and R50 in sequence, the other end of the switch S1 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP16 is connected with the ground through resistors R52 and R51 in sequence;
the output end of the operational amplifier OP17 is connected with the negative input end of the operational amplifier OP17 through a resistor R58, the output end of the operational amplifier OP17 is connected with one end of a switch S1 through resistors R57 and R55 in sequence, the other end of the switch S1 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP17 is connected with the ground through resistors R57 and R56 in sequence;
the output end of the operational amplifier OP18 is connected with the negative input end of the operational amplifier OP18 through a resistor R63, the output end of the operational amplifier OP18 is connected with one end of a switch S0 through resistors R62 and R60 in sequence, the other end of the switch S0 is connected with the negative input end of the operational amplifier OP19, and the output end of the operational amplifier OP18 is connected with the ground through resistors R62 and R61 in sequence;
the output end of the operational amplifier OP19 is respectively connected with the negative input ends of the operational amplifiers OP19 and OP20 through resistors R66 and R67;
the output end of the operational amplifier OP20 is connected with the negative input end of the operational amplifier OP20 through a resistor R68; and is connected with the negative input end of an operational amplifier OP1 in the basic chaotic signal generating circuit N1 through a resistor R2 in the basic chaotic signal generating circuit N1.
The output end x is connected with the negative input ends of operational amplifiers OP10, OP12, OP14, OP16 and OP18 through resistors R24, R29, R34, R39, R44, R49, R54, R59 and R64 respectively, the output end x is connected with the positive input ends of the operational amplifiers OP11, OP13, OP15 and OP17 respectively, and the output end x is connected with the negative input end of the operational amplifier OP19 through a resistor R65;
the positive input ends of the operational amplifiers OP10, OP12, OP14, OP16, OP18, OP19 and OP20 are grounded; the negative input terminals of the operational amplifiers OP11, OP13, OP15 and OP17 are connected to ground through resistors, respectively.
The circuit created by the invention is tested, and the circuit elements and the power supply voltage are selected as follows: all operational amplifiers in fig. 1 and 2 are of model TL082, and all resistors in fig. 1 and 2 are precision adjustable resistors. When the switching control function f (x) of the sequencer N2 is expressed as follows:
in time, the number of scrolls generated by the circuit of the invention is 2N (N is more than or equal to 1) (even number);
when the mathematical expression of the switching control function f (x) of the sequencer N2 is:
in this case, the number of scrolls generated by the circuit of the present invention is 2N +1(N ≧ 1) (odd number), where N is a natural number.
The state equation of the multi-scroll chaotic signal generated by the circuit provided by the invention is as follows:
where α is 4.2, β is 6.7, γ is 4.0, ξ is variable parameter, and f (x) is switching control function.
The parameters of each specific element of the experiment of this example are as follows:
TABLE 1 (unit: nF)
| C1 | 50 | C2 | 50 | C3 | 50 |
Table 1 above is a table of parameters for capacitance in nF.
TABLE 2
Table 2 shows the parameter values (unit: k.OMEGA.) of the respective resistances when the number of wraps is even.
TABLE 3
| R1 | 100 | R2 | 23.8 | R3 | 14.9 |
| R4 | 100 | R5 | 50 | R6 | 100 |
| R7 | 100 | R8 | 14.9 | R9 | 25 |
| R10 | 100 | R11 | 50 | R12 | 100 |
| R13 | 100 | R14 | 100 | R16 | 100 |
| R17 | 50 | R18 | 100 | R19 | 100 |
| R20 | 100 | R21 | 1 | R22 | 1.25 |
| R23 | 4.5 | R24 | 1 | R25 | 100 |
| R26 | 1 | R27 | 1.6 | R28 | 4.19 |
| R29 | 1 | R30 | 100 | R31 | 1 |
| R32 | 2.07 | R33 | 6.14 | R34 | 1 |
| R35 | 100 | R36 | 1 | R37 | 2.75 |
| R38 | 6.5 | R39 | 1 | R40 | 100 |
| R41 | 1 | R42 | 3.82 | R43 | 9.64 |
| R44 | 1 | R45 | 100 | R46 | 1 |
| R47 | 5.75 | R48 | 12.5 | R49 | 1 |
| R50 | 100 | R51 | 1 | R52 | 10.25 |
| R53 | 22.5 | R54 | 1 | R55 | 100 |
| R56 | 1 | R57 | 32.75 | R58 | 66.5 |
| R59 | 1 | R65 | 100 | R66 | 100 |
| R67 | 100 | R68 | 100 |
Table 3 shows the values of the parameters (unit: k.OMEGA.) of the respective resistances when the number of wraps is odd.
The invention is tested according to the parameters of tables 1, 2 and 3, and the corresponding relation table of the scroll number of the generated chaotic signal is obtained by combining the switch states of the switches S0-S4, as shown in tables 4 and 5:
TABLE 4
Table 4 above shows the correspondence between the resistance R5, the switch position, and the number of scrolls (even number);
TABLE 5
Table 5 above shows the correspondence between the resistance R5, the switch position, and the number of wraps (odd number).
It can be seen from tables 4 and 5 that the circuit of the present invention can still reach a certain number of scrolls, and can ensure the security of communication. Meanwhile, the circuit structure created by the invention is simple, and the hardware is easy to realize.
While the preferred embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that the invention is not limited to the details of the embodiments shown, but is capable of various modifications and changes without departing from the spirit of the invention.
Claims (3)
1. A multi-scroll chaotic circuit comprising: the basic chaotic signal generating circuit N1, the basic chaotic signal generating circuit N1 is provided with an output terminal x, the output terminal x is used for outputting x-direction chaotic signals, and the chaotic signal generating circuit is characterized by further comprising: a sequencer N2 for generating a switching control function f (x); the output end x is connected with the input end of a sequence generator N2, and the output end of a sequence generator N2 is connected with the input end of a basic chaotic signal generating circuit N1; wherein, the mathematical expression of the switching control function f (x) is:
or
Wherein N is more than or equal to 1;
the basic chaotic signal generating circuit N1 includes: operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP 9;
the output end of the operational amplifier OP1 is respectively connected with the negative input ends of the operational amplifiers OP1 and OP2 through resistors;
the output end of the operational amplifier OP2 is respectively connected with the negative input ends of the operational amplifiers OP3 and OP4 through resistors; the output end of the operational amplifier OP2 is connected with the negative input end of the operational amplifier OP2 through a capacitor;
the output end of the operational amplifier OP3 is respectively connected with the negative input ends of the operational amplifiers OP1 and OP3 through resistors, and the output end of the operational amplifier OP3 is connected with the output end x;
the output end of the operational amplifier OP4 is respectively connected with the negative input ends of the operational amplifiers OP4 and OP5 through resistors;
the output end of the operational amplifier OP5 is respectively connected with the negative input ends of the operational amplifiers OP1, OP6 and OP7 through resistors, and the output end of the operational amplifier OP5 is connected with the negative input end of the operational amplifier OP5 through a capacitor;
the output end of the operational amplifier OP6 is connected with the negative input end of the operational amplifier OP6 through a resistor, and the output end of the operational amplifier OP6 is connected with the output end y;
the output end of the operational amplifier OP7 is respectively connected with the negative input ends of the operational amplifiers OP7 and OP8 through resistors;
the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP9 through a resistor, and the output end of the operational amplifier OP8 is connected with the negative input end of the operational amplifier OP8 through a capacitor;
the output end of the operational amplifier OP9 is respectively connected with the negative input ends of the operational amplifiers OP4, OP7 and OP9 through resistors, and the output end of the operational amplifier OP9 is connected with the output end z;
the positive input terminals of the operational amplifiers OP1, OP2, OP3, OP4, OP5, OP6, OP7, OP8, OP9 are grounded;
the sequencer N2 includes: operational amplifiers OP10, OP11, OP12, OP13, OP14, OP15, OP16, OP17, OP18, OP19, OP 20;
the output end of the operational amplifier OP10 is respectively connected with the negative input ends of the operational amplifiers OP10 and OP19 through resistors, and the output end of the operational amplifier OP10 is connected with the ground through a resistor;
the output end of the operational amplifier OP11 is respectively connected with the negative input ends of the operational amplifiers OP11 and OP19 through resistors, and the output end of the operational amplifier OP11 is connected with the ground through a resistor;
the output end of the operational amplifier OP12 is respectively connected with the negative input ends of the operational amplifiers OP12 and OP19 through resistors, and the output end of the operational amplifier OP12 is connected with the ground through a resistor;
the output end of the operational amplifier OP13 is respectively connected with the negative input ends of the operational amplifiers OP13 and OP19 through resistors, and the output end of the operational amplifier OP13 is connected with the ground through a resistor;
the output end of the operational amplifier OP14 is respectively connected with the negative input ends of the operational amplifiers OP14 and OP19 through resistors, and the output end of the operational amplifier OP14 is connected with the ground through a resistor;
the output end of the operational amplifier OP15 is respectively connected with the negative input ends of the operational amplifiers OP15 and OP19 through resistors, and the output end of the operational amplifier OP15 is connected with the ground through a resistor;
the output end of the operational amplifier OP16 is respectively connected with the negative input ends of the operational amplifiers OP16 and OP19 through resistors, and the output end of the operational amplifier OP16 is connected with the ground through a resistor;
the output end of the operational amplifier OP17 is respectively connected with the negative input ends of the operational amplifiers OP17 and OP19 through resistors, and the output end of the operational amplifier OP17 is connected with the ground through a resistor;
the output end of the operational amplifier OP18 is respectively connected with the negative input ends of the operational amplifiers OP18 and OP19 through resistors, and the output end of the operational amplifier OP18 is connected with the ground through a resistor;
the output end of the operational amplifier OP19 is respectively connected with the negative input ends of the operational amplifiers OP19 and OP20 through resistors;
the output end of the operational amplifier OP20 is connected with the negative input end of the operational amplifier OP20 through a resistor; and is connected with the negative input end of an operational amplifier OP1 in the basic chaotic signal generating circuit N1 through a resistor;
the output end x is respectively connected with the negative input ends of operational amplifiers OP10, OP12, OP14, OP16 and OP18 through resistors, the output end x is respectively connected with the positive input ends of the operational amplifiers OP11, OP13, OP15 and OP17, and the output end x is connected with the negative input end of the operational amplifier OP19 through a resistor;
the positive input ends of the operational amplifiers OP10, OP12, OP14, OP16, OP18, OP19 and OP20 are grounded; the negative input terminals of the operational amplifiers OP11, OP13, OP15 and OP17 are connected to ground through resistors, respectively.
2. The chaotic circuit of claim 1, wherein: the resistors adopted by the basic chaotic signal generating circuit N1 and the sequencer N2 are both precision adjustable resistors.
3. The chaotic circuit of claim 2, wherein: the sequencer N2 further includes switches S0, S1, S2, S3, S4; the switch S0 is disposed between the output terminal of the operational amplifier OP18 and the negative input terminal of the operational amplifier OP 19; the switch S1 is disposed between the output of the operational amplifiers OP16, OP17 and the negative input of the operational amplifier OP 19; the switch S2 is disposed between the output of the operational amplifiers OP14, OP15 and the negative input of the operational amplifier OP 19; the switch S3 is disposed between the output of the operational amplifiers OP12, OP13 and the negative input of the operational amplifier OP 19; the switch S4 is disposed between the output of the operational amplifiers OP10, OP12 and the negative input of the operational amplifier OP 19.
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| CN201821106446.2U CN210724829U (en) | 2018-07-11 | 2018-07-11 | Multi-scroll chaotic circuit |
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| CN201821106446.2U CN210724829U (en) | 2018-07-11 | 2018-07-11 | Multi-scroll chaotic circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108683490A (en) * | 2018-07-11 | 2018-10-19 | 佛山科学技术学院 | A kind of multiscroll chaotic circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108683490A (en) * | 2018-07-11 | 2018-10-19 | 佛山科学技术学院 | A kind of multiscroll chaotic circuit |
| CN108683490B (en) * | 2018-07-11 | 2023-10-31 | 佛山科学技术学院 | Multi-scroll chaotic circuit |
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