CN210722408U

CN210722408U - Display panel and display device

Info

Publication number: CN210722408U
Application number: CN201921610093.4U
Authority: CN
Inventors: 孙靖忠; 田汝强; 应如波
Original assignee: Kunshan New Flat Panel Display Technology Center Co Ltd; Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan New Flat Panel Display Technology Center Co Ltd; Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2019-09-25
Filing date: 2019-09-25
Publication date: 2020-06-09
Anticipated expiration: 2029-09-25

Abstract

The utility model discloses a display panel and display device. The display panel includes: a display area and a non-display area surrounding the display area; the display area is provided with a plurality of pixel driving circuits and a plurality of light-emitting units, and first electrodes of the light-emitting units are electrically connected with the pixel driving circuits; the non-display area is provided with a power line and an initialization signal line, the power line is electrically connected with the second electrode of the light-emitting unit, and the initialization signal line can provide an initialization signal to the first electrode of the light-emitting unit in an initialization stage; the power line is insulated from the initialization signal line, and a projection of the power line at least partially overlaps a projection of the initialization signal line in a direction perpendicular to the display panel. The embodiment of the utility model provides a can reduce display panel's frame, improve the screen and account for than.

Description

Display panel and display device

Technical Field

The embodiment of the utility model provides a relate to the display technology, especially relate to a display panel and display device.

Background

With the development of display technology, the display panel has greater and wider functions and application.

However, the existing display panel still has a large frame, and the screen ratio is small, which affects further application of the display panel.

SUMMERY OF THE UTILITY MODEL

The utility model provides a display panel and display device to reduce display panel's frame, improve the screen and account for than.

In a first aspect, an embodiment of the present invention provides a display panel, including: a display area and a non-display area surrounding the display area; the display area is provided with a plurality of pixel driving circuits and a plurality of light-emitting units, and first electrodes of the light-emitting units are electrically connected with the pixel driving circuits; the non-display area is provided with a power line and an initialization signal line, the power line is electrically connected with the second electrode of the light-emitting unit, and the initialization signal line is used for providing an initialization signal to the first electrode of the light-emitting unit in an initialization stage; the power line is insulated from the initialization signal line, and a projection of the power line at least partially overlaps a projection of the initialization signal line in a direction perpendicular to the display panel. The whole width of the initialization signal line and the power line can be reduced, the frame is reduced, and the screen occupation ratio is improved.

Optionally, the non-display area is further provided with a scanning circuit and a light emission control circuit, the scanning circuit can provide scanning signals to the pixel driving circuit, the light emission control circuit can provide light emission control signals to the pixel driving circuit, and the power line is insulated from both the scanning circuit and the light emission control circuit; in a direction perpendicular to the display panel, a projection of the power supply line at least partially overlaps a projection of the scanning circuit; and/or a projection of the power supply line at least partially overlaps a projection of the light emission control circuit in a direction perpendicular to the display panel. The width of the power line can be increased, and the resistance of the power line can be reduced.

Optionally, the power line covers at least one of the light emission control circuit, the scanning circuit, and the initialization signal line. Equivalently, the thickness of the power line is increased, and the resistance of the power line is further reduced.

Optionally, the power line is provided with a trace in at least two metal layers. Equivalent to increasing the thickness of the power supply line, the resistance of the power supply line can be reduced.

Optionally, the at least two metal layers include a source drain layer and a power layer located on a side of the source drain layer away from the gate layer, and the power line is routed on the source drain layer and the power layer. The source drain pole layer and the power supply layer are closer to the cathode layer, and the difficulty of overlapping the power supply line and the cathode layer is reduced.

Optionally, the non-display area is further provided with a plurality of auxiliary structures, and the power line is connected with the auxiliary structures through via holes. Equivalent to increasing the thickness of the power supply line, the resistance of the power supply line can be reduced.

Optionally, in a direction perpendicular to the display panel, a projection of the auxiliary structure is located between a projection of the light emission control circuit and a projection of the scanning circuit; and/or the projection of the auxiliary structure is positioned between the projection of the initialization signal line and the projection of the scanning circuit along the direction perpendicular to the display panel. The utilization rate of each area of the non-display area can be improved, and the wasted space is reduced.

Optionally, the wire layer of the second electrode extends from the display area to the non-display area, and the wire layer of the second electrode is electrically connected to the power line in the non-display area, so that the overlapping area between the power line and the wire layer of the second electrode can be increased, and the overlapping resistance can be reduced.

Optionally, the display panel further includes a metal connection layer disposed on the same layer as the first electrode, the metal connection layer is located in the non-display area, and the metal connection layer covers the power line and contacts with a wire of the second electrode in the non-display area, so that a height of a power line climbing slope can be reduced, and a difficulty of overlapping with the wire layer is reduced.

In a second aspect, the present invention further provides a display device, including the display panel according to the first aspect.

The utility model adopts a display panel which comprises a display area and a non-display area surrounding the display area; the display area is provided with a plurality of pixel driving circuits and a plurality of light-emitting units, and first electrodes of the light-emitting units are electrically connected with the pixel driving circuits; the non-display area is provided with a power line and an initialization signal line, the power line is electrically connected with the second electrode of the light-emitting unit, and the initialization signal line can provide an initialization signal for the first electrode of the light-emitting unit in an initialization stage; the power line is insulated from the initialization signal line, and a projection of the power line and a projection of the initialization signal line at least partially overlap in a direction perpendicular to the display panel. The initialization signal line and the power line occupy at least one part of the area which is overlapped, so that the power line and the initialization signal line do not occupy certain areas respectively, the whole width of the power line and the whole width of the initialization signal line can be reduced, and the initialization signal line and the power line are arranged in the non-display area, so that the width of the non-display area can be reduced, the width of a frame is reduced, and the screen occupation ratio is improved.

Drawings

Fig. 1 is a schematic structural diagram of a conventional display panel;

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 3 is a top view of FIG. 2;

fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 5 is a schematic circuit diagram of a pixel driving circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

FIG. 8 is a cross-sectional view of FIG. 7;

fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 12 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

As mentioned in the background art, the conventional display panel has a problem of large bezel, and the inventors have found through careful study that the reason for this technical problem is: fig. 1 is a schematic structural diagram of a conventional display panel, and referring to fig. 1, the conventional display panel, for example, for an OLED (Organic Light-Emitting Diode) display panel, includes a display area 11 'and a non-display area 12', in which a power line VSS 'and an initialization signal line VREF' need to be arranged in a frame (non-display area) on left and right sides of the display panel, and a plurality of pixel driving circuits 110 'and OLED devices (not shown) are included in the display area 11'; the power supply line VSS' is used to supply an electrical signal to the cathode of each OLED device; the initialization signal line VREF' is used for providing an initialization signal so as to initialize the anode of the OLED device and the grid of the driving transistor in an initialization stage; each signal line needs to occupy a certain frame width independently, and the signal lines are combined to occupy a larger whole width of the frame; therefore, the conventional display panel has a problem of large frame.

Based on the technical problem, the utility model provides a following solution:

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 3 is a top view of fig. 2, referring to fig. 2 and fig. 3, the display panel includes a display area 11 and a non-display area 12 surrounding the display area; the display region 11 is provided with a plurality of pixel driving circuits 110 and a plurality of light emitting units 111, and the first electrodes 1110 of the light emitting units 111 are electrically connected to the pixel driving circuits 110; the non-display region 12 is provided with a power line VSS electrically connected to the second electrode 1111 of the light emitting unit 111 and an initialization signal line VREF capable of supplying an initialization signal to the first electrode 1110 of the light emitting unit 111 at an initialization stage; the power line VSS is insulated from the initialization signal line VREF, and a projection of the power line VSS and a projection of the initialization signal line VREF at least partially overlap in a direction perpendicular to the display panel.

Specifically, the pixel driving circuits 110 and the light emitting units 111 located in the display region 11 may be arranged in a one-to-one correspondence, and the pixel driving circuits 110 can provide a driving current for the light emitting units 111, and the light emitting units 111 emit light in response to the driving current during a light emitting period; the first electrode 1110 of the light emitting unit 111 can be an anode, the second electrode 1111 can be a cathode, and the second electrode 1111 is electrically connected to the power line VSS, wherein the second electrode 1111 and the power line VSS can be overlapped through a portion 1112 of the anode layer located in the non-display region 12, so as to reduce the height of the second electrode 1111 routing and reduce the difficulty of overlapping; a first electrode 1110 is located in the anode layer; in the light emitting period, the first electrode receives a high level, and the power line VSS supplies a low level signal to the second electrode, thereby ensuring that the light emitting unit 111 stably emits light. The initialization signal line VREF can provide an initialization signal to the pixel driving circuit 110, and in an initialization stage, the gate of the driving transistor in the pixel driving circuit 110 and the first electrode of the light emitting unit 111 can be initialized, so that in a data writing stage, the driving transistor can be turned on, and subsequent data writing and other operations are facilitated.

The power line VSS is insulated from the initialization signal line VREF, and if an insulating layer is added, the power line VSS and the initialization signal line VREF are prevented from being short-circuited to affect normal display of the display panel. The display panel may include a substrate 201, a direction perpendicular to the display panel may be understood as a first direction Y, a projection of the power line VSS may at least partially overlap a projection of the initialization signal line VREF, may be understood as an orthogonal projection of the power line VSS on the substrate 201, and may at least partially overlap an orthogonal projection of the initialization signal line VREF on the substrate 201, the power line VSS and the initialization signal line VREF may be disposed at different layers such that a region occupied by the initialization signal line VREF and the power line VSS along a second direction X (the second direction X is perpendicular to the first direction Y) at least partially overlaps at least a region occupied by the power line VSS without making the power line VSS and the initialization signal line VREF each occupy a certain region, that is, an entire width of the power line VSS and the initialization signal line VREF in the second direction X may be reduced, and since the initialization signal line VREF and the power line VSS are disposed in the non-display region 12, that is, a width of the non-display region 12 along the, thereby reducing the frame and improving the screen occupation ratio.

It should be noted that, when the initialization signal lines VREF are disposed on both the left and right frames of the display area 11, the projections of the power line VSS may be disposed to at least partially overlap with the projections of the corresponding initialization signal lines VREF along a direction perpendicular to the display panel, so as to reduce the widths of the left and right frames.

According to the technical scheme of the embodiment, the adopted display panel comprises a display area and a non-display area surrounding the display area; the display area is provided with a plurality of pixel driving circuits and a plurality of light-emitting units, and first electrodes of the light-emitting units are electrically connected with the pixel driving circuits; the non-display area is provided with a power line and an initialization signal line, the power line is electrically connected with the second electrode of the light-emitting unit, and the initialization signal line can provide an initialization signal for the first electrode of the light-emitting unit in an initialization stage; the power line is insulated from the initialization signal line, and a projection of the power line and a projection of the initialization signal line at least partially overlap in a direction perpendicular to the display panel. The initialization signal line and the power line occupy at least one part of the area, so that the power line and the initialization signal line do not occupy certain areas, the whole width of the power line and the whole width of the initialization signal line can be reduced, and the initialization signal line and the power line are generally arranged in the non-display area, so that the width of the non-display area along the second direction can be reduced, the frame is reduced, and the screen occupation ratio is improved.

Optionally, fig. 4 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, referring to fig. 4, the non-display area 12 is further provided with a SCAN circuit SCAN and an emission control circuit EM, the SCAN circuit SCAN can provide a SCAN signal to the pixel driving circuit 110, the emission control circuit EM can provide an emission control signal to the pixel driving circuit 110, and the power line VSS is insulated from both the SCAN circuit SCAN and the emission control circuit EM; in a direction (first direction Y) perpendicular to the display panel, a projection of the power supply line VSS at least partially overlaps a projection of the SCAN circuit SCAN; and/or, in a direction perpendicular to the display panel (first direction Y), a projection of the power supply line VSS at least partially overlaps a projection of the emission control circuit EM.

Specifically, fig. 5 is a schematic circuit structure diagram of a pixel driving circuit provided by an embodiment of the present invention, in combination with fig. 4 and fig. 5, the pixel driving circuit 110 includes a first switch transistor T1, a second switch transistor T2, a third switch transistor T3, a fourth switch transistor T4, a fifth switch transistor T5, a sixth switch transistor T6, a driving transistor DT and a storage capacitor C, a SCAN circuit SCAN is electrically connected to the first SCAN signal input terminal S1 and the second SCAN signal input terminal S2 of the pixel driving circuit 110, a light emission control circuit EM is electrically connected to the light emission control signal input terminal EM1 of the pixel driving circuit 110, and an initialization signal line VREF is electrically connected to the initialization signal input terminal VREF1 of the pixel driving circuit 110. The first pole (source) of the driving transistor DT is connected to the first node N1, the gate of the driving transistor DT is connected to the second node N2, and when the pixel driving circuit operates, the second switching transistor T2 is turned on when the second scan signal input terminal S2 receives a low level, so as to charge the voltage on the initialization signal line VREF to the second node N2, wherein the voltage value on the initialization signal line VREF may be VINT, and VINT is a negative voltage.The third switching transistor T3 and the fourth switching transistor T4 are turned on when the first scan signal input terminal S1 is at a low level, and the voltage received at the DATA signal input terminal DATA is charged to the second node N2. The light emitting unit may be an OLED device, and when the light emission control signal input terminal EM1 receives a low level signal, the fifth switching transistor T5 and the sixth switching transistor T6 are turned on, and a current flows through the OLED device, and the OLED device starts emitting light. The formula of the final light-emitting current of the OLED device is as follows: i ═ a (V)_ELVDD-V_data) 2, where A is a constant value associated with the driving transistor DT, V_ELVDDRepresenting the voltage, V, received at the positive power signal input terminal ELVDD_dataRepresenting the voltage received at the DATA signal input terminal DATA, and finally the current of the OLED device is independent of the threshold voltage of the driving transistor DT, having a threshold compensation function.

The display panel may include a substrate 201, an active layer 202, a gate layer 203, a source drain layer 204, and a power layer 205, which are sequentially stacked, wherein the source drain layer 204 is provided with source metal and drain metal of each switching transistor and driving transistor in the pixel driving circuit, the power layer 205 includes a conductive structure for transmitting a positive power signal, that is, a structure marked by the power layer 205 in fig. 4, and the positive power signal is transmitted to a positive power signal input end ELVDD in the pixel driving circuit; the emission control circuit EM is distributed in the active layer 202, the gate layer 203, and the source drain layer 204; the SCAN circuit SCAN is distributed in the active layer 202, the gate layer 203 and the source drain layer 204; the initialization signal line VREF may be disposed at the same layer as the source/drain layer 204 to facilitate connection between the initialization signal line VREF and the sources of the second transistor T2 and the first transistor T1 in the pixel driving circuit 110.

Along the second direction X, the initialization signal line VREF may be set to be close to the display region 11, the emission control circuit EM is far from the display region 11, and the SCAN circuit SCAN is between the emission control circuit EM and the initialization signal line VREF, at this time, the power line VSS and the power layer 205 may be set on the same layer, and the power line VSS is widened in the second direction X to at least cover a part of the SCAN circuit SCAN, which is equivalent to increase the width of the power line VSS, thereby reducing the resistance of the power line VSS, and reducing the voltage difference between signals of each part on the power line VSS, thereby reducing the frame, improving the stability of signal transmission, and improving the display uniformity of the display panel.

Along the second direction X, when the initialization signal line VREF is close to the display area 11, the SCAN circuit SCAN is far from the display area 11, and the emission control circuit EM is disposed between the SCAN circuit SCAN and the initialization signal line VREF, the projection of the power line VSS and the projection of the emission control circuit EM may be at least partially overlapped in the first direction Y, that is, the power line VSS is widened, and a portion of the emission control circuit EM is covered, which is equivalent to increasing the width of the power line VSS, thereby reducing the resistance of the power line VSS, and reducing the voltage difference between signals on the power line VSS, thereby reducing the frame, improving the stability of signal transmission, and improving the display uniformity of the display panel.

Preferably, as shown in fig. 4, the power line VSS may be disposed to cover the initialization signal line VREF, the SCAN circuit SCAN, and the emission control circuit EM, that is, along a direction perpendicular to the display panel, a projection of the power line VSS covers a projection of the initialization signal line VREF, a projection of the SCAN circuit SCAN, and a projection of the emission control circuit EM, so that a width of the non-display area in the second direction X may be utilized to the maximum extent, the width of the power line VSS is further increased, and further, a resistance of the power line VSS is reduced, and a voltage difference between signals of each portion on the power line VSS is reduced, so that a frame is reduced, and at the same time, stability of signal transmission is improved, and display uniformity of the display panel is improved.

Optionally, fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 6, the power line VSS wraps at least one of the emission control circuit EM, the SCAN circuit SCAN, and the initialization signal line VREF.

Specifically, if the power line VSS covers the emission control circuit EM or the SCAN circuit SCAN, the power line VSS is in contact with the substrate 201, and a material of the power line VSS is directly deposited on the substrate 201 during manufacturing, so that the thickness of the power line VSS is increased, the resistance of the power line VSS is further reduced, the voltage difference between signals of each part on the power line VSS is reduced, the stability of signal transmission is improved, and the display uniformity of the display panel is improved. When the power line VSS covers the initialization signal line VREF, it is not necessary to provide a contact between the power line VSS and the substrate, but only the initialization signal line VREF is covered.

Alternatively, fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention, fig. 8 is a cross-sectional view of fig. 7, and referring to fig. 7 and 8, the power line VSS is provided with traces in at least two metal layers.

Specifically, a cross-sectional view of the structure shown in fig. 7 along a third direction Z is shown in fig. 8, where the third direction Z is perpendicular to the first direction Y and the second direction X, the gate layer 203, the source/drain layer 204, and the power layer 205 are all metal layers, and the power line VSS may have traces in at least two metal layers, so as to increase the thickness of the power line VSS, further reduce the resistance of the power line VSS, thereby reducing the voltage difference between signals on the power line VSS, improving the stability of signal transmission, and improving the display uniformity of the display panel; meanwhile, the existing metal structure in the metal layer can be used for wiring, for example, when the source drain layer 204 is etched by using the source drain metal laid on the whole layer, a part of wiring of the power line VSS is etched, and the part of wiring does not need to be used as a source electrode or a drain electrode of a transistor in the pixel driving circuit, but only needs to be used as a part of the power line VSS, so that the difficulty of manufacturing the display panel is reduced, and the overall cost is reduced.

Preferably, with continued reference to fig. 7, the power supply line VSS is routed on a metal layer on which the source drain layer 204 and the power supply layer 205 are located. On one hand, the existing metal layer of the display panel can be utilized for wiring, on the other hand, in the direction perpendicular to the display panel, the source drain layer 204 and the power supply layer 205 are closer to the second electrode 1111, the lap joint difficulty of the cathode layer and the power supply line VSS can be reduced, the yield of the display panel is improved, and the cost is reduced.

Optionally, fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 9, the non-display area 12 is further provided with a plurality of auxiliary structures, and the power line VSS is connected to the auxiliary structure 301 through a via.

Specifically, the auxiliary structure 301 may be a metal structure, as shown in fig. 9, the auxiliary structure 301 may be disposed on the same layer as the source/drain layer 204, and in the process of fabricating the source/drain electrode in the source/drain layer 204, the auxiliary structure 301 may be fabricated by using the metal on the same layer, and finally electrically connected to the power line VSS through the via hole, that is, the thickness of the power line VSS is increased, so that the resistance of the power line VSS is further reduced, thereby reducing the voltage difference between signals on each portion of the power line VSS, improving the stability of signal transmission, and improving the display uniformity of the display panel. Or, fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 10, the auxiliary structure 301 may be disposed on the same layer as the gate layer 203, in the process of manufacturing the gate in the gate layer 203, the auxiliary structure 301 may be made of metal on the same layer, and finally electrically connected to the power line VSS through the via hole, that is, the thickness of the power line VSS is increased, so as to further reduce the resistance of the power line VSS, thereby reducing the voltage difference between signals on the power line VSS, improving the stability of signal transmission, and improving the display uniformity of the display panel. Alternatively, as shown in fig. 11, fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention, the auxiliary structure 301 may be disposed on the same layer as the active layer 202, the active layer 202 may include polysilicon, and the heavily doped polysilicon may also have a conductive function, so that the auxiliary structure 301 may be obtained by heavily doping the polysilicon in the active layer 202, which is equivalent to increasing the thickness of the power line VSS, and further reducing the resistance of the power line VSS, thereby reducing the voltage difference between signals of each portion on the power line VSS, improving the stability of signal transmission, and improving the display uniformity of the display panel.

Alternatively, with continued reference to fig. 9 to 11, in a direction perpendicular to the display panel (first direction Y), the projection of the auxiliary structure 301 is located between the projection of the emission control circuit EM and the projection of the scanning circuit SCAN; and/or the projection of the auxiliary structure 301 is located between the projection of the initialization signal line VREF and the projection of the SCAN circuit SCAN.

Specifically, when the non-display area 12 is provided with the emission control circuit EM and the SCAN circuit SCAN, both the emission control circuit EM and the SCAN circuit SCAN need to occupy a large area, and along the second direction X, the emission control circuit EM, the SCAN circuit SCAN, and the reference signal line VREF may be sequentially arranged and gradually close to the display area 11, a region where the emission control circuit EM is located may be understood as a structure where the emission control circuit EM is no longer present outside the region, and a region where the SCAN circuit SCAN is located may be understood as a structure where the SCAN circuit SCAN is no longer present in the region; a projection of the auxiliary structure 301 is provided, between the projection of the emission control circuit EM and the projection of the scanning circuit SCAN; and/or, the projection of the auxiliary structure 301 is located between the projection of the initialization signal line VREF and the projection of the SCAN circuit SCAN, which is equivalent to increasing the thickness of the power line VSS, reducing the resistance of the power line VSS, and at the same time, improving the utilization efficiency of each part of the non-display area 12 and reducing the wasted space.

Optionally, fig. 12 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 12, the second electrodes of the plurality of light emitting units are conductive layers disposed on the same layer, the conductive layers extend from the display area 11 to the non-display area 12, and the conductive layers of the non-display area are electrically connected to the power line VSS.

Specifically, the conductive wire layer may be a magnesium-silver alloy, and in the display area 11, the conductive wire layer may serve as a cathode to provide a cathode signal for all the light emitting units located in the display area 11; in the non-display region 12, the conductive line layer of the second electrode is overlapped with the power line VSS and can cover the power line VSS, so that the overlapping area of the conductive line layer and the power line VSS is increased, the overlap resistance is reduced, the voltage difference between signals of each part on the power line VSS is further reduced, the stability of signal transmission is improved, and the display uniformity of the display panel is improved.

Optionally, with continued reference to fig. 12, the display panel further includes a metal connection layer 1112 located in the non-display region, wherein the metal connection layer 1112 covers the power line VSS and is electrically connected to the conductive line layer; the metal connection layer 1112 is disposed on the same layer as the first electrode.

Specifically, the portion of the wire layer in the non-display area 12 needs to have a certain gradient and is further electrically connected to the power line VSS, the wire layer is electrically connected to the power line VSS through the metal connection layer 1112, thereby reducing the height of the wire layer in the non-display area 12 that needs to climb, and further reducing the risk of breaking the wire layer, and improving the working stability of the display panel, the metal connection layer 1112 and the second electrode are disposed on the same layer, that is, when the display panel is manufactured, a whole metal layer can be formed first, the second electrodes of the plurality of light emitting units in the display area portion are formed respectively by etching the metal layer, and the metal connection layer 1112 in the non-display area portion is formed.

Fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention, referring to fig. 13, the display device 20 includes the display panel 19 in the above embodiment, therefore, the embodiment of the present invention provides a display device also having the beneficial effects described in the above embodiment, which is not repeated herein. Illustratively, the display device may be an electronic display device such as a mobile phone, a computer, or a television.

It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.

Claims

1. A display panel, comprising: a display area and a non-display area surrounding the display area;

the display area is provided with a plurality of pixel driving circuits and a plurality of light-emitting units, and first electrodes of the light-emitting units are electrically connected with the pixel driving circuits;

the non-display area is provided with a power line and an initialization signal line, the power line is electrically connected with the second electrode of the light-emitting unit, and the initialization signal line is used for providing an initialization signal to the first electrode of the light-emitting unit in an initialization stage;

the power line is insulated from the initialization signal line, and a projection of the power line at least partially overlaps a projection of the initialization signal line in a direction perpendicular to the display panel.

2. The display panel according to claim 1, wherein the non-display region is further provided with a scanning circuit capable of supplying a scanning signal to the pixel driving circuit and a light emission control circuit capable of supplying a light emission control signal to the pixel driving circuit, and wherein the power supply line is insulated from both the scanning circuit and the light emission control circuit;

in a direction perpendicular to the display panel, a projection of the power supply line at least partially overlaps a projection of the scanning circuit; and/or

The projection of the power supply line at least partially overlaps the projection of the light emission control circuit in a direction perpendicular to the display panel.

3. The display panel according to claim 2, wherein the power supply line covers at least one of the light emission control circuit, the scanning circuit, and the initialization signal line.

4. The display panel according to claim 1, wherein the power line is provided with traces in at least two metal layers.

5. The display panel according to claim 4, wherein the at least two metal layers comprise a gate layer, a source drain layer, and a power layer located on a side of the source drain layer away from the gate layer.

6. The display panel according to claim 2, wherein the non-display region is further provided with a plurality of auxiliary structures, and the power supply line is connected to the auxiliary structures through a via hole.

7. The display panel according to claim 6, wherein a projection of the auxiliary structure is located between a projection of the light emission control circuit and a projection of the scanning circuit in a direction perpendicular to the display panel;

and/or the projection of the auxiliary structure is positioned between the projection of the initialization signal line and the projection of the scanning circuit along the direction perpendicular to the display panel.

8. The display panel according to claim 1, wherein the conductive line of the second electrode extends from the display region to the non-display region, and the conductive line of the second electrode is electrically connected to the power supply line in the non-display region.

9. The display panel according to claim 8, further comprising a metal connection layer disposed on the same layer as the first electrode, wherein the metal connection layer is located in the non-display region, and covers the power line and contacts with a conductive line of the second electrode in the non-display region.

10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.