CN210721354U - Reset circuit and electronic device - Google Patents
Reset circuit and electronic device Download PDFInfo
- Publication number
- CN210721354U CN210721354U CN201922492376.XU CN201922492376U CN210721354U CN 210721354 U CN210721354 U CN 210721354U CN 201922492376 U CN201922492376 U CN 201922492376U CN 210721354 U CN210721354 U CN 210721354U
- Authority
- CN
- China
- Prior art keywords
- reset
- resistor
- control chip
- circuit
- triode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Electronic Switches (AREA)
Abstract
The utility model discloses a reset circuit and electronic equipment. The reset circuit comprises a reset starting circuit and a reset discrimination circuit; the reset starting circuit is respectively connected with the key, the control chip and the reset discrimination circuit and is used for sending a reset signal to the control chip and sending a starting signal to the reset discrimination circuit when the key is triggered by the outside; the reset discrimination circuit is connected with the control chip and used for transmitting the starting signal to the control chip so that the control chip can reset when receiving the resetting signal sent by the reset starting circuit and the starting signal sent by the reset discrimination circuit. According to the scheme, the system can be reset through the key when the system is not started due to non-hardware faults, and the corresponding reset scheme is executed after the reset reason caused by the key is recorded, so that the stability of the product and the maintenance efficiency of the product are effectively improved, and the after-sale cost is reduced.
Description
Technical Field
The utility model relates to the field of electronic technology, especially, relate to a reset circuit and electronic equipment.
Background
The electronic device often has a problem that the system is not turned on during use, and the reason for the system not being turned on may be due to a hardware failure or a software exception. Problems caused by hardware failures require replacement of devices during after-market maintenance, and problems caused by software anomalies can be repaired by rewriting software during after-market maintenance.
However, after-sale engineers usually cannot judge the reason why the system is not started before actual service, and all similar problems are served, so that not only is the maintenance efficiency reduced, but also the after-sale cost is greatly increased.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a reset circuit and an electronic device, which aims to solve the technical problem that the system resulting from non-hardware failure in the prior art needs to be manually reset and restarted when the system is not started.
In order to achieve the above object, the present invention provides a reset circuit, which comprises a reset starting circuit and a reset discrimination circuit; wherein the content of the first and second substances,
the reset starting circuit is respectively connected with the key, the control chip and the reset discrimination circuit and is used for respectively sending a reset signal to the control chip and sending a starting signal to the reset discrimination circuit when the key is triggered by the outside;
the reset discrimination circuit is connected with the control chip and used for transmitting the starting signal to the control chip so that the control chip resets when receiving the resetting signal sent by the reset starting circuit and the starting signal sent by the reset discrimination circuit.
Preferably, the reset starting circuit comprises a starting unit and an output unit; wherein the content of the first and second substances,
the starting unit is respectively connected with the key, the control chip, the reset discrimination circuit and the output unit and is used for respectively sending starting signals to the output unit and the reset discrimination circuit when detecting a trigger signal sent when the key is triggered by the outside;
and the output unit is respectively connected with the reset discrimination circuit and the control chip and is used for sending a reset signal to the control chip when receiving the starting signal.
Preferably, the starting unit includes a key, a first resistor, a second resistor, a third resistor, a fourth resistor, a first triode, a first MOS transistor, a second MOS transistor, and a first capacitor; wherein the content of the first and second substances,
the first end of the first resistor is connected with a power supply, and the second end of the first resistor is respectively connected with the key, the key input end of the control chip, the base of the first triode and the grid of the first MOS tube;
a collector of the first triode is connected with a first end of the second resistor, and an emitter of the first triode is grounded;
the second end of the second resistor is respectively connected with the power supply and the grid electrode of the second MOS tube;
the source electrode of the second MOS tube is connected with the power supply through the third resistor, and the drain electrode of the second MOS tube is respectively connected with the first end of the first capacitor, the output unit and the reset discrimination circuit;
the source electrode of the first MOS tube and the second end of the first capacitor are both grounded;
and the drain electrode of the first MOS tube is grounded through the fourth resistor.
Preferably, the output unit includes a fifth resistor, a second capacitor and a reset chip; wherein the content of the first and second substances,
a first end of the fifth resistor is connected with the power supply, and a second end of the fifth resistor is respectively connected with an output end of the reset chip, a first end of the second capacitor and a reset end of the control chip;
the power supply end of the reset chip is respectively connected with the drain electrode of the second MOS tube and the reset discrimination circuit, and the grounding end of the reset chip is grounded;
and the second end of the second capacitor is grounded.
Preferably, the output unit further includes a second triode and a sixth resistor; the base electrode of the second triode is connected with the second end of the fifth resistor, the collector electrode of the second triode is connected with the power supply through the sixth resistor, the collector electrode of the second triode is further connected with the reset end of the control chip, and the emitting electrode of the second triode is grounded.
Preferably, the fourth resistor is an adjustable resistor and the first capacitor is an adjustable capacitor.
Preferably, the reset discrimination circuit comprises a switch unit and a self-locking unit; the switch unit is respectively connected with the starting unit, the output unit, the self-locking unit and the input end of the control chip, and the self-locking unit is connected with the output end of the control chip.
Preferably, the switching unit includes a first diode and a second diode; the cathode of the first diode is connected with the output unit and the starting unit respectively, the anode of the first diode is connected with the cathode of the second diode, and the anode of the second diode is connected with the self-locking unit and the input end of the control chip respectively.
Preferably, the self-locking unit comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a third triode, a fourth triode and a third capacitor; wherein the content of the first and second substances,
a first end of the seventh resistor is connected to the power supply, and a second end of the seventh resistor is connected to the first end of the eighth resistor, the emitter of the third triode, the first end of the ninth resistor, and the first end of the third capacitor, respectively;
a second end of the eighth resistor is respectively connected with a base electrode of the third triode, a collector electrode of the fourth triode, an anode of the second diode and an input end of the control chip;
a collector of the third triode is respectively connected with the first end of the tenth resistor and the base of the fourth triode, and the base of the third triode is connected with the input end of the control chip;
a second end of the tenth resistor, an emitter of the fourth triode and a second end of the third capacitor are all grounded;
and the second end of the ninth resistor is connected with the output end of the control chip.
The utility model also provides an electronic equipment, electronic equipment includes as above reset circuit.
The utility model discloses a reset starting circuit and a reset discrimination circuit of the equipment in the reset circuit; the reset starting circuit is respectively connected with the key, the control chip and the reset discrimination circuit and is used for sending a reset signal to the control chip and sending a starting signal to the reset discrimination circuit when the key is triggered by the outside; the reset discrimination circuit is connected with the control chip and used for transmitting the starting signal to the control chip so that the control chip can reset when receiving the resetting signal sent by the reset starting circuit and the starting signal sent by the reset discrimination circuit. According to the scheme, the system can be reset through the key when the system is not started due to non-hardware faults, and the corresponding reset scheme is executed after the reset reason caused by the key is recorded, so that the stability of the product and the maintenance efficiency of the product are effectively improved, and the after-sale cost is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a functional block diagram of an embodiment of the reset circuit of the present invention;
fig. 2 is an alternative structure diagram of the reset circuit of fig. 1.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 100 | Reset starting circuit | KEY | Key input end of |
| 200 | Reset discrimination circuit | SOC-RESET | Reset terminal of |
| 110 | Starting unit | RST-MARK | Input terminal of |
| 120 | Output unit | RST-MARK-CLR | Output terminal of |
| 210 | Self-locking unit | R1～R10 | First to |
| 220 | Switch unit | C1～C3 | First to third capacitors |
| SOC | Control chip | Q1～Q4 | First to fourth triodes |
| 3V3 | Power supply | MOS1～MOS2 | First MOS transistor to second MOS transistor |
| K1 | Push-button | D1～D2 | First to second diodes |
| VDD | Power end of reset chip | U1 | Reset chip |
| VOUT | Reset chip output terminal | GND | Ground |
The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a reset circuit.
Referring to fig. 1, in an embodiment, the reset circuit includes a reset starting circuit 100 and a reset discrimination circuit 200; the reset starting circuit 100 is respectively connected with the key K1, the control chip SOC and the reset screening circuit 200, and is configured to send a reset signal to the control chip SOC and send a starting signal to the reset screening circuit 200 when the key K1 is triggered by the outside; the reset discrimination circuit 200 is connected to the control chip SOC, and configured to transmit the start signal to the control chip SOC, so that the control chip SOC resets when receiving the reset signal sent by the reset start circuit 100 and the start signal sent by the reset discrimination circuit 200.
It should be understood that the key K1 refers to a general key on the electronic device, and may be a volume adjustment key, a switch key, and the like, which is not limited in this embodiment.
It should be noted that when the system is not powered on due to a non-hardware fault, after-sales personnel often need to go to the door for after-sales, and this embodiment is compatible with the keys of the electronic device for reuse, and the user can trigger the system to reset and power on through the keys without adding additional keys.
Because the reset end of the control chip SOC may receive two reset signals, one is the normal reset of the user, and the other is the reset through the key K1, the reset discrimination circuit 200 is designed in this embodiment, and the control chip SOC can determine which reason causes the reset according to the signal fed back by the reset discrimination circuit 200, and start the corresponding reset mechanism. For example, when the reset is caused by the key K1, the system is automatically restored to the initial state by one key, and when the reset is normal, the boot-up procedure is started according to the normal flow.
In the embodiment, the reset starting circuit and the reset discrimination circuit are arranged in the reset circuit; the reset starting circuit is respectively connected with the key, the control chip and the reset discrimination circuit and is used for sending a reset signal to the control chip and sending a starting signal to the reset discrimination circuit when the key is triggered by the outside; the reset discrimination circuit is connected with the control chip and used for transmitting the starting signal to the control chip so that the control chip can reset when receiving the resetting signal sent by the reset starting circuit and the starting signal sent by the reset discrimination circuit. According to the scheme, the system can be reset through the key when the system is not started due to non-hardware faults, and the corresponding reset scheme is executed after the reset reason caused by the key is recorded, so that the stability of the product and the maintenance efficiency of the product are effectively improved, and the after-sale cost is reduced.
Further, referring to fig. 2, fig. 2 is a schematic diagram of an alternative structure of the reset circuit of fig. 1.
In this embodiment, the reset start circuit 100 includes a start unit 110 and an output unit 120; the starting unit 110 is respectively connected to the key K1, the control chip SOC, the reset screening circuit 200 and the output unit 120; the output unit 120 is respectively connected with the reset discrimination circuit 200 and the control chip SOC; when detecting a trigger signal sent when the key K1 is triggered from the outside, the activation unit 110 sends an activation signal to the output unit 120 and the reset screening circuit 200, respectively, and when receiving the activation signal, the output unit 120 sends a reset signal to the control chip SOC.
Specifically, the starting unit 110 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1, a first MOS transistor MOS1, a second MOS transistor MOS2, and a first capacitor C1; a first end of the first resistor R1 is connected to a power supply 3V3, and a second end of the first resistor R1 is connected to the KEY K1, the KEY input KEY of the control chip, the base of the first transistor Q1, and the gate of the first MOS transistor MOS 1; the collector of the first triode Q1 is connected with the first end of the second resistor R2, and the emitter of the first triode Q1 is grounded; a second end of the second resistor R2 is respectively connected with the power supply 3V3 and the grid electrode of the second MOS transistor MOS 2; the source of the second MOS transistor MOS2 is connected to the power supply 3V3 through the third resistor R3, and the drain of the second MOS transistor MOS2 is connected to the first end of the first capacitor C1, the output unit 120, and the reset discrimination circuit 200, respectively; the source of the first MOS transistor MOS1 and the second end of the first capacitor C1 are both grounded; the drain of the first MOS transistor MOS1 is grounded via the fourth resistor R4.
Further, the output unit 120 includes a fifth resistor R5, a second capacitor C2, and a reset chip U1; a first end of the fifth resistor R5 is connected to the power supply 3V3, and a second end of the fifth resistor R5 is connected to the output terminal VOUT of the RESET chip, the first end of the second capacitor C2, and the RESET terminal SOC-RESET of the control chip, respectively; a power supply end VDD of the reset chip is respectively connected with the drain of the second MOS transistor MOS2 and the reset discriminator circuit 200, and a ground end GND1 of the reset chip is grounded; the second end of the second capacitor C2 is grounded.
It should be noted that the first resistor R1, the second resistor R2, the third resistor R3, the fifth resistor R5, and the sixth resistor R6 are pull-up resistors, the fourth resistor R4 is an adjustable resistor, and the first transistor Q1, the second transistor Q2, the first MOS1, and the second MOS2 all function as switches. The first capacitor C1 is an adjustable capacitor, and the second capacitor C2 is a filter capacitor.
It should be understood that the reset chip U1 starts the reset operation through the determined voltage value (threshold), which can effectively prevent the control chip SOC from being disordered when the voltage drops to the threshold value, causing program runaway, and further causing a dead halt or malfunction, thereby ensuring data security. As an embodiment, the operating range of the reset chip U1 is 0.9V to 6V, the reset threshold is 1.2V, and the reset output is low, i.e. when the output voltage rises to exceed 1.2V, the output continues to be low for 200 ms.
In addition, considering the design characteristics of the current reset chip U1, the reset chip U1 outputs a low level through the output terminal VOUT when being powered on for the first time (the specific time depends on the specific model of the reset chip U1), so in this embodiment, the power supply terminal VDD of the reset chip U1 needs to be connected to the reset screening circuit 200 instead of connecting the output terminal VOUT of the reset chip U1 to the reset screening circuit 200, so that the signal received by the control chip SOC is not interfered by the reset chip U1, and the accuracy of resetting the control chip SOC is increased.
The operation principle of the reset starting circuit 100 in this embodiment is described as follows, taking an example that the reset threshold of the reset chip U1 is 1.2V:
during normal work, the KEY input end KEY of the control chip is 3.3V, the first triode Q1 is conducted at the moment, the second MOS tube MOS2 is conducted, the first MOS tube MOS1 is cut off, the power supply end VDD of the RESET chip is 3.3V, the RESET chip U1 works normally, RESET cannot be triggered, the output end VOUT of the RESET chip is 3.3V, and the RESET end SOC-RESET of the control chip receives high level and does not RESET.
When a KEY K1 is pressed (continuously pressed), a KEY input end KEY of the control chip is at a low level, the first triode Q1 and the second MOS tube MOS2 are cut off, the first MOS tube MOS1 is conducted, a power supply end VDD of the RESET chip is 3.3V (namely the voltage at two ends of the first capacitor C1), discharging is carried out through a fourth resistor R4, when the voltage is discharged to 1.2V, the RESET chip U1 is triggered to RESET, an output end VOUT of the RESET chip outputs a low level of 200ms, and a RESET end SOC-RESET of the control chip receives the low level RESET signal to RESET.
It should be noted that the time for pressing the key K1 is the time for discharging the first capacitor C1 from 3.3V to 1.2V through the fourth resistor R4, and the pressing duration of the key K1 for triggering the system reset can be obtained by configuring the fourth resistor R4 and the first capacitor C1 according to the actual situation and selecting the reset chip U1 with a proper threshold.
Of course, the output unit 120 may further include a second transistor Q2 and a sixth resistor R6; the base of the second triode Q2 is connected to the second end of the fifth resistor R5, the collector of the second triode Q2 is connected to the power supply 3V3 via the sixth resistor R6, the collector of the second triode Q2 is also connected to the RESET terminal SOC-RESET of the control chip, and the emitter of the second triode Q2 is grounded.
It should be understood that the sixth resistor R6 is a pull-up resistor, and the reset mechanism of the control chip SOC changes from low reset to high reset after the second transistor Q2 and the sixth resistor R6 are added. That is, in a normal condition, the RESET chip U1 outputs a high level of 3.3V, the second transistor Q2 is turned on, and the RESET terminal SOC-RESET of the control chip receives a low level and does not perform RESET.
When the key K1 is pressed (continuously pressed), the RESET chip U1 outputs a low level of 200ms, the second triode Q2 is turned off, and the RESET terminal SOC-RESET of the control chip receives a high level to RESET.
Further, the reset screening circuit 200 includes a switch unit 220 and a self-locking unit 210; the switch unit 220 is respectively connected to the start unit 110, the output unit 120, the self-locking unit 210 and the input terminal RST-MARK of the control chip, and the self-locking unit 210 is connected to the output terminal RST-MARK-CLR of the control chip.
Specifically, the switching unit 220 includes a first diode D1 and a second diode D2; the cathode of the first diode D1 is connected to the output unit 120 and the start unit 110, respectively, the anode of the first diode D1 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the self-locking unit 210 and the input terminal RST-MARK of the control chip, respectively.
The self-locking unit 210 comprises a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a third triode Q3, a fourth triode Q4 and a third capacitor C3; a first end of the seventh resistor R7 is connected to the power supply 3V3, and a second end of the seventh resistor R7 is connected to a first end of the eighth resistor R8, an emitter of the third transistor Q3, a first end of the ninth resistor R9, and a first end of the third capacitor C3, respectively; a second end of the eighth resistor R8 is respectively connected to the base of the third transistor Q3, the collector of the fourth transistor Q4, the anode of the second diode D2, and the input terminal RST-MARK of the control chip; a collector of the third transistor Q3 is connected to a first end of the tenth resistor R10 and a base of the fourth transistor Q4, respectively, and a base of the third transistor Q3 is connected to an input terminal RST-MARK of the control chip; a second terminal of the tenth resistor R10, an emitter of the fourth transistor Q4, and a second terminal of the third capacitor C3 are all grounded; the second end of the ninth resistor R9 is connected with the output end RST-MARK-CLR of the control chip.
It should be understood that the main function of the reset discrimination circuit 200 is to determine whether the reason for causing the reset is a normal power-on reset or a software reset, or a reset triggered by the key K1, so as to provide a basis for the control chip SOC to adopt a corresponding reset mechanism.
It should be noted that the output signal RST-MARK-CLR of the control chip is set to a high level by default, and is used for clearing the low level of the third triode Q3 and the fourth triode Q4 in the self-locking state; the input end RST-MARK of the control chip is used for caching a starting signal of the input end when the reset chip U1 triggers resetting, and the problem that the source of resetting cannot be distinguished after the system is started is avoided.
The working principle of the reset discrimination circuit in the embodiment is as follows:
under normal conditions, the output end RST-MARK-CLR of the control chip is at high level, the third triode Q3 and the fourth triode Q4 are cut off, and the input end RST-MARK of the control chip is at high level. When the key K1 is pressed (continuously pressed), the power supply terminal VDD voltage of the reset chip is lowered from 3.3V to a threshold value (e.g., 1.2V), the reset chip U1 is triggered to reset, the output terminal VOUT of the reset chip outputs a low level, and meanwhile, due to the unidirectional conductivity of the diodes, the first diode D1 and the second diode D2 are both turned on, the input terminal RST-MARK of the control chip is at a low level, the third transistor Q3 and the fourth transistor Q4 are turned on, and the input terminal RST-MARK of the control chip is locked to a low level.
After the system is reset, the reason for triggering the reset is judged by detecting the level of the input end RST-MARK of the control chip, when the input end RST-MARK of the control chip is at a low level, the reset caused by the key K1 is judged, and when the input end RST-MARK of the control chip is at a high level, the normal reset is judged. The SOC of the control chip executes different software mechanisms according to different reset reasons, and meanwhile, the output end RST-MARK-CLR of the control chip outputs a low level and then outputs a high level so as to clear that the input end RST-MARK of the control chip is locked to be a low level, and therefore the next judgment is facilitated.
In a specific implementation, the system can pack and compress software in an initial state and back up the software in a memory. When the system is normally reset and started, the system is started according to a normal flow, when the system has a non-hardware fault, the system is reset by pressing a key K1 for a long time (the specific pressing time is determined according to the actual design), the system decompresses the backup initial software, and the initial state is reset again.
According to the embodiment, through the specific design of the reset starting circuit and the reset discrimination circuit, the problems that the system is not started and the like caused by non-hardware faults can be effectively solved, when the key is triggered by long time, the system is reset by adopting a corresponding reset mechanism, after-sales personnel are not required to be on-door, and the after-sales cost is reduced.
The utility model also provides an electronic device, the electronic device includes the reset circuit as described above, the circuit structure of the reset circuit of the electronic device can refer to the above-mentioned embodiment, and the description is omitted here; it can be understood that, since the electronic device of the present embodiment adopts the technical solution of the reset circuit, the electronic device has all the above beneficial effects; it should be understood that the electronic device may be a smart phone, a tablet computer, a smart television, and the like, which is not limited in this embodiment.
The above is only the preferred embodiment of the present invention, and not the scope of the present invention, all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or the direct or indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. A reset circuit is characterized by comprising a reset starting circuit and a reset discrimination circuit; wherein the content of the first and second substances,
the reset starting circuit is respectively connected with the key, the control chip and the reset discrimination circuit and is used for respectively sending a reset signal to the control chip and sending a starting signal to the reset discrimination circuit when the key is triggered by the outside;
the reset discrimination circuit is connected with the control chip and used for transmitting the starting signal to the control chip so that the control chip resets when receiving the resetting signal sent by the reset starting circuit and the starting signal sent by the reset discrimination circuit.
2. The reset circuit of claim 1, wherein the reset enable circuit comprises an enable unit and an output unit; wherein the content of the first and second substances,
the starting unit is respectively connected with the key, the control chip, the reset discrimination circuit and the output unit and is used for respectively sending starting signals to the output unit and the reset discrimination circuit when detecting a trigger signal sent when the key is triggered by the outside;
and the output unit is respectively connected with the reset discrimination circuit and the control chip and is used for sending a reset signal to the control chip when receiving the starting signal.
3. The reset circuit of claim 2, wherein the start-up unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, a first MOS transistor, a second MOS transistor, and a first capacitor; wherein the content of the first and second substances,
the first end of the first resistor is connected with a power supply, and the second end of the first resistor is respectively connected with the key, the key input end of the control chip, the base of the first triode and the grid of the first MOS tube;
a collector of the first triode is connected with a first end of the second resistor, and an emitter of the first triode is grounded;
the second end of the second resistor is respectively connected with the power supply and the grid electrode of the second MOS tube;
the source electrode of the second MOS tube is connected with the power supply through the third resistor, and the drain electrode of the second MOS tube is respectively connected with the first end of the first capacitor, the output unit and the reset discrimination circuit;
the source electrode of the first MOS tube and the second end of the first capacitor are both grounded;
and the drain electrode of the first MOS tube is grounded through the fourth resistor.
4. The reset circuit according to claim 3, wherein the output unit includes a fifth resistor, a second capacitor, and a reset chip; wherein the content of the first and second substances,
a first end of the fifth resistor is connected with the power supply, and a second end of the fifth resistor is respectively connected with an output end of the reset chip, a first end of the second capacitor and a reset end of the control chip;
the power supply end of the reset chip is respectively connected with the drain electrode of the second MOS tube and the reset discrimination circuit, and the grounding end of the reset chip is grounded;
and the second end of the second capacitor is grounded.
5. The reset circuit of claim 4, wherein the output unit further comprises a second transistor and a sixth resistor; the base electrode of the second triode is connected with the second end of the fifth resistor, the collector electrode of the second triode is connected with the power supply through the sixth resistor, the collector electrode of the second triode is further connected with the reset end of the control chip, and the emitting electrode of the second triode is grounded.
6. The reset circuit of claim 5, wherein the fourth resistor is an adjustable resistor and the first capacitor is an adjustable capacitor.
7. The reset circuit according to any one of claims 3 to 6, wherein the reset discrimination circuit comprises a switching unit and a self-locking unit; the switch unit is respectively connected with the starting unit, the output unit, the self-locking unit and the input end of the control chip, and the self-locking unit is connected with the output end of the control chip.
8. The reset circuit of claim 7, wherein the switching unit includes a first diode and a second diode; the cathode of the first diode is connected with the output unit and the starting unit respectively, the anode of the first diode is connected with the cathode of the second diode, and the anode of the second diode is connected with the self-locking unit and the input end of the control chip respectively.
9. The reset circuit of claim 8, wherein the self-locking unit comprises a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a third transistor, a fourth transistor, and a third capacitor; wherein the content of the first and second substances,
a first end of the seventh resistor is connected to the power supply, and a second end of the seventh resistor is connected to the first end of the eighth resistor, the emitter of the third triode, the first end of the ninth resistor, and the first end of the third capacitor, respectively;
a second end of the eighth resistor is respectively connected with a base electrode of the third triode, a collector electrode of the fourth triode, an anode of the second diode and an input end of the control chip;
a collector of the third triode is respectively connected with the first end of the tenth resistor and the base of the fourth triode, and the base of the third triode is connected with the input end of the control chip;
a second end of the tenth resistor, an emitter of the fourth triode and a second end of the third capacitor are all grounded;
and the second end of the ninth resistor is connected with the output end of the control chip.
10. An electronic device comprising a reset circuit as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922492376.XU CN210721354U (en) | 2019-12-30 | 2019-12-30 | Reset circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922492376.XU CN210721354U (en) | 2019-12-30 | 2019-12-30 | Reset circuit and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210721354U true CN210721354U (en) | 2020-06-09 |
Family
ID=70926631
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922492376.XU Active CN210721354U (en) | 2019-12-30 | 2019-12-30 | Reset circuit and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210721354U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113885683A (en) * | 2020-07-03 | 2022-01-04 | 深圳市万普拉斯科技有限公司 | Intelligent terminal, hard reset control method and device and computer equipment |
| WO2024007835A1 (en) * | 2022-07-08 | 2024-01-11 | 深之蓝(天津)水下智能科技有限公司 | Power source turn-on/turn-off control circuit and system for reset switch |
| CN113885683B (en) * | 2020-07-03 | 2024-05-31 | 深圳市万普拉斯科技有限公司 | Intelligent terminal, hard reset control method and device and computer equipment |
-
2019
- 2019-12-30 CN CN201922492376.XU patent/CN210721354U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113885683A (en) * | 2020-07-03 | 2022-01-04 | 深圳市万普拉斯科技有限公司 | Intelligent terminal, hard reset control method and device and computer equipment |
| CN113885683B (en) * | 2020-07-03 | 2024-05-31 | 深圳市万普拉斯科技有限公司 | Intelligent terminal, hard reset control method and device and computer equipment |
| WO2024007835A1 (en) * | 2022-07-08 | 2024-01-11 | 深之蓝(天津)水下智能科技有限公司 | Power source turn-on/turn-off control circuit and system for reset switch |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106874149B (en) | Hardware watchdog logic circuit | |
| CN211086558U (en) | Network camera fault detection circuit and device | |
| CN102981425A (en) | Startup and shutdown circuit | |
| CN210721354U (en) | Reset circuit and electronic device | |
| CN102063172B (en) | Forced power off circuit | |
| CN114089714B (en) | portable electronic device | |
| CN210609103U (en) | Reset detection circuit and electronic equipment | |
| CN210742886U (en) | Startup and shutdown circuit | |
| CN103713912A (en) | Automatic power on circuit of computer | |
| CN110350902B (en) | Anti-misoperation circuit and anti-misoperation device | |
| CN107809229B (en) | Multi-key combined hardware reset circuit and electronic product | |
| CN217467616U (en) | Power supply control circuit and electronic device | |
| CN217307659U (en) | Key control circuit, intelligent door lock and intelligent door | |
| CN216014202U (en) | Power supply and power-on reset circuit of RF transmitting chip | |
| CN209448720U (en) | A kind of electric appliance reset circuit and electrical equipment | |
| CN211698879U (en) | Singlechip crash-proof protection circuit | |
| CN211830739U (en) | Light touch key power supply circuit and electronic equipment | |
| CN210573747U (en) | CMOS data fault clearing circuit, system and computer host | |
| CN209497440U (en) | The key circuit and electronic equipment of a kind of electronic equipment | |
| CN209981046U (en) | Bistable self-locking switch circuit | |
| CN213754479U (en) | Combination key reset circuit of handheld device and device thereof | |
| CN216388011U (en) | Reset circuit and terminal equipment powered by built-in battery | |
| CN213783652U (en) | Monitoring circuit, constant current drive device and car light | |
| CN217212903U (en) | Power failure alarm circuit based on super capacitor | |
| CN211127759U (en) | Automatic reset circuit and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |