CN210666429U - PMU collection system - Google Patents
PMU collection system Download PDFInfo
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- CN210666429U CN210666429U CN201921995311.0U CN201921995311U CN210666429U CN 210666429 U CN210666429 U CN 210666429U CN 201921995311 U CN201921995311 U CN 201921995311U CN 210666429 U CN210666429 U CN 210666429U
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Abstract
The utility model discloses a PMU collection system, it is including the built-in microprocessor that has the counter, communication module, synchronizing signal generator and the satellite clock receiving module who is connected with microprocessor, still including voltage transformer and current transformer, voltage transformer loop through first low pass filter, first comparator with microprocessor connects, current transformer loop through second low pass filter and second comparator with microprocessor connects, microprocessor still through first DA converter with first comparator connects, microprocessor still through second DA converter with the second comparator connects. The utility model provides a PMU collection system, it has transmission efficiency height, data acquisition's the degree of accuracy advantage such as high.
Description
Technical Field
The utility model relates to an electric power system supervisory equipment technical field, concretely relates to PMU collection system.
Background
In a traditional power system monitoring device, mirror image information is usually adopted, and monitoring devices are added to ensure monitoring stability; meanwhile, the reliability of the data is ensured by relying on a fixed data network. When one of the hardware devices in the monitoring device fails, the monitoring network fails or the redundancy is reduced.
In order to enhance the reliability and accuracy of monitoring, a synchrophasor measurement device is provided in the power system monitoring equipment. A synchronous Phasor Measurement Unit (PMU) is a phasor measurement unit formed by using a Global Positioning System (GPS) second pulse as a synchronous clock, can be used in the fields of dynamic monitoring, system protection, system analysis and prediction and the like of a power system, and is important equipment for ensuring the safe operation of a power grid power system. The synchronous phasor measurement technology is applied or has application prospects in the aspects of power system state estimation and dynamic monitoring, stable prediction and control, model verification, relay protection, fault positioning and the like.
The PMU based on the GPS clock can measure phasor data such as voltage phase, current phase and the like of a pivot point of the power system, the data are transmitted to the monitoring main station through the communication network, and the monitoring main station determines how to split, switch and load the system when suffering system disturbance according to the phase amplitude of different points, so that further expansion of accidents and even power grid breakdown are prevented.
The conventional PMU generally includes a voltage-current transformer, a low-pass filter, an a/D converter, a synchronization signal generator, a GPS receiving module, a memory unit, a microprocessor, and a communication module, and its specific hardware configuration is shown in fig. 1. In a conventional PMU, the input signals thereof usually include: (1) inputting line voltage and line current signals (monitoring CT); (2) inputting a switching value signal; (3) the input of the generator shaft position pulse can be a phase discrimination signal or a rotating speed signal; (4) 4-20mA control signals for excitation, AGC, etc.; (5) GPS standard time signals.
The conventional PMU has the following defects: (1) the efficiency of the sampling value obtained by the ADC still needs to be improved; (2) when the zero crossing point is analyzed, the zero crossing point is sampled through the AD value, and the accuracy is not accurate enough; (3) by adopting the asynchronous communication mode, the consistency of the transmitted data is not high.
Therefore, there is a need for a new PMU collection device that solves at least one of the problems of the prior art.
SUMMERY OF THE UTILITY MODEL
For the problem of overcoming prior art not enough and existence, the utility model provides a PMU collection system, this PMU collection system have transmission efficiency height, data acquisition's the degree of accuracy advantage such as high.
The utility model discloses a realize through following technical scheme: a PMU acquisition device comprises a microprocessor, a communication module, a synchronous signal generator, a satellite clock receiving module, a voltage transformer and a current transformer, wherein the communication module, the synchronous signal generator and the satellite clock receiving module are connected with the microprocessor; wherein:
the synchronous signal generator is used for realizing time synchronization among different devices;
the satellite clock receiving module is used for acquiring a synchronous clock signal and transmitting the synchronous clock signal to the synchronous signal generator through the microprocessor;
the first comparator is used for comparing the voltage signal output by the first low-pass filter with the analog signal output by the first D/A converter, and the second comparator is used for comparing the voltage signal output by the second low-pass filter with the analog signal output by the second D/A converter;
the microprocessor outputs digital signals to the first D/A converter and the second D/A converter, and the microprocessor outputs voltage signals and current signals obtained by sampling according to comparison results of the first comparator and the second comparator.
Preferably, the output end of the first D/a converter is connected to the positive input end of the first comparator, and the output end of the first low-pass filter is connected to the negative input end of the first comparator; the output end of the second D/A converter is connected with the positive input end of the second comparator, and the output end of the second low-pass filter is connected with the negative input end of the second comparator.
Further, a memory unit is connected to the microprocessor.
Preferably, the chip model of the microprocessor is TMS320F28335 PGFA.
Preferably, the chip model of the first D/a converter and the second D/a converter is TI DAC 5662.
Preferably, the voltage transformer and the current transformer are integrated in a combined voltage current transformer; preferably, the combined voltage and current transformer is of the type JLSZV-
35KV。
Preferably, the first comparator and the second comparator are ultrafast low-power-consumption precise comparators; preferably, the model of the ultrafast low-power-consumption precision comparator is TL3116 ID.
Compared with the prior art, the utility model provides a PMU collection system has following advantage:
(1) the sampling value is obtained by a D/A converter and a comparator, and the sampling value obtained by the conventional high-speed ADC is replaced, so that the sampling efficiency is higher;
(2) the zero crossing point is detected through the comparator, and compared with the existing method that the zero crossing point is analyzed by adopting AD value sampling, the accuracy is higher;
(3) the communication mode of the synchronous signal generator and the communication module is adopted, and the traditional asynchronous communication mode is not adopted, so that the transmitted data can keep better consistency.
Drawings
FIG. 1 is a schematic circuit diagram of a synchrophasor measurement apparatus in the prior art;
fig. 2 is a schematic circuit structure diagram of the PMU collecting device provided by the present invention.
Detailed Description
To facilitate understanding of those skilled in the art, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.
As shown in fig. 2, the PMU collecting device includes a microprocessor with a built-in counter, a communication module connected to the microprocessor, a synchronous signal generator, a satellite clock receiving module, a voltage transformer and a current transformer, wherein the voltage transformer is connected to the microprocessor through a first low-pass filter and a first comparator in sequence, the current transformer is connected to the microprocessor through a second low-pass filter and a second comparator in sequence, the microprocessor is further connected to the first comparator through a first D/a converter, and the microprocessor is further connected to the second comparator through a second D/a converter.
Wherein: the communication module is used for realizing the communication function of the PMU acquisition device; the synchronous signal generator is used for realizing time synchronization among different devices; the communication module and the synchronous signal generator are connected with a device or an upper computer needing communication;
the satellite clock receiving module is used for acquiring a synchronous clock signal and transmitting the synchronous clock signal to the synchronous signal generator through the microprocessor;
the voltage transformer is used for acquiring a sampling voltage signal; the current transformer is used for acquiring a sampling current signal and converting the current signal into a corresponding voltage signal which can be processed by the PMU acquisition device;
the first low-pass filter is used for filtering the voltage signal output by the voltage transformer; the second low-pass filter is used for filtering the voltage signal output by the current transformer; the first low-pass filter and the second low-pass filter can remove interference signals coupled into a system through channels of the voltage transformer and the current transformer, and pure voltage and current signals are ensured to be collected;
the first D/A converter is used for converting the digital signal output by the microprocessor into an analog signal; the second D/A converter is used for converting the digital signal output by the microprocessor into an analog signal;
the first comparator is used for comparing the voltage signal output by the first low-pass filter with the analog signal output by the first D/A converter; the second comparator is used for comparing the voltage signal output by the second low-pass filter with the analog signal output by the second D/A converter; in this embodiment, the output end of the first D/a converter is connected to the positive input end of the first comparator, the output end of the first low-pass filter is connected to the negative input end of the first comparator, and the output end of the first comparator is connected to the microprocessor; the output end of the second D/A converter is connected with the positive input end of a second comparator, the output end of a second low-pass filter is connected with the negative input end of the second comparator, and the output end of the second comparator is connected with the microprocessor;
the microprocessor outputs digital signals to the first D/A converter and the second D/A converter, and the microprocessor outputs voltage signals and current signals obtained by sampling according to comparison results of the first comparator and the second comparator.
As a preferred embodiment, the microprocessor may be further connected with a memory unit; the memory unit may be built in the microprocessor or external to the microprocessor. The microprocessor is mainly used for realizing the functions of processing sampling, operation, data storage, communication and the like. The microprocessor is also used for continuously outputting values to the first D/A converter and the second D/A converter. In this embodiment, the chip model of the microprocessor is preferably TMS320F28335PGFA, and the chip models of the first D/a converter and the second D/a converter are preferably TI DAC 5662.
The voltage transformer can synchronously reduce the voltage value of the sampling signal according to a certain proportion so as to enable the input voltage signal to accord with the voltage of the detection circuit; similarly, the current transformer can synchronously reduce the current value of the sampling signal according to a certain proportion, so that the input current signal is converted into a voltage signal conforming to the detection circuit. Preferably, the voltage transformer and the current transformer are integrated in a combined voltage current transformer; in this embodiment, the combined voltage-current transformer is of the model number JLSZV-35 KV.
In one embodiment, the synchronization signal generator is formed by taking the second pulse in the satellite clock receiving module as a reference and adding a crystal oscillator clock of the microprocessor. In this embodiment, when the PMU collecting device communicates with another synchronous phasor measurement device or an upper computer, the synchronous signal generator is also connected to the corresponding synchronous phasor measurement device or the upper computer to achieve time synchronization, so that data consistency is maintained during data transmission.
In one embodiment, the first comparator and the second comparator are preferably ultra-fast low-power-consumption precise comparators; preferably, the model of the ultrafast low-power precision comparator is TL3116 ID.
The utility model discloses in, satellite clock receiving module, can be GPS module or big dipper module. The satellite clock receiving module, the memory unit, the synchronization signal generator, the communication module and the like are all functional modules existing in the prior art or capable of being realized in the prior art, and a detailed description thereof is omitted here.
In the PMU collecting device provided by this embodiment, in the data collecting process, the sampling value is obtained through the D/a converter and the comparator instead of the traditional sampling value obtained through the ADC, so that the efficiency is higher; in the data acquisition process, the zero crossing point is detected through the comparator, namely the zero crossing point is obtained in a level jump (or level conversion) mode output by the comparator, so that the speed is higher, the efficiency is higher, more accurate numerical values can be obtained without a plurality of sampling periods, and compared with the traditional PMU method that the data acquisition adopts an AD value to analyze the zero crossing point, the accuracy is higher. In addition, a communication mode of the synchronous signal generator and the communication module is adopted instead of a traditional asynchronous communication mode, so that better consistency of transmitted data can be maintained.
The utility model provides a PMU collection system's working process or theory of operation following brief explanation: the voltage transformer and the current transformer sample voltage signals and current signals to be monitored in the power system, the sampled voltage signals, the current signals are respectively filtered by a first low-pass filter and a second low-pass filter, voltage signals output after the current signals are filtered by the first low-pass filter are transmitted to the negative input end of a first comparator, a counter in the microprocessor continuously outputs numerical values (digital signals) to a first D/A converter, the first D/A converter converts the digital signals into analog signals and outputs the analog signals to the positive input end of the first comparator, the first comparator compares the analog signals output by the first D/A converter with the voltage signals output by the first filter, the microprocessor obtains voltage signals obtained by sampling according to the output result of the first comparator, and then the voltage values obtained by sampling are transmitted to an upper computer or other PMU acquisition devices through a communication module and a synchronous signal generator; similarly, the current signal output after the filtering processing by the second low-pass filter is transmitted to the negative input end of the second comparator, the counter in the microprocessor continuously outputs a numerical value (digital signal) to the second D/a converter, the second D/a converter converts the digital signal into an analog signal and outputs the analog signal to the positive input end of the second comparator, the second comparator compares the analog signal output by the second D/a converter with the voltage signal output by the second filter, the microprocessor obtains the current signal obtained by sampling according to the output result of the first comparator, and then the current value obtained by sampling is transmitted to the upper computer or other PMU collecting devices through the communication module and the synchronous signal generator.
Since the working principle of the first comparator and the second comparator for processing data is the same or similar, only the working process and working principle of the first comparator for processing data will be further described here:
when the first comparator compares the output signals of the first D/A converter and the first low-pass filter, if the input value of the positive input end of the first comparator is greater than that of the negative input end of the first comparator, the output value of the output end of the first comparator is a positive value, and if the input value of the positive input end of the first comparator is less than that of the negative input end of the first comparator, the output value of the output end of the first comparator is a negative value; if the output of the first comparator is a positive value originally, if the output value of the output end of the first comparator suddenly changes into a negative value, the moment when the output value of the first comparator suddenly changes (namely the moment when the output end of the first comparator generates level jump) is indicated, the numerical values of the positive input end and the negative input end of the first comparator are equal at the moment, the microprocessor directly reads the numerical value of the counter at the moment to obtain the voltage value obtained by sampling, the microprocessor can directly transmit the read voltage value through the communication module, and the microprocessor can also record and store the voltage value through an internal register and then transmit the voltage value through the communication module.
It should be noted that the present invention provides a PMU collection device that is applied to a computer program or a computer protocol when transmitting data or collecting data, but the present invention does not relate to an improvement of the computer program or the computer protocol.
The above embodiments are preferred implementations of the present invention, and are not intended to be limiting, and any obvious replacement is within the scope of the present invention without departing from the inventive concept of the present invention.
Claims (9)
1. A PMU collection device is characterized by comprising a microprocessor with a built-in counter, a communication module, a synchronous signal generator, a satellite clock receiving module, a voltage transformer and a current transformer, wherein the communication module, the synchronous signal generator and the satellite clock receiving module are connected with the microprocessor; wherein:
the synchronous signal generator is used for realizing time synchronization among different devices;
the satellite clock receiving module is used for acquiring a synchronous clock signal and transmitting the synchronous clock signal to the synchronous signal generator through the microprocessor;
the first comparator is used for comparing the voltage signal output by the first low-pass filter with the analog signal output by the first D/A converter, and the second comparator is used for comparing the voltage signal output by the second low-pass filter with the analog signal output by the second D/A converter;
the microprocessor outputs digital signals to the first D/A converter and the second D/A converter, and the microprocessor outputs voltage signals and current signals obtained by sampling according to comparison results of the first comparator and the second comparator.
2. The PMU collection device according to claim 1, characterized in that: the output end of the first D/A converter is connected with the positive input end of the first comparator, and the output end of the first low-pass filter is connected with the negative input end of the first comparator; the output end of the second D/A converter is connected with the positive input end of the second comparator, and the output end of the second low-pass filter is connected with the negative input end of the second comparator.
3. The PMU collection device according to claim 1, characterized in that: the microprocessor is also connected with a memory unit.
4. The PMU collection device according to claim 1, characterized in that: the chip model of the microprocessor is TMS320F28335 PGFA.
5. The PMU collection device according to claim 1, characterized in that: the chip model of the first D/A converter and the second D/A converter is TIDAC 5662.
6. The PMU collection device according to claim 1, characterized in that: the voltage transformer and the current transformer are integrated in the combined voltage current transformer.
7. The PMU collection device according to claim 6, characterized in that: the combined voltage and current transformer is JLSZV-35 KV.
8. The PMU collection device according to any of claims 1-7, characterized in that: the first comparator and the second comparator are ultrafast low-power-consumption precise comparators.
9. The PMU collection device according to claim 8, characterized in that: the model of the ultrafast low-power precision comparator is TL3116 ID.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921995311.0U CN210666429U (en) | 2019-11-18 | 2019-11-18 | PMU collection system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921995311.0U CN210666429U (en) | 2019-11-18 | 2019-11-18 | PMU collection system |
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| CN210666429U true CN210666429U (en) | 2020-06-02 |
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| CN201921995311.0U Active CN210666429U (en) | 2019-11-18 | 2019-11-18 | PMU collection system |
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