CN210626589U

CN210626589U - Multi-path high-precision direct-current power parameter sampling circuit based on ADS131E04 chip

Info

Publication number: CN210626589U
Application number: CN201922322009.5U
Authority: CN
Inventors: 刘永强; 赵富强; 李浩源; 李夏婷
Original assignee: Guangzhou Guanxing Electric Energy Technology Co ltd
Current assignee: Guangzhou Guanxing Electric Energy Technology Co ltd
Priority date: 2019-12-20
Filing date: 2019-12-20
Publication date: 2020-05-26
Anticipated expiration: 2029-12-20

Abstract

The utility model provides a multichannel high accuracy direct current power parameter sampling circuit based on ADS131E04 chip, including power supply circuit, sampling conversion conditioning circuit, analog-to-digital conversion circuit, relay circuit, MCU circuit; the analog-to-digital conversion circuit comprises an ADS131E04 chip; the analog-to-digital conversion circuit is connected with the power circuit and the sampling conversion conditioning circuit; the relay circuit is connected with the sampling conversion conditioning circuit; the MCU circuit is connected with the relay circuit; the power supply circuit is configured to supply power to the analog-to-digital conversion circuit; the MCU circuit is configured to send signals to the relay circuit, and the relay circuit is controlled to be connected with the sampling conversion conditioning circuit so as to select different measuring ranges for sampling; the analog-to-digital conversion circuit is configured to receive the analog signal transmitted by the sampling conversion conditioning circuit and convert the analog signal into a digital signal for output; the sampling circuit integrates multiple sampling channels, high precision and multiple ranges, and has high compatibility.

Description

Multi-path high-precision direct-current power parameter sampling circuit based on ADS131E04 chip

Technical Field

The utility model relates to a power electronic technology field especially relates to a multichannel high accuracy direct current power parameter sampling circuit based on ADS131E04 chip.

Background

At present, direct current power supply networks are widely used in urban rail transit and micro-grids. The condition monitoring of a direct current network, the direct current electric energy metering, the direct current electric energy quality monitoring and analysis, the research on the influence degree of a direct current system on an alternating current system and the like do not leave multiple sampling channels and high-precision acquisition and processing of direct current electric power parameters. In the prior art, most direct current electric measurement is realized by converting large current and large voltage into small current and small voltage to be input into a sampling circuit by using a Hall sensor, the sampling circuit measurement channels of direct current electric parameters of a plurality of manufacturers are few, the data sampling precision is low, and for instruments which need to be replaced with corresponding measurement ranges when measuring direct currents in different ranges, the main sampling circuit in the traditional instrument for monitoring the direct current electric parameters is few in sampling channels and high in production cost.

For example, chinese patent publication No. CN204855683U discloses a dual-channel dc high-voltage precise intelligent power instrument, which includes a sensing unit for acquiring dual-channel dc signals, a main control unit for processing based on the dual-channel dc signals acquired by the sensing unit, a human-computer interaction unit for displaying the processing result of the main control unit and setting the working parameters of the main control unit, and a power module for supplying power to the main control unit and the sensing unit; the main control unit is respectively connected with the sensing unit and the human-computer interaction unit; and the power supply module is respectively connected with the sensing unit and the main control unit. The sampling circuit of the technical scheme of this patent is two-way sampling, and its sampling circuit measurement passageway of direct current power parameter is less.

Therefore, in order to solve the problems in the prior art, it is urgently needed to provide a dc power parameter sampling technique that integrates multiple sampling channels, high precision, and multiple ranges, and has high compatibility.

SUMMERY OF THE UTILITY MODEL

The utility model aims to avoid the defects in the prior art, and provide a multichannel high-precision direct current power parameter sampling circuit based on ADS131E04 chip, the circuit design can realize the adjustment of three ranges of remote control for the measuring range of the acquisition circuit, the ranges are respectively 0-25mA, 0-50mA and 0-100mA, and the circuit is suitable for the direct current of the measuring range below 500A; by using the sampling circuit of the ADS131E04 chip, the data operation rate can reach 64KSPS, the sampling current precision is 0.2 level, and accurate data are provided for monitoring the power quality of the direct current electric equipment.

The purpose of the utility model is realized through the following technical scheme:

a multi-path high-precision direct current power parameter sampling circuit based on an ADS131E04 chip comprises a power circuit, a sampling conversion conditioning circuit, an analog-to-digital conversion circuit, a data transmission wiring terminal, a relay circuit and an MCU circuit;

the analog-to-digital conversion circuit is connected with the power circuit, the sampling conversion conditioning circuit and the data transmission wiring terminal; the relay circuit is connected with the sampling conversion conditioning circuit; the MCU circuit is connected with the relay circuit;

the power supply circuit is configured to supply power to the analog-to-digital conversion circuit; the MCU circuit is configured to send signals to the relay circuit, and the relay circuit is controlled to be connected with the sampling conversion conditioning circuit so as to select different measuring ranges for sampling;

the analog-to-digital conversion circuit is configured to receive the analog signal transmitted by the sampling conversion conditioning circuit, convert the analog signal into a digital signal and output the digital signal to the data transmission wiring terminal.

The power supply circuit comprises three sub-circuits and a power supply wiring terminal, wherein the three sub-circuits are respectively a DVDD power supply circuit, an AVDD power supply circuit and an AVSS power supply circuit; the power supply wiring terminal comprises an SVCC, +5VCC and a public negative terminal (GND) and is used for being externally connected with a power supply;

the DVDD power supply circuit is connected with the SVCC end so that the DVDD power supply circuit outputs analog-to-digital conversion reference voltage to the analog-to-digital conversion circuit after filtering the received external power supply SVCC;

specifically, a power supply DVDD (DVDD, analog-to-digital conversion reference voltage) obtained by filtering an external power supply SVCC of a DVDD power supply circuit in the power supply circuit supplies power to the ADS131E04 chip of the analog-to-digital conversion circuit.

The AVDD power supply circuit comprises a low dropout linear voltage regulation chip; the AVDD power supply circuit is connected with a +5VCC end, so that the AVDD power supply circuit converts a received +5VCC voltage (5 VCC means that 5V voltage is provided to the ground only through a switch at an open position) into an analog-to-digital conversion reference voltage through a low-voltage-difference linear voltage stabilizing chip and outputs the analog-to-digital conversion reference voltage to an analog-to-digital conversion circuit so as to supply power to a voltage reference chip of the analog-to-digital conversion circuit and an ADS131E04 chip;

the AVSS power supply circuit comprises a DC-DC power supply chip and a low-voltage difference linear voltage stabilizing chip; the AVSS power supply circuit is connected with the +5VCC end, so that the AVSS power supply circuit converts the received +5VCC voltage into AVSS voltage (namely analog circuit ground) through the DC-DC power supply chip and the low-dropout linear voltage stabilization chip and outputs the AVSS voltage to the analog-to-digital conversion circuit, and supplies power for the voltage reference chip of the analog-to-digital conversion circuit and the ADS131E04 chip.

Specifically, the power supply circuit is characterized in that an external power supply SVCC is used for filtering to obtain a power supply DVDD (DVDD, analog-to-digital conversion reference voltage) which is used for supplying power to an ADS131E04 chip of the analog-to-digital conversion circuit, the +5VCC is sequentially converted into AVDD through a low-voltage-difference linear voltage stabilizing chip, and the +5VCC is sequentially converted into an AVSS through a DC-DC power supply chip and a low-voltage-difference linear voltage stabilizing chip, so that the AVDD and the AVSS provide a stable and reliable working power supply for a voltage reference chip and the ADS131E04 chip.

The relay circuit comprises six identically constructed sub-circuits, wherein each sub-circuit comprises a relay and an optocoupler; the relay comprises a coil, a common contact and a normally open contact; one end of the relay coil is connected with a +5VCC power supply, and the other end of the relay coil is connected with a collector electrode of the optical coupler; the common contact of the relay is grounded GND, and the normally open contact of the relay is connected with the sampling conversion conditioning circuit; the anode of the light emitting diode of the optical coupler is connected with a VDD33 power supply, and the cathode of the light emitting diode of the optical coupler is connected with the MCU circuit;

the MCU circuit comprises a control chip, the control chip is connected with the relay circuit, and the control chip outputs signals to the relay circuit.

In the above, the control chip includes six level output ports, and the six level output ports are correspondingly connected with six sub-circuits in the relay circuit.

Specifically, when the control chip outputs a low level (i.e., a DO0 low level) to the optocoupler of the relay circuit, the light emitting diode of the optocoupler works to light, the CE electrode of the optocoupler is conducted, the coil of the relay is conducted, the relay contact is changed from a normally open state to a normally closed state, so that the YK1 and the ground (COM 1) are connected together, and at the moment, the current input range of the sampling conversion conditioning circuit is 0-25 mA; similarly, when the DO1 is at a low level and the DO0 and the DO2 are at a high level, the YK2 and the ground (COM 1) are connected together, and the current input range of the sampling conversion conditioning circuit is 0-50 mA; when DO2 is low and DO0 and DO1 are high, YK3 and ground (COM 1) are connected together, and the current input range of the sampling conversion conditioning circuit is 0-100 mA.

The sampling conversion conditioning circuit comprises two paths of adjustable range sampling circuits with the same structure and two paths of non-adjustable range sampling circuits with the same structure; the adjustable range sampling circuit and the non-adjustable range sampling unit respectively comprise a signal input end connected with the external sensing unit and a signal output end connected with the analog-to-digital conversion circuit;

the adjustable range sampling circuit comprises three precise sampling resistors, a first TVS diode, a first resistor and a first capacitor, wherein the first TVS diode is provided with three pins which are respectively a first cathode, a second cathode and an anode; the three precision sampling resistors are respectively a first precision sampling resistor, a second precision sampling resistor and a third precision sampling resistor; the second cathode of the first TVS diode is connected with a first resistor, and the other end of the first resistor is connected with a signal input end; two ends of the first capacitor are respectively connected with a second cathode and an anode of the first TVS diode; the first resistor and the first capacitor form a first RC filter, and the first RC filter is used for filtering noise of an input signal of the adjustable range sampling circuit;

and one ends of the first precise sampling resistor, the second precise sampling resistor and the third precise sampling resistor are connected with a signal input end, and the other ends of the first precise sampling resistor, the second precise sampling resistor and the third precise sampling resistor are respectively and correspondingly connected with a normally open contact of a coil of the relay circuit.

Specifically, because the number of the adjustable range sampling circuits is two, the two adjustable range sampling circuits have six precise sampling resistors, and the six precise sampling resistors are respectively and correspondingly connected with six sub-circuits of the relay circuit, so that the selection of the range is realized.

Specifically, the first precise sampling resistor, the second precise sampling resistor and the third precise sampling resistor are respectively used as precise sampling resistors of the sampling circuits with the ranges of 0-25mA, 0-50mA and 0-100 mA; level signals are output through the MCU circuit, so that a specific adjustable range sampling circuit channel is selected, and range selection is realized.

In particular, the TVS diode can ensure that the input voltage is limited to 0-5V to protect the analog-to-digital conversion circuit.

The non-adjustable sampling circuit comprises a fourth precise sampling resistor, a second TVS diode, a second resistor and a second capacitor, wherein the second TVS diode is provided with three pins which are respectively a first cathode, a second cathode and an anode; a second cathode of the second TVS diode is connected with a second resistor, and the other end of the second resistor is connected with the signal input end; two ends of the second capacitor are respectively connected with a second cathode and an anode of the second TVS diode; the second resistor and the second capacitor form a second RC filter, and the second RC filter is used for filtering noise of the input signal of the non-adjustable range sampling circuit.

One end of the fourth precision sampling resistor is grounded, and the other end of the fourth precision sampling resistor is connected with the signal input end;

in the above, the sampling conversion conditioning circuit converts the received small current signal of the external sensing unit into a voltage signal of less than or equal to 4.096V through the precision sampling resistor and outputs the voltage signal to the chip ADS131E 04.

Preferably, the first precision sampling resistor, the second precision sampling resistor, the third precision sampling resistor and the fourth precision sampling resistor are resistors with the precision of 0.1% and the temperature coefficient of 10 PPm/DEG C.

Preferably, the model of the TVS diode is PESD5V0L2 BT.

The analog-to-digital conversion circuit comprises a voltage reference chip and an ADS131E04 chip; the VIN pin of the voltage reference chip is connected with an AVDD power circuit of the power circuit, the GND pin of the voltage reference chip is connected with an AVSS power circuit of the power circuit, and the OUT pin of the voltage reference chip is connected with the VREFP pin of the ADS131E04 chip and is used for receiving the reference voltage output by the voltage reference chip.

The ADS131E04 chip comprises an input pin connected with the signal output end of the sampling conversion conditioning circuit, and a plurality of output pins for outputting digital signals, wherein the output pins are connected with the data transmission wiring terminals.

Specifically, the ADS131E04 chip is an analog-to-digital converter, and is configured to convert a received analog signal into a digital signal for output.

Preferably, the model of the voltage reference chip is REF 5040.

Above, data transmission binding post includes the EN end (enables the end), the EN end is connected with power supply circuit.

Specifically, the analog-to-digital conversion circuit converts the analog signal of the direct current voltage and the analog signal of the direct current collected by the sampling conversion conditioning circuit into digital signals, and then communicates with an external singlechip through a data transmission connection terminal.

Preferably, the model of the control chip is STM8S 003.

The utility model has the advantages that:

the utility model provides a sampling circuit, it has two ways of adjustable range sampling circuits and two ways of unadjustable range sampling circuits, and its sampling precision is high, and measurable direct current range is wide, and has four ways of sampling passageways, and sampling range accessible external equipment control MCU module is regulated and control; the circuit adopts a network mode to realize direct adjustment of the sampling range of the sampling current, realizes remote control adjustment of three ranges, wherein the ranges are respectively 0-25mA, 0-50mA and 0-100mA, and can be suitable for direct current in a measurement range below 500A; by using the sampling circuit of the ADS131E04 chip, the data operation rate can reach 64KSPS, the sampling current precision is 0.2 level, and accurate data are provided for monitoring the power quality of the direct current electric equipment.

Drawings

Fig. 1 is a schematic diagram of a circuit module connection of a sampling circuit provided by the present invention;

fig. 2 is a schematic diagram of a power circuit connection of the sampling circuit provided by the present invention;

fig. 3 is a schematic diagram of a sampling conversion conditioning circuit of the sampling circuit provided by the present invention;

fig. 4 is a schematic diagram of a relay circuit connection of the sampling circuit provided by the present invention;

fig. 5 is a schematic diagram of the MCU circuit connection of the sampling circuit provided by the present invention;

fig. 6 is a schematic diagram of the connection of the analog-to-digital conversion circuit of the sampling circuit provided by the present invention;

fig. 7 is the utility model provides a sampling circuit's data transmission binding post sketch map.

Detailed Description

The following describes the present invention with reference to the accompanying drawings.

As shown in fig. 1 to 7, the sampling circuit for the multi-path high-precision direct current power parameter based on the ADS131E04 chip comprises a power circuit 1, a sampling conversion conditioning circuit 2, an analog-to-digital conversion circuit 3, a data transmission connection terminal 4, a relay circuit 5 and an MCU circuit 6;

the analog-to-digital conversion circuit 3 is connected with the power circuit 1, the sampling conversion conditioning circuit 2 and the data transmission wiring terminal 4; the relay circuit 5 is connected with the sampling conversion conditioning circuit 2; the MCU circuit 6 is connected with the relay circuit 5;

the power supply circuit 1 is configured to supply power to the analog-to-digital conversion circuit 3; the MCU circuit 6 is configured to send signals to the relay circuit 5, and controls the relay circuit 5 to be connected with the sampling conversion conditioning circuit 2 so as to select different measuring ranges for sampling;

the analog-to-digital conversion circuit 3 is configured to receive the analog signal transmitted by the sampling conversion conditioning circuit 2, convert the analog signal into a digital signal, and output the digital signal to the data transmission connection terminal 4.

The power supply circuit 1 comprises three sub-circuits and a power supply wiring terminal, wherein the three sub-circuits are respectively a DVDD power supply circuit, an AVDD power supply circuit and an AVSS power supply circuit; the power supply wiring terminal comprises an SVCC, +5VCC and a public negative terminal GND and is used for being externally connected with a power supply;

the DVDD power circuit is connected with the SVCC end, so that the DVDD power circuit filters the received SVCC of the external power supply and outputs analog-to-digital conversion reference voltage (DVDD) to the analog-to-digital conversion circuit 3;

the DVDD power supply circuit comprises capacitors C39, C40, C41 and C42 and an inductor L2; the capacitors C40 and C41 are filter capacitors; one end of the inductor L2 is connected with the anode of the capacitor C40 and the SVCC end, the other end of the inductor L2 is connected with the anode of the capacitor C41 and serves as a voltage output end to provide voltage for the analog-to-digital conversion circuit 3, and the cathodes of the capacitors C40 and C41 are connected with a common negative end; the capacitor C39 is connected in parallel with the capacitor C40, and the capacitor C42 is connected in parallel with the capacitor C41.

Specifically, the external power supply SVCC in the DVDD power supply circuit in the power supply circuit is filtered to obtain a power supply DVDD, which is used to supply power to the ADS131E04 chip U1 of the analog-to-digital conversion circuit 3.

The AVDD power supply circuit comprises a low dropout linear voltage regulation chip U5; the AVDD power circuit is connected with the +5VCC end, so that the AVDD power circuit converts the received +5VCC voltage into an analog-to-digital conversion reference voltage (AVDD) through the low-dropout linear voltage stabilization chip U5 and outputs the analog-to-digital conversion reference voltage (AVDD) to the analog-to-digital conversion circuit 3, and supplies power to a voltage reference chip U2 and an ADS131E04 chip U1 of the analog-to-digital conversion circuit 3;

the AVSS power supply circuit comprises a DC-DC power supply chip U6 and a low-dropout linear regulator chip U7; the AVSS power supply circuit is connected to the +5VCC terminal, so that the AVSS power supply circuit converts the received +5VCC voltage into an AVSS voltage (i.e., analog circuit ground) through the DC-DC power supply chip U6 and the low dropout linear regulator chip U7, outputs the AVSS voltage to the analog-to-digital conversion circuit 3, and supplies power to the voltage reference chip U2 and the ADS131E04 chip U1 of the analog-to-digital conversion circuit 3.

Specifically, the power supply circuit is configured to supply power to an ADS131E04 chip U1 of the analog-to-digital conversion circuit 3 by a power supply DVDD (DVDD, analog-to-digital conversion reference voltage) obtained by filtering an external power supply SVCC, +5VCC is sequentially converted into AVDD by a low-dropout linear regulator chip U5, and +5VCC is sequentially converted into an AVSS by a DC-DC power supply chip U6 and a low-dropout linear regulator chip U7, so that the AVDD and the AVSS provide a stable and reliable working power supply for the voltage reference chip U2 and the ADS131E04 chip U1.

The sampling conversion conditioning circuit 2 comprises two paths of adjustable range sampling circuits with the same structure and two paths of non-adjustable range sampling circuits with the same structure; the adjustable range sampling circuit and the non-adjustable range sampling unit respectively comprise signal input ends (IN 1-, IN1+, IN2-, IN2+, … …, IN 4-and IN4 +) connected with an external sensing unit and signal output ends (IN 1N, IN1P, … …, IN4N and IN 4P) connected with the analog-to-digital conversion circuit 3;

the adjustable range sampling circuit comprises three precise sampling resistors, a first TVS diode, a first resistor and a first capacitor, wherein the first TVS diode is provided with three pins which are respectively a first cathode, a second cathode and an anode; the three precision sampling resistors are respectively a first precision sampling resistor, a second precision sampling resistor and a third precision sampling resistor; the second cathode of the first TVS diode is connected with a first resistor R5, and the other end of the first resistor is connected with a signal input end; two ends of the first capacitor C2 are respectively connected with the second cathode and the anode of the first TVS diode; the first resistor and the first capacitor form a first RC filter, and the first RC filter is used for filtering noise of an input signal of the adjustable range sampling circuit;

and one ends of the first precise sampling resistor, the second precise sampling resistor and the third precise sampling resistor are connected with a signal input end, and the other ends of the first precise sampling resistor, the second precise sampling resistor and the third precise sampling resistor are respectively and correspondingly connected with a normally open contact of a coil of the relay circuit 5.

To better illustrate the structure of the adjustable range sampling circuit, specifically, as shown in fig. 3, there are two adjustable range sampling circuits in total, and a first adjustable range sampling circuit is taken as an example for illustration, and includes a first precise sampling resistor R2, a second precise sampling resistor R3, a third precise sampling resistor R4, a first TVS diode U8, a first resistor R5 and a first capacitor C2, where the first TVS diode U8 has three pins, which are a first cathode C1, a second cathode C2 and an anode a, respectively; the second cathode C2 of the first TVS diode U8 is connected with a first resistor R5, and the other end of the first resistor R5 is connected with a signal input end IN1 +; two ends of the first capacitor C2 are respectively connected to the second cathode C2 and the anode a of the first TVS diode; the first resistor R5 and the first capacitor C2 form a first RC filter, and the first RC filter is used for filtering noise of an input signal of the adjustable range sampling circuit; the second adjustable range sampling circuit has the same structure, so the detailed connection relationship is not described herein. Two ways of adjustable range sampling circuit, the user can be according to the demand connection wherein one way or two ways of adjustable range sampling circuit, reinforcing practicality.

Specifically, because the number of the adjustable range sampling circuits is two, the two adjustable range sampling circuits have six precise sampling resistors (R2, R3, R4, R8, R9, and R10), and the six precise sampling resistors are respectively and correspondingly connected with six sub-circuits of the relay circuit 5, so that the selection of the range is realized.

Specifically, a first precise sampling resistor R2/R8, a second precise sampling resistor R3/R9 and a third precise sampling resistor R4/R10 are respectively used as precise sampling resistors of sampling circuits with the measuring ranges of 0-25mA, 0-50mA and 0-100 mA; the MCU circuit 6 outputs level signals, so that a specific adjustable range sampling circuit channel is selected, and the range selection is realized. The TVS diode can ensure that the input voltage is limited to 0-5V to protect the analog-to-digital conversion circuit 3.

The non-adjustable sampling circuit comprises a fourth precise sampling resistor, a second TVS diode, a second resistor and a second capacitor, wherein the second TVS diode is provided with three pins which are respectively a first cathode, a second cathode and an anode; the second cathode of the second TVS diode is connected with a second resistor R15, and the other end of the second resistor R15 is connected with a signal input end; two ends of the second capacitor C6 are respectively connected with the second cathode and the anode of the second TVS diode; the second resistor and the second capacitor form a second RC filter, and the second RC filter is used for filtering noise of the input signal of the non-adjustable range sampling circuit.

to better illustrate the structure of the non-adjustable range sampling circuit, specifically, as shown in fig. 3, a total of two non-adjustable range sampling circuits are provided, and a first non-adjustable range sampling circuit is taken as an example for illustration, the first non-adjustable range sampling circuit includes a fourth precise sampling resistor R14, a second TVS diode U10, a second resistor R15 and a second capacitor C6, the second TVS diode U10 has three pins, which are a first cathode C1, a second cathode C2 and an anode a, respectively; the second cathode C2 of the second TVS diode is connected with a second resistor R15, and the other end of the second resistor R15 is connected with a signal input end IN3 +; two ends of the second capacitor C6 are respectively connected to the second cathode C2 and the anode a of the second TVS diode; the second resistor R15 and the second capacitor C6 form a second RC filter, and the second RC filter is used for filtering noise of the input signal of the non-adjustable range sampling circuit.

In the above, the sampling conversion conditioning circuit 2 converts the received small current signal of the external sensing unit into a voltage signal of less than or equal to 4.096V through the precision sampling resistor, and outputs the voltage signal to the chip ADS131E 04.

In this embodiment, the first precise sampling resistors R2 and R8, the second precise sampling resistors R3 and R9, the third precise sampling resistors R4 and R10, and the fourth precise sampling resistors R14 and R15 are resistors with a precision of 0.1% and a temperature coefficient of 10 PPm/deg.c.

In the present embodiment, the model of the TVS diode is PESD5V0L2 BT.

The relay circuit 5 comprises six identically constructed sub-circuits, wherein each sub-circuit comprises one relay and one optocoupler; the relay comprises a coil, a common contact and a normally open contact; one end of the relay coil is connected with a +5VCC power supply, and the other end of the relay coil is connected with a collector electrode of the optical coupler; the common contact of the relay is grounded GND, and the normally open contact of the relay is connected with the sampling conversion conditioning circuit 2; the anode of the light emitting diode of the optical coupler is connected with a VDD33 power supply, and the cathode of the light emitting diode of the optical coupler is connected with the MCU circuit 6;

to better illustrate the structure of the sub-circuits, specifically as shown in fig. 4, there are six sub-circuits, and the first sub-circuit is taken as an example, and the first sub-circuit includes a relay RL1 and an optocoupler U12; the relay RL1 includes a coil (with two pins, pins 1, 2 as shown in fig. 4), a common contact (pin 4), and a normally open contact (pin 3); one end of the coil of the relay RL1 is connected with a +5VCC power supply, and the other end of the coil of the relay RL1 is connected with the collector of the optocoupler U12; the common contact (pin 4) of the relay is grounded GND, and the normally open contact (pin 3) of the relay is connected with the sampling conversion conditioning circuit 2. Other sub-circuits have the same structure, and the connection relationships of specific elements in the sub-circuits are the same, so that the detailed description is omitted here.

The MCU circuit 6 comprises a control chip U16, the control chip U16 is connected with the relay circuit 5, and the control chip U16 outputs signals to the relay circuit 5.

As above, the control chip U16 includes six level output ports (PB 5, PB4, PC3, PD6, PD5, PD 4) for respectively outputting level signals DO0, DO1, DO2, DO3, DO4, DO 5; the six level output ports are correspondingly connected with six sub-circuits in the relay circuit 5.

It should be noted that six output ports of the control chip can be arbitrarily selected as level outputs, and which ports are selected in relation to the port properties of different chips and the user's choice.

Specifically, when a PB5 pin of the control chip U16 outputs a low level (i.e., DO0 low level) to the optocoupler U12 of the relay circuit 5, a light emitting diode of the optocoupler U12 works to illuminate, a CE electrode of the optocoupler U12 is conducted, a coil of the relay RL1 is conducted, a contact of the relay RL1 is changed from normally open to normally closed, so that YK1 and ground (COM 1) are connected together, and at this time, the current input range of the sampling conversion conditioning circuit 2 is 0-25 mA; similarly, when the DO1 is at low level and is output to the optocoupler U13, and the DO0 and DO2 are at high level, the YK2 and the ground (COM 1) are connected together, and the current input range of the sampling conversion conditioning circuit 2 is 0-50mA at this time; when the DO2 is at low level and output to the optocoupler U14, and the DO0 and DO1 are at high level, the YK3 and the ground (COM 1) are connected together, and the current input range of the sampling conversion conditioning circuit 2 is 0-100mA at this time. Similarly, since the adjustable-range sampling circuit has two paths, the control mode of the second adjustable-range sampling circuit is the same as that described above, when the PD6 pin of the control chip U16 outputs a low level (i.e., a DO3 low level) to the optical coupler U15 of the relay circuit 5, and when the DO4 and the DO5 are high levels, the YK4 is connected to the ground (COM 2), and at this time, the current input range of the sampling conversion conditioning circuit 2 is 0-25 mA. Since the principle is the same, other controls are not described in detail.

The analog-to-digital conversion circuit 3 comprises a voltage reference chip U2 and an ADS131E04 chip; the VIN pin of the voltage reference chip U2 is connected with an AVDD power circuit of the power circuit, the GND pin of the voltage reference chip U2 is connected with an AVSS power circuit of the power circuit, and the OUT pin of the voltage reference chip U2 is connected with the VREFP pin of the ADS131E04 chip and is used for receiving the reference voltage output by the voltage reference chip U2.

The ADS131E04 chip includes an input pin (shown in fig. 6, pins 9 to 16) connected to the signal output terminal of the sampling conversion conditioning circuit 2, and a plurality of output pins for outputting digital signals, and the output pins are connected to the data transmission connection terminal 4.

Specifically, the ADS131E04 chip is an analog-to-digital converter, and is configured to convert a received analog signal into a digital signal for output. In this embodiment, the voltage reference chip U2 has a model REF 5040.

Above, the data transmission connection terminal 4 includes an EN terminal (enable terminal), and the EN terminal is connected to the power supply circuit 1. The analog-to-digital conversion circuit 3 converts the analog signal of the direct current voltage and the analog signal of the direct current collected by the sampling conversion conditioning circuit 2 into digital signals, and then communicates with an external singlechip through a data transmission wiring terminal 4.

Variations and modifications to the above-described embodiments may occur to those skilled in the art, in light of the above teachings and teachings. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and changes to the present invention should fall within the protection scope of the claims of the present invention. Furthermore, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. A multi-path high-precision direct current power parameter sampling circuit based on an ADS131E04 chip is characterized in that the sampling circuit comprises a power circuit, a sampling conversion conditioning circuit, an analog-to-digital conversion circuit, a relay circuit and an MCU circuit; the analog-to-digital conversion circuit comprises an ADS131E04 chip;

the analog-to-digital conversion circuit is connected with the power circuit and the sampling conversion conditioning circuit; the relay circuit is connected with the sampling conversion conditioning circuit; the MCU circuit is connected with the relay circuit;

the analog-to-digital conversion circuit is configured to receive an analog signal transmitted by the sampling conversion conditioning circuit and convert the analog signal into a digital signal for output;

the adjustable range sampling circuit comprises three precise sampling resistors, a first TVS diode, a first resistor and a first capacitor; the first resistor and the first capacitor form a first RC filter, and the first RC filter is used for filtering noise of an input signal of the adjustable range sampling circuit; the three precision sampling resistors are respectively a first precision sampling resistor, a second precision sampling resistor and a third precision sampling resistor;

one ends of the first precision sampling resistor, the second precision sampling resistor and the third precision sampling resistor are connected with the signal input end, and the other ends of the first precision sampling resistor, the second precision sampling resistor and the third precision sampling resistor are respectively connected with a normally open contact of a coil of the relay circuit;

the non-adjustable sampling circuit comprises a fourth precise sampling resistor, a second TVS diode, a second resistor and a second capacitor; the second resistor and the second capacitor form a second RC filter, and the second RC filter is used for filtering noise of the input signal of the non-adjustable measuring and sampling circuit;

one end of the fourth precise sampling resistor is grounded, and the other end of the fourth precise sampling resistor is connected with the signal input end.

2. The sampling circuit of claim 1, further comprising a data transmission terminal connected to the analog-to-digital conversion circuit, wherein the analog-to-digital conversion circuit converts the analog signal into a digital signal and outputs the digital signal to the data transmission terminal.

3. The sampling circuit of claim 1, wherein the power supply circuit comprises three sub-circuits and a power connection terminal, wherein the three sub-circuits are a DVDD power supply circuit, an AVDD power supply circuit, and an AVSS power supply circuit, respectively; the power supply wiring terminal comprises an SVCC, +5VCC and a public negative terminal and is used for being externally connected with a power supply;

the AVDD power supply circuit comprises a low dropout linear voltage regulation chip; the AVDD power supply circuit is connected with the +5VCC end, so that the AVDD power supply circuit converts the received +5VCC voltage into analog-to-digital conversion reference voltage through the low-voltage-difference linear voltage stabilization chip and outputs the analog-to-digital conversion reference voltage to the analog-to-digital conversion circuit, and supplies power for a voltage reference chip of the analog-to-digital conversion circuit and the ADS131E04 chip;

the AVSS power supply circuit comprises a DC-DC power supply chip and a low-voltage difference linear voltage stabilizing chip; the AVSS power supply circuit is connected with the +5VCC end, so that the AVSS power supply circuit converts the received +5VCC voltage into AVSS voltage through the DC-DC power supply chip and the low-voltage difference linear voltage stabilization chip and outputs the AVSS voltage to the analog-to-digital conversion circuit, and supplies power for the voltage reference chip of the analog-to-digital conversion circuit and the ADS131E04 chip.

4. The sampling circuit of claim 1, wherein the first TVS diode has three pins, a first cathode, a second cathode, and an anode; the second cathode of the first TVS diode is connected with a first resistor, and the other end of the first resistor is connected with a signal input end; and two ends of the first capacitor are respectively connected with the second cathode and the anode of the first TVS diode.

5. The sampling circuit of claim 1, wherein the second TVS diode has three pins, a first cathode, a second cathode, and an anode; a second cathode of the second TVS diode is connected with a second resistor, and the other end of the second resistor is connected with the signal input end; and two ends of the second capacitor are respectively connected with the second cathode and the anode of the second TVS diode.

6. The sampling circuit of claim 1, wherein the first, second, third, and fourth precision sampling resistors have a precision of 0.1% and a temperature coefficient of 10PPm/° c.

7. The sampling circuit of claim 1, wherein the relay circuit comprises six identically configured sub-circuits, wherein each sub-circuit comprises one relay and one optocoupler; the relay comprises a coil, a common contact and a normally open contact; one end of the relay coil is connected with a +5VCC power supply, and the other end of the relay coil is connected with a collector electrode of the optical coupler; the common contact of the relay is grounded, and the normally open contact of the relay is connected with the precise sampling resistor of the sampling conversion conditioning circuit; the positive electrode of the light emitting diode of the optical coupler is connected with a VDD33 power supply, and the negative electrode of the light emitting diode of the optical coupler is connected with the MCU circuit.

8. The sampling circuit of claim 7, wherein the MCU circuit comprises a control chip, the control chip is connected with the relay circuit, and the control chip outputs a signal to the relay circuit;

the control chip comprises six level output ports, and the six level output ports are correspondingly connected with six sub-circuits in the relay circuit.

9. The sampling circuit of claim 1, wherein the sampling conversion conditioning circuit converts the received small current signal of the external sensing unit into a voltage signal of 4.096V or less through a precision sampling resistor and outputs the voltage signal to the ADS131E 04.

10. The sampling circuit of claim 3, wherein the analog-to-digital conversion circuit further comprises a voltage reference chip U2; the VIN pin of the voltage reference chip is connected with an AVDD power circuit of the power circuit, the GND pin of the voltage reference chip is connected with an AVSS power circuit of the power circuit, and the OUT pin of the voltage reference chip is connected with the VREFP pin of the ADS131E04 chip and is used for receiving the reference voltage output by the voltage reference chip;

the ADS131E04 chip comprises an input pin connected with the signal output end of the sampling conversion conditioning circuit, and a plurality of output pins for outputting digital signals.