CN112994144A - Power supply circuit design method for auxiliary switch node resistance test system - Google Patents
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- 229910052751 metal Inorganic materials 0.000 description 3
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- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 2
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
Abstract
The invention relates to a power supply circuit design method for an auxiliary switch node resistance test system, which comprises the following steps: the analog power supply adopts two paths of analog power supply: the first power supply is special power supply for an AVDD pin of an analog-digital conversion chip ADS1255 and comprises a capacitor C16, a capacitor C17, a capacitor C18 and a voltage stabilizing chip VR2, and the second power supply is special power supply for a test loop and comprises a capacitor C25, a capacitor C26, a capacitor C27 and a voltage stabilizing chip VR 4; except for the power supply of the test loop and the AVDD pin of the analog-to-digital conversion chip ADS1255, the power supply of other parts of the test system is provided by a digital power supply, and the digital power supply consists of a digital master switch K1, a USB1, a voltage stabilizing chip VR1, a capacitor C7, a capacitor C8 and a capacitor C9. The invention has the advantages that: the analog signals and the digital signals are strictly distinguished, and completely separated power supply is adopted, so that the interference of high-frequency signals to the two electric signals through a common power-ground loop is avoided.
Description
Technical Field
The invention relates to the field of isolation switch testing, in particular to a power supply circuit design method for an auxiliary switch node resistance testing system.
Background
The open type isolating switch is one of important equipment of a transformer substation, the reliability of the open type isolating switch has great significance for safe and stable operation of a power grid, however, the accidents of breakage of the post porcelain insulator often occur, and the reasons are mostly caused by poor quality of porcelain bottles, poor gluing of flanges, corrosion and the like. The damaged part comprises a pillar porcelain insulator fracture or a metal pipe hoop fracture of the conductive arm; therefore, it is necessary to analyze the failure reason of the isolating switch under the action of strong typhoon, optimize the structural performance of the insulator, and adopt corresponding wind-proof and disaster-reduction measures to ensure the reliable operation of the isolating switch under the action of the super strong typhoon.
Due to the particularity of the isolating switch, after the isolating switch is produced, the isolating switch generally needs to be subjected to multiple different detections, such as switching-on/off in-place state detection, operation torque and rotation angle detection, auxiliary switch node resistance detection, synchronization detection and the like. In the above-mentioned detection, the auxiliary switch node resistance detection is often performed in cooperation with a test system.
And the power supply is the basis of the operation of the whole test system, and the stable power supply provides possibility for accurately measuring the contact resistance of the auxiliary switch. There are two types of circuits in a test system: analog circuits and digital circuits. A circuit that uses and processes an analog signal is an analog circuit, and a circuit that uses and processes a digital signal is a digital circuit. Analog signals can be understood as natural signals, which are continuous in value and time, have low signal frequency, and are sensitive to high-frequency electromagnetic interference. Digital signals are discrete in value and time, typically at low voltages (below 5V), but at high frequencies. In a circuit system where both circuit signals are present, the high frequency signal will interfere with both electrical signals through a common power-ground loop if no distinction is made between its signal line, supply and ground.
Disclosure of Invention
The invention aims to provide a power supply circuit design method for an auxiliary switch node resistance test system, which avoids signal interference.
In order to solve the technical problems, the technical scheme of the invention is as follows: a design method of a power supply circuit for an auxiliary switch node resistance test system is characterized by comprising the following steps: the testing system comprises a measuring loop, a filter, an analog-to-digital conversion chip ADS1255, an SPI (serial peripheral interface), a main control chip, a USB (universal serial bus) module and an upper computer PC (personal computer), wherein when measurement is carried out, after a resistor to be tested is connected into the measuring loop, the output voltage of the measuring loop is amplified, sampled and converted by an analog-to-digital conversion chip ADS1255 after passing through a filter circuit of the filter, so that a digital value of the output voltage which can be read and processed is obtained, the data are transmitted to the main control chip through the SPI, the main control chip further processes the collected data, software filtering and calculation are carried out, the resistance value of the resistor to be tested is obtained through the relation between the output voltage and the resistor, the main control chip is connected with the upper computer PC through the USB module, the final data are presented to;
the power supply circuit design method comprises the following steps:
s1 analog power conversion and voltage regulation:
the power supply of analog power supply divides, and analog power supply supplies power for two parts, and test circuit is first, and two way simulation power supplies are designed according to the power supply requirement to analog to digital conversion chip ADS 1255's AVDD pin, second:
the first path of power supply is special power supply of an AVDD pin of an analog-to-digital conversion chip ADS1255, and comprises a capacitor C16, a capacitor C17, a capacitor C18 and a voltage stabilization chip VR2, a power supply input end VBAT of the voltage stabilization chip VR2 is directly from a battery power supply signal, a voltage value varies from 6.9V to 8.1V according to the capacity of the battery, the battery is connected to a Vin pin of the voltage stabilization chip VR2, meanwhile, input end filtering is performed on a C16 capacitor of which the analog ground AGND is connected with 10uF on the Vin side of the voltage stabilization chip VR2, according to the characteristics of the voltage stabilization chip VR2, the voltage output by a Vout end is stabilized between 4.75V and 5.25V, generally 5.0V, analog ground is simulated by the capacitor C18 connected with the capacitors C17 and 100nF, the output analog 5V voltage is further filtered, and the stability of the power supply to the analog-to-digital conversion chip ADS;
the second power supply is special power supply for the test loop, and consists of a capacitor C25, a capacitor C26, a capacitor C27 and a voltage stabilizing chip VR4, wherein the input end Vin of the voltage stabilizing chip VR4 is also connected to the battery, and the difference is that the test loop is sensitive to power supply noise and requires that ripple waves are as low as possible, the input end of the voltage stabilizing chip VR4 is replaced by a filter capacitor C25 of 10uF to analog ground, the output end Vout of the voltage stabilizing chip VR4 can obtain an analog power supply with a typical value of 6V, and meanwhile, the output side of the voltage stabilizing chip VR4 is filtered to analog ground by a tantalum capacitor C25 of 10uF and a capacitor C27 of 100nf to ensure the stability of the 6V analog power supply;
s2 conversion and voltage regulation of digital power:
except for the power supply of the test loop and the AVDD pin of the analog-to-digital conversion chip ADS1255, the power supply of other parts of the test system is provided by a digital power supply, the requirement of the digital power supply part on the power supply quality is not high, and the digital power supply is difficult to avoid the generation of high-frequency noise due to the high signal frequency in the digital circuit, and in order to realize the absolute isolation of the analog-to-digital power supply to avoid the interference of the digital signal on the analog signal, the power supply is led out from the USB part;
the digital power supply comprises a digital master switch K1, a USB1, a voltage stabilizing chip VR1, a capacitor C7, a capacitor C8 and a capacitor C9, a mini-USB interface USB1 of a USB module is connected with a USB-A interface of a PC upper computer through a cable, a maximum voltage of 5V can be obtained through a pin 1-VCC of the USB1, the voltage is usually above 4.8V, the lead-out USB interface USB1 is connected with the digital master switch K1 to ensure that a digital signal part can be powered off through a digital master switch K1, a 5V signal obtained from the pin 1VCC of the USB1 is directly input into a Vin pin of the voltage stabilizing chip VR1, and the input end is filtered through a 100nF capacitor C7 digitally, so that a 3.3V digital power supply for the master control chip can be obtained at a Vout end of the voltage stabilizing chip VR1, and an output end of the voltage stabilizing chip VR1 is connected with capacitors C8 and C9 of 10uF of the 100nF capacitor C8 and the master control chip.
Furthermore, the test system is also provided with a J-Link debugging module, the upper computer PC is connected with the main control chip through the J-Link debugging module to realize the upgrading and online debugging of programs, and the J-Link debugging module is also powered by a digital power supply.
Further, in step S1, the power supply requirement of the analog power supply is: according to the test requirements of national standard for testing 1-level and 2-level auxiliary contact resistors, a test loop needs 6v of direct current power supply; according to the requirement in the datasheet of the analog-to-digital conversion chip ADS1255, the AVDD pin needs to be supplied with power of 3.3V-5V.
Further, in step S2, the power supply requirement of the digital power supply is: the main control chip needs a 3.3V power supply, the J-Link test module needs a 3.3V power supply, the DVDD pin of the analog-to-digital conversion chip ADS1255 needs 3.3-5V power supply, and other necessary peripheral indication circuits also need 3.3-5V power supplies.
The invention has the advantages that: in the invention, in order to test the stable measurement of a system, the anti-interference capability is strong, an analog-to-digital conversion chip ADS1255 needs stable power supply, wherein the stable power supply comprises DVDD digital power supply, therefore, a battery power supply is independently designed, a capacitor C19, a capacitor C20, a capacitor C21 and a voltage stabilization chip VR3 form a digital power supply which is specially supplied to a DVDD pin of the ADS1255, a 6.9-8.1V signal provided by one battery power supply is filtered digitally through the capacitor C19 of 10uF and then is connected to a Vin pin of the voltage stabilization chip VR3, so that Vout can obtain a regulated power supply signal with a typical value of 3.3V, and secondary filtering is performed digitally at a power output end by using the capacitors C20 and C21 of 10uF to improve the anti-interference capability.
In addition, through the matching of the tantalum capacitor, because the metal tantalum is used as the medium, the electrolyte is not needed to be used like the common electrolytic capacitor, the working medium is a layer of extremely thin tantalum pentoxide film generated on the surface of the tantalum metal, and the tantalum capacitor has the performance of automatically repairing or isolating the defects in the oxide film in the working process, so that the oxide film medium is reinforced and the due insulating capability of the oxide film medium is recovered at any time without continuous accumulative damage.
The design method of the invention strictly distinguishes the analog signal and the digital signal when designing the circuit, adopts completely separated power supply, and avoids the interference of the high-frequency signal to the two electric signals through a common power supply-ground loop.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
FIG. 1 is a schematic diagram of a test system.
Fig. 2 is a schematic diagram of a first power supply connection of the analog power supply of the present invention.
FIG. 3 is a schematic diagram of a second power supply connection of the analog power supply of the present invention.
Fig. 4 and 5 are schematic diagrams of connection of the digital power supply according to the present invention.
Detailed Description
The following examples are presented to enable one of ordinary skill in the art to more fully understand the present invention and are not intended to limit the scope of the embodiments described herein.
As can be seen from the schematic diagram shown in fig. 1, the test system has a human-computer interaction part 1, a power supply part 2, and a core measurement part 3, wherein the hardware of the test system includes a measurement loop, a filter, an analog-to-digital conversion chip ADS1255, an SPI interface, a main control chip, a USB module, an upper computer PC, and a J-Link debugging module, when performing measurement, after the resistor to be measured is connected to the measurement loop, the output voltage of the measurement loop is amplified, sampled, and converted by the analog-to-digital conversion chip ADS1255 after passing through the filter circuit of the filter, to obtain a digital value of the output voltage which can be read and processed, and then the data is transmitted to the main control chip through the SPI interface, the main control chip further processes the collected data, performs software filtering and calculation, obtains the resistance value of the resistor to be measured according to the relationship between the output voltage and the resistor, and the main, and the final data is presented to a user, the upper computer PC is connected with the main control chip through a J-Link debugging module to realize the upgrading and online debugging of the program, the J-Link debugging module is also powered by a digital power supply, and the power supply of the whole test system is divided into an analog power supply and a digital power supply. In this embodiment, the main control chip adopts a main control chip STM32F103RET 6.
The power supply circuit design method for the auxiliary switch node resistance test system is realized by the following steps:
the first step is the conversion and voltage stabilization of an analog power supply:
the power supply of the analog power supply is divided, the analog power supply supplies power to two parts, namely a test loop and an AVDD pin of an analog-to-digital conversion chip ADS1255, the analog power supply consists of two 18650 batteries of battery packs connected in series and corresponding voltage reduction and stabilization chips, and the test loop needs a 6v direct-current power supply according to the test requirements of national standards on testing 1-level and 2-level auxiliary contact resistors; according to the requirement in the datasheet of the analog-to-digital conversion chip ADS1255, the AVDD pin needs to supply power of 3.3V-5V, and based on the consideration, two paths of analog power supplies are designed:
the first power supply is a dedicated power supply for the AVDD pin of the analog-to-digital conversion chip ADS1255, and is composed of a capacitor C16, a capacitor C17, a capacitor C18, and a voltage stabilization chip VR2 (HT 7550), as shown in fig. 2, a power input terminal VBAT of the voltage stabilization chip VR2 is directly from a power signal of a battery, a voltage value varies from 6.9V to 8.1V according to the size of the battery capacity, the battery is connected to a Vin pin of the voltage stabilization chip VR2, meanwhile, an analog ground AGND is connected to the capacitor C16 of 10uF on the Vin side of the voltage stabilization chip VR2 for input end filtering, and according to the characteristic of the voltage stabilization chip VR2, the voltage output by the Vout terminal is stabilized between 4.75V and 5.25V, usually 5.0V, and the capacitors C17 and C18 nF connected to the 10uF are used for analog ground, further filtering the output analog 5V voltage, so as to ensure the stability of the analog-to-analog-to-.
The second power supply is a special power supply for the test loop and consists of a capacitor C25, a capacitor C26, a capacitor C27 and a voltage stabilizing chip VR4 (HT 7560), as shown in fig. 3, the input Vin of the regulator chip VR4 is also connected to the battery, except that, because the test loop is sensitive to noise of power supply and requires the ripple to be as low as possible, the input end of the voltage stabilizing chip VR4 is replaced by a filter capacitor C25 of analog ground by a tantalum capacitor of 10uF, the tantalum capacitor is called a tantalum electrolytic capacitor and belongs to one of electrolytic capacitors, because the metal tantalum is used as a medium, electrolyte is not needed as a common electrolytic capacitor, the working medium is a layer of extremely thin tantalum pentoxide film generated on the surface of tantalum metal, the method has the performance of automatically repairing or isolating the defects in the oxide film, so that the oxide film medium can be reinforced and the due insulating capability can be recovered at any time without continuous accumulative damage.
The output terminal Vout of the regulator chip VR4 can obtain an analog power supply with a typical value of 6V, while the analog ground is filtered at the output side of the regulator chip VR4 by a 10uF tantalum capacitor C25 and a 100nf capacitor C27 to ensure stability of the 6V analog power supply.
And a second step of digital power supply conversion and voltage stabilization:
except for the power supply of the test loop and the AVDD pin of the analog-to-digital conversion chip ADS1255, the power supply of other parts of the test system is provided by a digital power supply, the main control chip STM32F103RET6 needs a 3.3V power supply, the J-Link test module needs a 3.3V power supply, the DVDD pin of the analog-to-digital conversion chip ADS1255 needs a 3.3-5V power supply, and other necessary peripheral indication circuits also need a 3.3-5V power supply.
The digital power supply consists of a digital master switch K1, a USB1, a voltage stabilizing chip VR1 (AMS 1117-3.3), a capacitor C7, a capacitor C8 and a capacitor C9, as shown in fig. 4 and 5, the mini-USB interface USB1 of the USB module is connected to the USB-a interface of the PC upper computer through a cable, the pin 1-VCC of the USB1 can obtain a maximum voltage of 5V, which is usually above 4.8V, and after being led out, the USB module is first connected to the digital master switch K1 to ensure that the digital signal portion can be powered off through the digital master switch K1, the 5V signal obtained from the pin 1VCC of the USB1 is directly input to the Vin pin of the voltage stabilization chip VR1, and is also digitally filtered at the input end through the 100nF capacitor C7, therefore, a 3.3V digital power supply which can be used by the main control chip can be obtained at the Vout end of the voltage regulation chip VR1, and the output end Vout of the voltage regulation chip VR1 is grounded and filtered by the capacitors C8 and C9 of the 100nF capacitor and the 10uF capacitor to ensure the quality of the power supply.
In order to enable a test system to be capable of stably measuring and have strong anti-interference capability, an analog-to-digital conversion chip ADS1255 needs to have stable power supply, wherein the stable power supply comprises DVDD digital power supply, therefore, the battery power supply is independently designed, a capacitor C19, a capacitor C20, a capacitor C21 and a voltage stabilizing chip VR3 form a digital power supply and are specially used for supplying the DVDD pin of the ADS1255, 6.9-8.1V signals provided by one battery power supply are filtered digitally through a 10uF capacitor C19 and then are connected to a Vin pin of a voltage stabilizing chip VR3, so that Vout can obtain a typical value of 3.3V voltage stabilizing power supply signals, and secondary filtering is performed on a power supply output end digitally by using a 10uF capacitor C20 and a 100nF capacitor C21 to improve the anti-interference capability.
The design method of the invention strictly distinguishes the analog signal and the digital signal when designing the circuit, adopts completely separated power supply, and avoids the interference of the high-frequency signal to the two electric signals through a common power supply-ground loop.
It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (4)
1. A power supply circuit design method for an auxiliary switch node resistance test system is characterized by comprising the following steps: the testing system comprises a measuring loop, a filter, an analog-to-digital conversion chip ADS1255, an SPI (serial peripheral interface), a main control chip, a USB (universal serial bus) module and an upper computer PC (personal computer), wherein when measurement is carried out, after a resistor to be tested is connected into the measuring loop, the output voltage of the measuring loop is amplified, sampled and converted by an analog-to-digital conversion chip ADS1255 after passing through a filter circuit of the filter, so that a digital value of the output voltage which can be read and processed is obtained, the data are transmitted to the main control chip through the SPI, the main control chip further processes the collected data, software filtering and calculation are carried out, the resistance value of the resistor to be tested is obtained through the relation between the output voltage and the resistor, the main control chip is connected with the upper computer PC through the USB module, the final data are presented to;
the power supply circuit design method comprises the following steps:
s1 analog power conversion and voltage regulation:
the power supply of analog power supply divides, and analog power supply supplies power for two parts, and test circuit is first, and two way simulation power supplies are designed according to the power supply requirement to analog to digital conversion chip ADS 1255's AVDD pin, second:
the first path of power supply is special power supply of an AVDD pin of an analog-to-digital conversion chip ADS1255, and comprises a capacitor C16, a capacitor C17, a capacitor C18 and a voltage stabilization chip VR2, a power supply input end VBAT of the voltage stabilization chip VR2 is directly from a battery power supply signal, a voltage value varies from 6.9V to 8.1V according to the capacity of the battery, the battery is connected to a Vin pin of the voltage stabilization chip VR2, meanwhile, input end filtering is performed on a C16 capacitor of which the analog ground AGND is connected with 10uF on the Vin side of the voltage stabilization chip VR2, according to the characteristics of the voltage stabilization chip VR2, the voltage output by a Vout end is stabilized between 4.75V and 5.25V, generally 5.0V, analog ground is simulated by the capacitor C18 connected with the capacitors C17 and 100nF, the output analog 5V voltage is further filtered, and the stability of the power supply to the analog-to-digital conversion chip ADS;
the second power supply is special power supply for the test loop, and consists of a capacitor C25, a capacitor C26, a capacitor C27 and a voltage stabilizing chip VR4, wherein the input end Vin of the voltage stabilizing chip VR4 is also connected to the battery, and the difference is that the test loop is sensitive to power supply noise and requires that ripple waves are as low as possible, the input end of the voltage stabilizing chip VR4 is replaced by a filter capacitor C25 of 10uF to analog ground, the output end Vout of the voltage stabilizing chip VR4 can obtain an analog power supply with a typical value of 6V, and meanwhile, the output side of the voltage stabilizing chip VR4 is filtered to analog ground by a tantalum capacitor C25 of 10uF and a capacitor C27 of 100nf to ensure the stability of the 6V analog power supply;
s2 conversion and voltage regulation of digital power:
except for the power supply of the test loop and the AVDD pin of the analog-to-digital conversion chip ADS1255, the power supply of other parts of the test system is provided by a digital power supply, the requirement of the digital power supply part on the power supply quality is not high, and the digital power supply is difficult to avoid the generation of high-frequency noise due to the high signal frequency in the digital circuit, and in order to realize the absolute isolation of the analog-to-digital power supply to avoid the interference of the digital signal on the analog signal, the power supply is led out from the USB part;
the digital power supply comprises a digital master switch K1, a USB1, a voltage stabilizing chip VR1, a capacitor C7, a capacitor C8 and a capacitor C9, a mini-USB interface USB1 of a USB module is connected with a USB-A interface of a PC upper computer through a cable, a maximum voltage of 5V can be obtained through a pin 1-VCC of the USB1, the voltage is usually above 4.8V, the lead-out USB interface USB1 is connected with the digital master switch K1 to ensure that a digital signal part can be powered off through a digital master switch K1, a 5V signal obtained from the pin 1VCC of the USB1 is directly input into a Vin pin of the voltage stabilizing chip VR1, and the input end is filtered through a 100nF capacitor C7 digitally, so that a 3.3V digital power supply for the master control chip can be obtained at a Vout end of the voltage stabilizing chip VR1, and an output end of the voltage stabilizing chip VR1 is connected with capacitors C8 and C9 of 10uF of the 100nF capacitor C8 and the master control chip.
2. The method for designing a power supply circuit for an auxiliary switch node resistance test system according to claim 1, wherein: the test system is also provided with a J-Link debugging module, the upper computer PC is connected with the main control chip through the J-Link debugging module to realize the upgrading and online debugging of programs, and the J-Link debugging module is also powered by a digital power supply.
3. The method for designing a power supply circuit for an auxiliary switch node resistance test system according to claim 1, wherein: in step S1, the power supply requirement of the analog power supply is: according to the test requirements of national standard for testing 1-level and 2-level auxiliary contact resistors, a test loop needs 6v of direct current power supply; according to the requirement in the datasheet of the analog-to-digital conversion chip ADS1255, the AVDD pin needs to be supplied with power of 3.3V-5V.
4. The method for designing a power supply circuit for an auxiliary switch node resistance test system according to claim 1, wherein: in step S2, the power supply requirement of the digital power supply is: the main control chip needs a 3.3V power supply, the J-Link test module needs a 3.3V power supply, the DVDD pin of the analog-to-digital conversion chip ADS1255 needs 3.3-5V power supply, and other necessary peripheral indication circuits also need 3.3-5V power supplies.
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