CN210578439U - Signal amplification circuit, signal amplifier and signal amplifier chip - Google Patents
Signal amplification circuit, signal amplifier and signal amplifier chip Download PDFInfo
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- CN210578439U CN210578439U CN201921884831.4U CN201921884831U CN210578439U CN 210578439 U CN210578439 U CN 210578439U CN 201921884831 U CN201921884831 U CN 201921884831U CN 210578439 U CN210578439 U CN 210578439U
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Abstract
The utility model belongs to the technical field of signal amplification, a signal amplification circuit, a signal amplifier and a signal amplifier chip are disclosed, the circuit comprises a primary amplification circuit, a filter circuit and a secondary amplification circuit, the primary amplification circuit is connected with the filter circuit, and the filter circuit is connected with the secondary amplification circuit; the first-stage amplifying circuit is used for receiving an input signal and outputting a first amplified signal; the filter circuit is used for receiving the first amplified signal, filtering the first amplified signal and outputting a second amplified signal; and the secondary amplifying circuit is used for receiving the second amplified signal and adjusting the amplification factor of the second amplified signal. The small-signal amplification circuit is redesigned in the mode, two-stage signal amplification is adopted, so that the signal-to-noise ratio is further improved while high-multiple signal amplification is obtained, and the small-signal amplification efficiency is improved.
Description
Technical Field
The utility model relates to a signal amplification technical field especially relates to a signal amplification circuit, signal amplifier and signal amplifier chip.
Background
In the measurement of weak signals, it is often necessary to amplify the electric signals at microvolts, and at this time, ordinary operational amplifiers cannot be used, because their input offset voltages are generally above hundreds of microvolts, and the temperature coefficient of the offset voltage is above a few tenths of microvolts, so that the input offset voltage can be zeroed, but the drift is difficult to eliminate, so that an operational amplifier with high precision is needed to pick up and amplify the signals, and in order to ensure the accuracy of the signals, the precision and the noise coefficient of the operational amplifier need to be paid attention to in the amplifying circuit. The traditional amplifying circuit has the defect of signal distortion caused by low signal to noise ratio, and a more effective amplifying circuit is needed for improving the amplifying efficiency of small signals.
The above is only for the purpose of assisting understanding of the technical solutions of the present invention, and does not represent an admission that the above is the prior art.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a signal amplification circuit, signal amplifier and signal amplifier chip, which aims to solve the problem of low signal-to-noise ratio in the prior art of small signal amplification.
In order to achieve the above object, the present invention provides a signal amplifying circuit, the circuit includes a first-stage amplifying circuit, a filter circuit and a second-stage amplifying circuit, the first-stage amplifying circuit is connected to the filter circuit, the filter circuit is connected to the second-stage amplifying circuit; wherein the content of the first and second substances,
the first-stage amplifying circuit is used for receiving an input signal and outputting a first amplified signal;
the filter circuit is used for receiving the first amplified signal, filtering the first amplified signal and outputting a second amplified signal;
and the secondary amplifying circuit is used for receiving the second amplified signal and adjusting the amplification factor of the second amplified signal.
Preferably, the first-stage amplifying circuit includes a first chopper-stabilized amplifier and a second chopper-stabilized amplifier; wherein the content of the first and second substances,
the input end of the first-stage amplifying circuit is the non-inverting input end of the first chopper-stabilized amplifier and the non-inverting input end of the second chopper-stabilized amplifier; the output end of the first amplifying circuit is the output end of the first chopper-stabilized amplifier and the output end of the second chopper-stabilized amplifier.
Preferably, the first chopper-stabilized amplifier includes a main amplifier and a zero-correcting amplifier; wherein the input of the main amplifier is connected to the output of the zeroing amplifier to zero the main amplifier.
Preferably, the first chopper-stabilized amplifier further comprises a compensation bias circuit; the compensation bias circuit is connected with the main amplifier and the zero calibration amplifier, and is used for enabling the main amplifier and the zero calibration amplifier to have flat response in a wide frequency band.
Preferably, the first-stage amplifying circuit further comprises a first resistor, a second resistor and a third resistor; wherein the content of the first and second substances,
the first end of the first resistor is connected with the inverting input end of the first chopper-stabilized amplifier, the second end of the first resistor is connected with the output end of the first chopper-stabilized amplifier, the first end of the second resistor is connected with the inverting input end of the first chopper-stabilized amplifier, the second end of the second resistor is connected with the inverting input end of the second chopper-stabilized amplifier, the first end of the third resistor is connected with the inverting input end of the second chopper-stabilized amplifier, and the second end of the third resistor is connected with the output end of the second chopper-stabilized amplifier.
Preferably, the filter circuit comprises a fourth resistor, a fifth resistor, a first capacitor and a second capacitor; wherein the content of the first and second substances,
the first end of the fourth resistor is connected with the output end of the first chopper-stabilized amplifier, the second end of the fourth resistor is connected with the first end of the first capacitor, the second end of the first capacitor is connected with the first end of the second capacitor, the second end of the first capacitor is grounded, the second end of the second capacitor is connected with the first end of the fifth resistor, and the second end of the fifth resistor is connected with the output end of the second chopper-stabilized amplifier.
Preferably, the secondary amplification circuit comprises a first amplifier; wherein the content of the first and second substances,
the inverting input end of the first amplifier is connected with the first end of the first capacitor, and the non-inverting input end of the first amplifier is connected with the second end of the second capacitor.
Preferably, the secondary amplifying circuit further comprises a sixth resistor and a seventh resistor; wherein the content of the first and second substances,
the first end of the sixth resistor is connected with the inverting input end of the first amplifier, the second end of the sixth resistor is connected with the output end of the first amplifier, the first end of the seventh resistor is connected with the non-inverting input end of the first amplifier, and the second end of the seventh resistor is grounded.
Furthermore, to achieve the above object, the present invention further provides a signal amplifier, which includes the signal amplifying circuit as described above.
Furthermore, to achieve the above object, the present invention further provides a signal amplifier chip, wherein the signal amplifier chip integrates the signal amplifying circuit as described above, or the signal amplifier chip includes the signal amplifier as described above.
The technical scheme of the utility model is that a signal amplifying circuit is formed by arranging a primary amplifying circuit, a filter circuit and a secondary amplifying circuit, wherein the primary amplifying circuit is connected with the filter circuit, and the filter circuit is connected with the secondary amplifying circuit; the first-stage amplifying circuit is used for receiving an input signal and outputting a first amplified signal; the filter circuit is used for receiving the first amplified signal, filtering the first amplified signal and outputting a second amplified signal; and the secondary amplifying circuit is used for receiving the second amplified signal and adjusting the amplification factor of the second amplified signal. The small-signal amplification circuit is redesigned in the mode, two-stage signal amplification is adopted, so that the signal-to-noise ratio is further improved while high-multiple signal amplification is obtained, and the small-signal amplification efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a functional block diagram of an embodiment of a signal amplification circuit according to the present invention;
fig. 2 is a schematic circuit diagram of an embodiment of the signal amplification circuit of the present invention.
The reference numbers illustrate:
the objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as upper, lower, left, right, front and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicit ly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, it should be considered that the combination of the technical solutions does not exist, and is not within the protection scope of the present invention.
The utility model provides a signal amplification circuit.
Referring to fig. 1, fig. 1 is a functional block diagram of an embodiment of a signal amplification circuit according to the present invention. In the embodiment of the present invention, the circuit includes a first-stage amplifying circuit 100, a filter circuit 200 and a second-stage amplifying circuit 300, the first-stage amplifying circuit 100 is connected to the filter circuit 200, and the filter circuit 200 is connected to the second-stage amplifying circuit 300; wherein the content of the first and second substances,
the first-stage amplifying circuit 100 is configured to receive an input signal and output a first amplified signal. In this embodiment, the signal amplification circuit adopts a two-stage signal amplification manner, and the first-stage amplification circuit 100 includes a first chopper-stabilized amplifier CSA1 and a second chopper-stabilized amplifier CSA2, and is configured to receive an input signal and output a first amplified signal, where the input signal may be a minute signal.
The filter circuit 200 is configured to receive the first amplified signal, filter the first amplified signal, and output a second amplified signal. In this embodiment, the filter circuit 200 may form an RC filter circuit by a combination of a resistor and a capacitor, and the filter circuit 200 may also adopt other filter circuits, which is not limited in this embodiment.
In signal processing, the influence of noise is avoided as much as possible, but the noise is generally present in the device, so the influence of the introduced noise must be considered in designing the circuit. Furthermore, the noise figure of the first device is most important at the signal input, since other devices gain the noise of the first device. Meanwhile, the influence of noise of other equipment can be effectively reduced by improving the amplification factor of the first equipment. Therefore, in order to reduce the influence of noise on the final output signal, the first operational amplifier needs to adopt a high-precision low-noise operational amplifier, the chopper-stabilized operational amplifier has low noise, and the chopper-stabilized amplifier can be used as the first device in the signal amplification circuit, namely, the first chopper-stabilized amplifier CSA1 and the second chopper-stabilized amplifier CSA2 are adopted, so that the influence of noise on the signal can be smoothly reduced. However, since chopper-stabilized amplifiers are typically designed with high gain, they are less resistant to external interference. The chopper-stabilized amplifier amplifies all received signals, so a filter circuit 200 needs to be added in the amplification process, the filter circuit 200 may form an RC filter circuit through the combination of a resistor and a capacitor, and the filter circuit 200 may also adopt other filter circuits.
The secondary amplifying circuit 300 is configured to receive the second amplified signal and adjust an amplification factor of the second amplified signal. In this embodiment, the secondary amplifying circuit 300 may adopt a chopper-stabilized amplifier to amplify the second amplified signal, and the secondary amplifying circuit 300 may also adopt other amplifiers, which is not limited in this embodiment.
In this embodiment, a signal amplifying circuit is formed by providing a primary amplifying circuit 100, a filter circuit 200 and a secondary amplifying circuit 300, wherein the primary amplifying circuit 100 is connected to the filter circuit 200, and the filter circuit 200 is connected to the secondary amplifying circuit 300; the first-stage amplifying circuit 100 is configured to receive an input signal and output a first amplified signal; the filter circuit 200 is configured to receive the first amplified signal, filter the first amplified signal, and output a second amplified signal; the secondary amplifying circuit 300 is configured to receive the second amplified signal and adjust an amplification factor of the second amplified signal. The small-signal amplification circuit is redesigned in the mode, two-stage signal amplification is adopted, so that the signal-to-noise ratio is further improved while high-multiple signal amplification is obtained, and the small-signal amplification efficiency is improved.
Further, referring to fig. 2, fig. 2 is a circuit schematic diagram of an embodiment of a signal amplification circuit according to the present invention. The primary amplification circuit 100 comprises a first chopper-stabilized amplifier CSA1 and a second chopper-stabilized amplifier CSA 2; wherein the content of the first and second substances,
the input end of the first-stage amplification circuit 100 is the non-inverting input end of the first chopper-stabilized amplifier CSA1 and the non-inverting input end of the second chopper-stabilized amplifier CSA 2; the output end of the first amplifying circuit 100 is the output end of the first chopper-stabilized amplifier CSA1 and the output end of the second chopper-stabilized amplifier CSA 2.
Further, the first chopper-stabilized amplifier CSA1 includes a main amplifier and a zero-correcting amplifier; wherein the input of the main amplifier is connected to the output of the zeroing amplifier to zero the main amplifier.
The main amplifier is different from a general operational amplifier in that the main amplifier has three input terminals, and has a non-inverting input terminal for zero calibration inside the first and second chopper-stabilized amplifiers CSA1 and CSA2, in addition to a non-inverting input terminal and an inverting input terminal which lead out of the first and second chopper-stabilized amplifiers CSA1 and CSA 2. The nulling amplifier also has three inputs, but unlike the main amplifier, the inputs of the nulling amplifier within the first and second chopper-stabilized amplifiers CSA1, CSA2 are inverting inputs.
It will be readily appreciated that the control logic on the first chopper-stabilized amplifier CSA1 produces two main clock cycles: a zeroing period and an amplification period. The main amplifier is always connected to the input and output of the first-stage amplifier circuit 100, and the zeroing amplifier performs zeroing on the zeroing amplifier and the main amplifier in two main clock cycles, namely, a zeroing cycle and an amplification cycle, respectively. And in a zero calibration period, controlling a first switch to be closed to enable two input ends of the zero calibration amplifier to be in short circuit, and reducing the offset voltage of the zero calibration amplifier to be minimum through the feedback of the zero calibration amplifier. Meanwhile, the offset voltage is stored in the external first memory capacitor, so that the zero calibration amplifier still keeps zero calibration in the amplification period. And in the amplification period, controlling a second switch to be closed, and connecting the output end of the zero calibration amplifier and the non-inverting input end of the main amplifier to enable the main amplifier to be calibrated to be zero. Meanwhile, the external second memory capacitor stores zero calibration voltage, so that the main amplifier still keeps zero calibration in the next zero calibration period. In the selection of the device, it should be noted that the external first memory capacitor and the external second memory capacitor can use high quality capacitors with high insulation resistance. For example, a polyester film capacitor, a polystyrene capacitor, a polypropylene capacitor, etc. may be used as the memory capacitor, and the capacity may be selected from 0.1 μ F to 1 μ F.
In the first and second chopper-stabilized amplifiers CSA1 and CSA2, the internal clock causes the amplifiers to zero at a frequency of 450 Hz. Under the mechanism of continuous zero calibration, the influence of offset voltage and drift thereof, common mode voltage, low-frequency noise, power supply voltage variation and the like on the first and second chopper-stabilized amplifiers CSA1 and CSA2 is reduced to the minimum. Because the input micro signal is amplified by the first chopper stabilized amplifier CSA1 and the second chopper stabilized amplifier CSA2, the signal amplification circuit can obtain extremely high gain and can be applied to a precise high-gain amplification circuit. The first and second chopper-stabilized amplifiers CSA1 and CSA2 can be manufactured by using a LinCMOS process and low-noise MOSFETs, and the noise of the input signal is greatly reduced.
It should be noted that the second chopper-stabilized amplifier CSA2 and the first chopper-stabilized amplifier CSA1 are of the same type, and the specific structure of the second chopper-stabilized amplifier CSA2 refers to the embodiment of the first chopper-stabilized amplifier CSA1, and since the second chopper-stabilized amplifier CSA2 adopts all technical solutions of the first chopper-stabilized amplifier CSA1, all beneficial effects brought by the technical solutions of the above embodiment are at least achieved, and are not described herein again.
Further, the first chopper-stabilized amplifier CSA1 further includes a compensation bias circuit; the compensation bias circuit is connected with the main amplifier and the zero calibration amplifier, and is used for enabling the main amplifier and the zero calibration amplifier to have flat response in a wide frequency band.
It should be noted that, theoretically, in order to widen the frequency band of the signal amplification circuit as much as possible, it is better that the chopping frequency of the first and second chopper-stabilized amplifiers CSA1 and CSA2 is higher, but the increase in the chopping frequency may cause a serious spike effect, so that the first and second chopper-stabilized amplifiers CSA1 and CSA2 drift and the frequency band is narrowed, and therefore, a compensation bias circuit is added. The compensation bias circuit enables a circuit formed by the main amplifier and the zero calibration amplifier to have flat response in a wide frequency band. In the first and second chopper-stabilized amplifiers CSA1 and CSA2, the high-frequency response of the primary amplification circuit 100 is mainly determined by the main amplifier.
It is easy to understand that the first chopper-stabilized amplifier CSA1 may further include a clock and switch circuit, and an internal clock of the clock and switch circuit generates a clock signal to control the switches to be closed and opened at a certain timing. The clock signals of the first and second chopper-stabilized amplifiers CSA1 and CSA2 may also be introduced from the outside.
It should be noted that the first chopper-stabilized amplifier CSA1 may further include a clamp circuit, where the clamp circuit is actually an action switch when the output is close to 1V different from the power supply voltage, and the clamp circuit is shorted with the inverting input terminal, so that the deep negative feedback introduced by the clamp circuit may greatly reduce the gain of the first-stage amplification circuit 100 during overload to prevent saturation, and the clamp circuit may accelerate the recovery of the first-stage amplification circuit 100 after overload.
It should be noted that the second chopper-stabilized amplifier CSA2 and the first chopper-stabilized amplifier CSA1 are of the same type, and the specific structure of the second chopper-stabilized amplifier CSA2 refers to the embodiment of the first chopper-stabilized amplifier CSA1, and since the second chopper-stabilized amplifier CSA2 adopts all technical solutions of the first chopper-stabilized amplifier CSA1, all beneficial effects brought by the technical solutions of the above embodiment are at least achieved, and are not described herein again.
Further, referring to fig. 2, fig. 2 is a circuit schematic diagram of an embodiment of a signal amplification circuit according to the present invention. The primary amplifying circuit 100 further comprises a first resistor R1, a second resistor R2 and a third resistor R3; wherein the content of the first and second substances,
a first end of the first resistor R1 is connected to an inverting input terminal of the first chopper-stabilized amplifier CSA1, a second end of the first resistor R1 is connected to an output terminal of the first chopper-stabilized amplifier CSA1, a first end of the second resistor R2 is connected to an inverting input terminal of the first chopper-stabilized amplifier CSA1, a second end of the second resistor R2 is connected to an inverting input terminal of the second chopper-stabilized amplifier CSA2, a first end of the third resistor R3 is connected to an inverting input terminal of the second chopper-stabilized amplifier CSA2, and a second end of the third resistor R3 is connected to an output terminal of the second chopper-stabilized amplifier CSA 2.
The first-stage amplifying circuit may further include a third capacitor C3 and a fourth capacitor C4, wherein a first end of the third capacitor C3 is connected to a first end of the second resistor R2, a second end of the third capacitor C3 is connected to a second end of the first resistor R1, a first end of the fourth capacitor C4 is connected to a second end of the second resistor R2, and a second end of the fourth capacitor C4 is connected to a second end of the third resistor R3.
Further, referring to fig. 2, fig. 2 is a circuit schematic diagram of an embodiment of a signal amplification circuit according to the present invention. The filter circuit comprises a fourth resistor R4, a fifth resistor R5, a first capacitor C1 and a second capacitor C2; wherein the content of the first and second substances,
a first end of the fourth resistor R4 is connected to the output end of the first chopper-stabilized amplifier CSA1, a second end of the fourth resistor R4 is connected to the first end of the first capacitor C1, a second end of the first capacitor C1 is connected to the first end of the second capacitor C2, a second end of the first capacitor C1 is grounded, a second end of the second capacitor C2 is connected to the first end of the fifth resistor R5, and a second end of the fifth resistor R5 is connected to the output end of the second chopper-stabilized amplifier CSA 2.
It should be noted that the filter circuit 200 may form an RC filter circuit by a combination of a resistor and a capacitor, and the filter circuit 200 may also adopt other filter circuits or devices, for example, a low-pass filter, which is not limited in this embodiment.
In the signal processing, in order to avoid the influence of noise as much as possible, the influence of noise on the signal can be smoothly reduced by using the first chopper stabilized amplifier CSA1 and the second chopper stabilized amplifier CSA 2. However, since chopper-stabilized amplifiers are typically designed with high gain, they are less resistant to external interference. The chopper-stabilized amplifier can amplify all received signals, so that the filter circuit 200 needs to be added in the amplification process, the filter circuit 200 can form an RC filter circuit through the combination of a resistor and a capacitor, high-frequency noise is suppressed in the amplification process, and the requirement on primary processing of tiny signals is met.
Further, referring to fig. 2, fig. 2 is a circuit schematic diagram of an embodiment of a signal amplification circuit according to the present invention. The secondary amplification circuit 300 includes a first amplifier a 1; wherein the content of the first and second substances,
the inverting input terminal of the first amplifier A1 is connected to the first terminal of the first capacitor C1, and the non-inverting input terminal of the first amplifier A1 is connected to the second terminal of the second capacitor C2.
It should be noted that the secondary amplifying circuit 300 may employ a chopper-stabilized amplifier to amplify the second amplified signal, and the secondary amplifying circuit 300 may also employ other amplifiers, which is not limited in this embodiment. In the secondary amplifying circuit 300, if the voltage output range of the signal is large, for example, 20-200mV, signal saturation is likely to occur during the secondary amplification process, in order to realize signal normalization, a voltage-controlled operational amplifier can be used for conveniently sampling the output signal, and the amplification factor of the secondary operational amplifier is adjusted by using the voltage-controlled signal, so that the signal normalization is ensured, and the signal is conveniently identified.
Further, referring to fig. 2, fig. 2 is a circuit schematic diagram of an embodiment of a signal amplification circuit according to the present invention. The secondary amplifying circuit 300 further comprises a sixth resistor R6 and a seventh resistor R7; wherein the content of the first and second substances,
a first end of the sixth resistor R6 is connected to the inverting input terminal of the first amplifier a1, a second end of the sixth resistor R6 is connected to the output terminal of the first amplifier a1, a first end of the seventh resistor R7 is connected to the non-inverting input terminal of the first amplifier a1, and a second end of the seventh resistor R7 is grounded.
It should be noted that the secondary amplification circuit 300 may further include a fifth capacitor C5, a first end of the fifth capacitor C5 is connected to the output terminal of the first chopper-stabilized amplifier CSA1, and a second end of the fifth capacitor C5 is connected to the second end of the sixth resistor R6.
To achieve the above object, the present invention further provides a signal amplifier, which includes the signal amplifying circuit as described above. The specific structure of the signal amplification circuit refers to the above embodiments, and since the signal amplifier adopts all the technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
In order to achieve the above object, the present invention further provides a signal amplifier chip, wherein the signal amplifier chip integrates the signal amplifying circuit as described above, or the signal amplifier chip includes the signal amplifier as described above. The specific structure of the signal amplification circuit and the signal amplifier refers to the above embodiments, and since the signal amplifier chip adopts all the technical solutions of all the embodiments, at least all the beneficial effects brought by the technical solutions of the embodiments are achieved, and are not described in detail herein.
It should be noted that the package form of the signal amplifier chip may adopt 8 pins, 14 pins, 20 pins, and the like, an internal clock of the signal amplifier chip may enable the chopper-stabilized amplifier to operate at a chopping frequency, in the signal amplifier chip packaged with 8 pins, the chopping frequency is not adjustable, but in the signal amplifier chip packaged with 14 pins, the chopping frequency may be adjusted through a clock input pin, and when the two pins are suspended, the signal amplifier chip uses the internal clock; when an external clock is used, the internal and external connection pins of the signal amplifier chip can be connected to VDD-short circuit, and simultaneously, a clock signal is input from the clock input pin of the signal amplifier chip, and the amplitude of the clock signal can be 2.5V but cannot exceed the +5V range from VDD-to VDD-. In single power operation, the clock of the signal amplifier chip can be directly driven with 5VTTL and CMOS signals.
Note that, in the selection of the elements, it is to be noted that a high-quality capacitor with high insulation resistance may be used as the external first storage capacitor and the external second storage capacitor. For example, a polyester film capacitor, a polystyrene capacitor, a polypropylene capacitor, etc. may be used as the memory capacitor, the capacity may be selected from 0.1 μ F to 1 μ F, the first end of the external first memory capacitor and the external second memory capacitor may be connected to the corresponding pin of the chopper-stabilized operational amplifier, and the second end of the external first memory capacitor and the external second memory capacitor may be connected to the VDD-pin. The noise is increased by connecting a memory capacitor to a VDD-pin in some chopper-stabilized operational amplifiers, which are not the case in signal amplifier chips.
The overload recovery time of the signal amplifier chip is relatively short, e.g., around 30ms, and if the overload recovery time is to be further reduced, the clamp pin of the signal amplifier chip may be used. At this time, the negative feedback resistor in the signal amplifier chip selects a resistor with a larger resistance value, so that the gain of the signal amplifier chip is reduced more when the clamping circuit works. Of course, the output amplitude of the signal amplifier chip is slightly reduced by using the clamp circuit.
The signal amplifier chip also has parasitic silicon controlled effect as other CMOS devices, when in use, a current limiting resistor can be connected in series with a positive power supply and a negative power supply, the resistance value of the current limiting resistor can be 200-510 omega, and meanwhile, the input voltage and the output voltage of the signal amplifier chip are ensured not to exceed the power supply voltage.
The signal amplifier chip is a high-precision amplifier and is usually operated at high gain under the condition that the input voltage is in the microvolt magnitude. The precision of the signal amplifier chip is ensured, the quality of the signal amplifier chip printed board can be improved, and the leakage current on the surface of the printed board is prevented. For this purpose, guard rings, for example, 14-pin and 20-pin signal amplifier chips, can be provided on the printed board, and the guard rings can be constructed by making full use of the empty pins around the input terminals.
When the signal amplifier chip is used for amplifying a direct current micro signal, a low-pass filter can be additionally connected to the output end to filter an alternating current component in an output voltage so as to enable an output level to be more stable in order to further reduce alternating current interference.
It should be understood that the above is only an example, and the technical solution of the present invention is not limited in any way, and in the specific application, those skilled in the art can set the solution as required, and the present invention is not limited thereto.
It should be noted that the above-described work flow is only illustrative, and does not limit the scope of the present invention, and in practical applications, a person skilled in the art may select some or all of them to achieve the purpose of the solution of the embodiment according to practical needs, and the present invention is not limited herein.
The above only is the preferred embodiment of the present invention, not limiting the scope of the present invention, all the equivalent structure changes made by the contents of the specification and the drawings under the inventive concept of the present invention, or the direct/indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. A signal amplification circuit is characterized by comprising a primary amplification circuit, a filter circuit and a secondary amplification circuit, wherein the primary amplification circuit is connected with the filter circuit, and the filter circuit is connected with the secondary amplification circuit; wherein the content of the first and second substances,
the first-stage amplifying circuit is used for receiving an input signal and outputting a first amplified signal;
the filter circuit is used for receiving the first amplified signal, filtering the first amplified signal and outputting a second amplified signal;
and the secondary amplifying circuit is used for receiving the second amplified signal and adjusting the amplification factor of the second amplified signal.
2. The signal amplification circuit of claim 1, wherein the first stage amplification circuit comprises a first chopper-stabilized amplifier and a second chopper-stabilized amplifier; wherein the content of the first and second substances,
the input end of the first-stage amplifying circuit is the non-inverting input end of the first chopper-stabilized amplifier and the non-inverting input end of the second chopper-stabilized amplifier; the output end of the first amplifying circuit is the output end of the first chopper-stabilized amplifier and the output end of the second chopper-stabilized amplifier.
3. The signal amplification circuit of claim 2, wherein the first chopper-stabilized amplifier comprises a main amplifier and a nulling amplifier; wherein the input of the main amplifier is connected to the output of the zeroing amplifier to zero the main amplifier.
4. The signal amplification circuit of claim 3, wherein the first chopper-stabilized amplifier further comprises a compensation bias circuit; the compensation bias circuit is connected with the main amplifier and the zero calibration amplifier, and is used for enabling the main amplifier and the zero calibration amplifier to have flat response in a wide frequency band.
5. The signal amplification circuit of claim 2, wherein the primary amplification circuit further comprises a first resistor, a second resistor, and a third resistor; wherein the content of the first and second substances,
the first end of the first resistor is connected with the inverting input end of the first chopper-stabilized amplifier, the second end of the first resistor is connected with the output end of the first chopper-stabilized amplifier, the first end of the second resistor is connected with the inverting input end of the first chopper-stabilized amplifier, the second end of the second resistor is connected with the inverting input end of the second chopper-stabilized amplifier, the first end of the third resistor is connected with the inverting input end of the second chopper-stabilized amplifier, and the second end of the third resistor is connected with the output end of the second chopper-stabilized amplifier.
6. The signal amplification circuit of claim 2, wherein the filter circuit comprises a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor; wherein the content of the first and second substances,
the first end of the fourth resistor is connected with the output end of the first chopper-stabilized amplifier, the second end of the fourth resistor is connected with the first end of the first capacitor, the second end of the first capacitor is connected with the first end of the second capacitor, the second end of the first capacitor is grounded, the second end of the second capacitor is connected with the first end of the fifth resistor, and the second end of the fifth resistor is connected with the output end of the second chopper-stabilized amplifier.
7. The signal amplification circuit of claim 6, wherein the secondary amplification circuit comprises a first amplifier; wherein the content of the first and second substances,
the inverting input end of the first amplifier is connected with the first end of the first capacitor, and the non-inverting input end of the first amplifier is connected with the second end of the second capacitor.
8. The signal amplification circuit of claim 7, wherein the secondary amplification circuit further comprises a sixth resistor and a seventh resistor; wherein the content of the first and second substances,
the first end of the sixth resistor is connected with the inverting input end of the first amplifier, the second end of the sixth resistor is connected with the output end of the first amplifier, the first end of the seventh resistor is connected with the non-inverting input end of the first amplifier, and the second end of the seventh resistor is grounded.
9. A signal amplifier characterized in that it comprises a signal amplification circuit according to any one of claims 1 to 8.
10. A signal amplifier chip integrating a signal amplification circuit according to any one of claims 1 to 8 or comprising a signal amplifier according to claim 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921884831.4U CN210578439U (en) | 2019-11-04 | 2019-11-04 | Signal amplification circuit, signal amplifier and signal amplifier chip |
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| CN201921884831.4U CN210578439U (en) | 2019-11-04 | 2019-11-04 | Signal amplification circuit, signal amplifier and signal amplifier chip |
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| CN210578439U true CN210578439U (en) | 2020-05-19 |
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