CN110068394A - A kind of chip temperature detection circuit and audio-frequency power amplifier - Google Patents
A kind of chip temperature detection circuit and audio-frequency power amplifier Download PDFInfo
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- CN110068394A CN110068394A CN201910276107.1A CN201910276107A CN110068394A CN 110068394 A CN110068394 A CN 110068394A CN 201910276107 A CN201910276107 A CN 201910276107A CN 110068394 A CN110068394 A CN 110068394A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/32—Compensating for temperature change
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
Abstract
The present invention provides a kind of chip temperature detection circuit and audio-frequency power amplifiers, including temperature sampling unit, first control unit, the first buffer cell, the second buffer cell, the second control unit and compare amplifying unit, temperature sampling voltage is obtained so as to pass through temperature sampling unit, buffer cell and compare amplifying unit, to obtain the temperature of chip according to temperature sampling voltage, influence of the temperature change to loudspeaker current detecting is eliminated；By with the first control unit and the second control unit of alternate run under the second state, eliminating influence of the offset voltage of the process deviation generation of buffer cell to temperature sampling voltage in the first state, improving the accuracy of chip temperature testing result.
Description
Technical field
The present invention relates to digital audio-power amplifier technical field, more specifically to a kind of chip temperature detection circuit and
Audio-frequency power amplifier.
Background technique
The reliability of loudspeaker is increasingly paid attention in consumer electronics field, especially the application in mobile terminals such as mobile phones
Aspect.In the loudspeaker course of work, need the impedance data of loudspeaker being real-time transmitted to processor, so that processor is according to impedance
Variation control music amplitude, make loudspeaker work in confidence band, play the role of protect loudspeaker.
Voltage and current is detected in the output stage of D-type audio power amplifier, and voltage can be obtained by divided by electric current
The impedance of loudspeaker.In the application of D-type audio power amplifier, common current detection mode is to connect on power output stage
The metallic resistance of tens m Ω converts electrical current into voltage, then obtains the current value flowed through on loudspeaker by analog-digital converter.
But since the temperature coefficient of metallic resistance is larger, as the temperature of chip increases, the resistance of metallic resistance
Value can become larger, and the pressure drop on metallic resistance can also become larger at this time, cause the current detection value of loudspeaker bigger than normal.Based on this, one is needed
The circuit of the temperature of chip where kind detection audio-frequency power amplifier, to eliminate influence of the temperature change to loudspeaker current detecting.
Summary of the invention
In view of this, the present invention provides a kind of chip temperature detection circuit and audio-frequency power amplifiers, to detect audio
The temperature of chip where power amplifier eliminates influence of the temperature change to loudspeaker current detecting.
To achieve the above object, the invention provides the following technical scheme:
A kind of chip temperature detection circuit, comprising:
Temperature sampling unit, for exporting the first sampled voltage and the second sampled voltage, first sampled voltage and institute
It is unequal to state the second sampled voltage；
First control unit, in said first condition, first sampled voltage being transmitted to described first and is delayed
It rushes unit, second sampled voltage is transmitted to second buffer cell, in said second condition, described first is adopted
Sample voltage transmission is transmitted to first buffer cell to second buffer cell, by second sampled voltage, and described
One state and the second state alternate run；
First buffer cell, for being buffered to obtain the first buffer voltagc to first sampled voltage, alternatively, to institute
The second sampled voltage is stated to be buffered to obtain the second buffer voltagc；
Second buffer cell, for being buffered to obtain the second buffer voltagc to second sampled voltage, alternatively, to institute
The first sampled voltage is stated to be buffered to obtain the first buffer voltagc；
Second control unit, in said first condition, buffering electricity for the first of first buffer cell output
Pressure, which is transmitted to, to be compared the first input end of amplifying unit, the second buffer voltagc that second buffer cell exports is transmitted to institute
The second input terminal for comparing amplifying unit is stated, in said second condition, by the second buffering of first buffer cell output
Voltage transmission is passed to relatively second input terminal of amplifying unit, by the first buffer voltagc of second buffer cell output
Transport to the first input end of the relatively amplifying unit；
The relatively amplifying unit is used to amplify processing to first buffer voltagc and second buffer voltagc,
And temperature sampling voltage is obtained according to first buffer voltagc and second buffer voltagc, according to the temperature sampling electricity
Pressure obtains the temperature of the chip.
Optionally, the temperature sampling unit includes the first current source, the second current source, the first transistor and the second crystal
Pipe, the first transistor and the second transistor are bipolar transistor；
One end of first current source is connected with the emitter of the first transistor, first current source it is another
End is connected with voltage input end；
One end of second current source is connected with the emitter of the second transistor, second current source it is another
End is connected with the voltage input end；
The base stage of the first transistor is connected to ground after being connected with collector, the base stage and current collection of the second transistor
It is connected to ground after being extremely connected；
The emitter of the first transistor is connected with the first output end of the temperature sampling unit, second crystal
The emitter of pipe is connected with the second output terminal of the temperature sampling unit, the first output end output of the temperature sampling unit
The second output terminal of first sampled voltage, the temperature sampling unit exports second sampled voltage.
Optionally, the first control unit includes first switch, second switch, third switch and the 4th switch；
The first end of the first switch is connected with the first output end of the temperature sampling unit, second end and described the
The input terminal of one buffer cell is connected；
The first end of the second switch is connected with the first output end of the temperature sampling unit, second end and described the
The input terminal of two buffer cells is connected；
The first end of third switch is connected with the second output terminal of the temperature sampling unit, second end and described the
The input terminal of one buffer cell is connected；
The first end of 4th switch is connected with the second output terminal of the temperature sampling unit, second end and described the
The input terminal of two buffer cells is connected；
In said first condition, it the first switch and the described 4th closes the switch, the second switch and described
Three switches disconnect, and first sampled voltage is transmitted to first buffer cell, transmits second sampled voltage
To second buffer cell；
In said second condition, the first switch and the 4th switch disconnect, the second switch and described the
Three close the switch, and first sampled voltage is transmitted to second buffer cell, transmits second sampled voltage
To first buffer cell.
Optionally, second control unit includes the 5th switch, the 6th switch, the 7th switch and the 8th switch；
The first end of 5th switch is the same as the output end of first buffer cell is connected, second end is put compared with described
The first input end of big unit is connected；
The first end of 6th switch is the same as the output end of second buffer cell is connected, second end is put compared with described
The first input end of big unit is connected；
The first end of 7th switch is the same as the output end of first buffer cell is connected, second end is put compared with described
Second input terminal of big unit is connected；
The first end of 8th switch is the same as the output end of second buffer cell is connected, second end is put compared with described
Second input terminal of big unit is connected；
In said first condition, it the 5th switch and the described 8th closes the switch, the 6th switch and described the
Seven switches disconnect, and the first buffer voltagc that first buffer cell exports is transmitted to the first input for comparing amplifying unit
End, the second input terminal that the second buffer voltagc that second buffer cell exports is transmitted to the relatively amplifying unit；
In said second condition, the 5th switch and the 8th switch disconnect, the 6th switch and described the
Seven close the switch, and the second buffer voltagc that first buffer cell exports is transmitted to the second of the relatively amplifying unit
Input terminal, the first input that the first buffer voltagc that second buffer cell exports is transmitted to the relatively amplifying unit
End.
Optionally, the first switch, the 4th switch, the 5th switch and the 8th switch are the first transistorlike, described the
Two switches, third switch, the 6th switch and the 7th switch are the second transistorlike；
First transistorlike is PMOS transistor, and second transistorlike is NMOS transistor；
Alternatively, first transistorlike is NMOS transistor, second transistorlike is PMOS transistor.
It optionally, further include clock signal generation module, the output end of the clock signal generation module and described first
It switchs to the grid of the 8th switch and is connected；
The output end of the clock signal generation module exports the alternate clock signal of low and high level, to control described first
Control unit and second control unit are in the first state and the second state alternate run.
Optionally, the relatively amplifying unit includes first resistor, second resistance, 3rd resistor, the 4th resistance, the 5th electricity
Resistance, the first operational amplifier and capacitor；
The first input end of one end of first resistor amplifying unit compared with described is connected, the other end and described first
The non-inverting input terminal of operational amplifier is connected；
Second input terminal of one end of second resistance amplifying unit compared with described is connected, the other end and described first
The inverting input terminal of operational amplifier is connected；
One end ground connection of the 3rd resistor, the other end are connected with the non-inverting input terminal of first operational amplifier；
One end of 4th resistance is connected with the output end of first operational amplifier, the other end and described first is transported
The inverting input terminal for calculating amplifier is connected；
One end of 5th resistance is connected with the output end of first operational amplifier, the other end and the capacitor
One end is connected, the other end ground connection of the capacitor；
5th resistance and the common end of the capacitor be it is described compared with amplifying unit output end.
Optionally, first buffer cell includes second operational amplifier, and the reverse phase of the second operational amplifier is defeated
Enter end to be connected with the output end of the second operational amplifier, the non-inverting input terminal of the second operational amplifier is described first
The input terminal of buffer cell；
Second buffer cell includes third operational amplifier, the inverting input terminal of the third operational amplifier and institute
The output end for stating third operational amplifier is connected, and the non-inverting input terminal of the third operational amplifier is second buffer cell
Input terminal.
A kind of audio-frequency power amplifier, including as above described in any item chip temperature detection circuits.
It optionally, further include analog-digital converter and processor, the input terminal of the analog-digital converter amplifies compared with described
The output end of unit is connected, and the output end of the analog-digital converter is connected with the processor；
The analog-digital converter is used to the temperature sampling voltage being converted to digital voltage signal；
The processor according to the corresponding relationship of the digital voltage signal and digital voltage signal and temperature for obtaining
Obtain the temperature of the chip.
Compared with prior art, the technical scheme provided by the invention has the following advantages:
Chip temperature detection circuit provided by the present invention and audio-frequency power amplifier pass through temperature sampling unit, buffering
Unit obtains temperature sampling voltage with amplifying unit is compared, and to obtain the temperature of chip according to temperature sampling voltage, eliminates temperature
Change the influence to loudspeaker current detecting；By in the first state with the first control unit of alternate run under the second state and
Second control unit eliminates influence of the offset voltage of the process deviation generation of buffer cell to temperature sampling voltage, improves
The accuracy of chip temperature testing result.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structural schematic diagram of chip temperature detection circuit provided in an embodiment of the present invention；
Fig. 2 is a kind of particular circuit configurations schematic diagram of chip temperature detection circuit provided in an embodiment of the present invention；
Fig. 3 is a kind of clock signal schematic diagram provided in an embodiment of the present invention.
Specific embodiment
It is core of the invention thought above, to keep the above objects, features and advantages of the present invention more obvious easily
Understand, following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention is clearly and completely retouched
It states, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Based on the present invention
In embodiment, every other implementation obtained by those of ordinary skill in the art without making creative efforts
Example, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a kind of chip temperature detection circuits, as shown in Figure 1, include temperature sampling unit 10,
First control unit 11, the first buffer cell 12, the second buffer cell 13, the second control unit 14 and compare amplifying unit 15.
Wherein, temperature sampling unit 10 is for exporting the first sampled voltage and the second sampled voltage, the first sampled voltage with
Second sampled voltage is unequal；
First sampled voltage is transmitted to the first buffering list 12, by the in the first state by first control unit 11
Two sampled voltages are transmitted to the second buffer cell 13, in the second condition, the first sampled voltage are transmitted to the second buffer cell
13, the second sampled voltage is transmitted to the first buffer cell 12, wherein first state and the second state alternate run；
First buffer cell 12 obtains the first buffer voltagc for being buffered to the first sampled voltage, alternatively, to second
Sampled voltage is buffered to obtain the second buffer voltagc；
Second buffer cell 13 obtains the second buffer voltagc for being buffered to the second sampled voltage, alternatively, to first
Sampled voltage is buffered to obtain the first buffer voltagc；
Second control unit 14, in the first state, the first buffer voltagc that the first buffer cell 12 is exported to pass
It transports to and compares the first input end of amplifying unit 15, the second buffer voltagc that the second buffer cell 13 exports is transmitted to compare and is put
The second buffer voltagc that first buffer cell 12 exports is transmitted to ratio in the second condition by the second input terminal of big unit 15
Compared with amplifying unit 15 the second input terminal, the first buffer voltagc that the second buffer cell 13 exports is transmitted to and compares amplifying unit
15 first input end；
Compare amplifying unit 15 for amplifying processing to the first buffer voltagc and the second buffer voltagc, and according to first
Buffer voltagc and the second buffer voltagc obtain temperature sampling voltage, to obtain the temperature of chip according to temperature sampling voltage.
In the embodiment of the present invention, relevant to chip temperature the first sampled voltage and the are obtained by temperature sampling unit 10
Two sampled voltages, by the first buffer cell 12 and the second buffer cell 13 respectively to the first sampled voltage and the second sampled voltage
It is buffered, guarantees the stability of sampled voltage, by comparing amplifying unit 15 to the first buffer voltagc and the second buffer voltagc
It amplifies, and temperature sampling voltage is obtained according to the difference of amplified first buffer voltagc and the second buffer voltagc, due to
Temperature sampling voltage is directly proportional to chip temperature, therefore, the temperature of chip can be obtained according to temperature sampling voltage, and then can be with
Eliminate influence of the temperature change to loudspeaker current detecting.
Also, by single with the first control unit 11 of alternate run under the second state and the second control in the first state
Member 14 eliminates influence of the offset voltage of the process deviation generation of buffer cell to temperature sampling voltage, improves chip temperature
Spend the accuracy of testing result.
In one particular embodiment of the present invention, as shown in Fig. 2, temperature sampling unit 10 include the first current source 101,
Second current source 102, the first transistor 103 and second transistor 104, the first transistor 103 and second transistor 104 are bipolar
Property transistor.Optionally, the electric current of the second current source 102 output is 10 times of the electric current of the first current source 101 output.
Wherein, one end of the first current source 101 is connected with the emitter of the first transistor 103, the first current source 101 it is another
One end is connected with voltage input end VDD；One end of second current source 102 is connected with the emitter of second transistor 104, the second electricity
The other end in stream source 102 is connected with voltage input end VDD；The base stage of the first transistor 103 is connected to ground after being connected with collector,
The base stage of second transistor 104 is connected to ground after being connected with collector；The emitter and temperature sampling unit of the first transistor 103
10 the first output end is connected, and the emitter of second transistor 104 is connected with the second output terminal of temperature sampling unit 10,
In, the first output end of temperature sampling unit 10 exports the first sampled voltage, the second output terminal output of temperature sampling unit 10
Second sampled voltage.
In one particular embodiment of the present invention, as shown in Fig. 2, first control unit 11 includes first switch K1, the
Two switch K2, third switch K3 and the 4th switch K4；Second control unit 14 include the 5th switch K5, the 6th switch K6,
7th switch K7 and the 8th switch K8.
Wherein, the first end of first switch K1 be connected with the first output end of temperature sampling unit 10, second end and first
The input terminal of buffer cell 12 is connected；The first end of second switch K2 is connected with the first output end of temperature sampling unit 10,
Two ends are connected with the input terminal of the second buffer cell 13；The first end of third switch K3 and the second output of temperature sampling unit 10
End is connected, second end is connected with the input terminal of the first buffer cell 12；The first end and temperature sampling unit 10 of 4th switch K4
Second output terminal be connected, second end is connected with the input terminal of the second buffer cell 13；
The first end of 5th switch K5 and the output end of the first buffer cell 12 be connected, second end amplifying unit 15 compared with
First input end be connected；The first end of 6th switch K6 is connected with the output end of the second buffer cell 13, second end is compared with
The first input end of amplifying unit 15 is connected；The first end of 7th switch K7 is connected with the output end of the first buffer cell 12,
Second input terminal of two ends amplifying unit 15 compared with is connected；The output of the first end of 8th switch K8 and the second buffer cell 13
End is connected, the second input terminal of second end amplifying unit 15 compared with is connected；
In the first state, first switch K1 and the 4th switch K4 closure, second switch K2 and third switch K3 are disconnected, the
Five switch K5 and the 8th switch K8 closure, the 6th switch K6 and the 7th switch K7 disconnection, are transmitted to for the first sampled voltage
Second sampled voltage is transmitted to the second buffer cell 13, first delaying of exporting the first buffer cell 12 by one buffer cell 12
Voltage transmission is rushed to the second buffer voltagc transmission compared the first input end of amplifying unit 15, export the second buffer cell 13
To the second input terminal for comparing amplifying unit 15；
In the second condition, first switch K1 and the 4th switch K4 is disconnected, second switch K2 and third switch K3 are closed, the
Five switch K5 and the 8th switch K8 are disconnected, the 6th switch K6 and the 7th switch K7 are closed, and the first sampled voltage is transmitted to the
Second sampled voltage is transmitted to the first buffer cell 12, second delaying of exporting the first buffer cell 12 by two buffer cells 13
Voltage transmission is rushed to the first buffer voltagc transmission compared the second input terminal of amplifying unit 15, export the second buffer cell 13
To the first input end for comparing amplifying unit 15.
Optionally, first switch K1, the 4th switch K4, the 5th switch K5 and the 8th switch K8 are the first transistorlike, the
Two switch K2, third switch K3, the 6th switch K6 and the 7th switch K7 are the second transistorlike；Wherein, the first transistorlike is
PMOS transistor, the second transistorlike are NMOS transistor；Alternatively, the first transistorlike is NMOS transistor, the second crystalloid
Pipe is PMOS transistor.
Based on this, chip temperature detection circuit provided in an embodiment of the present invention further includes clock signal generation module, this when
The output end of sequential signal generation module is connected with the grid of first switch K1 to the 8th switch K8；Also, the clock signal generates
The output end of module exports the alternate clock signal of low and high level, is existed with controlling first control unit 11 and the second control unit 14
First state and the second state alternate run.
Using first switch K1, the 4th switch K4, the 5th switch K5 and the 8th switch K8 as PMOS transistor, second switch
K2, third switch K3, the 6th switch K6 and the 7th switch K7 is for NMOS transistor, clock signal SWAP are as shown in figure 3, work as
When the output end of clock signal generation module exports high level, first switch K1, the 4th switch K4, the 5th switch K5 and the 8th are opened
Close K8 disconnections, second switch K2, third switch K3, the 6th switch K6 and the 7th switch K7 are closed, first control unit 11 and the
Two control units 14 are in the second state；When the output end of clock signal generation module exports low level, first switch K1, the
Four switch K4, the 5th switch K5 and the 8th switch K8 closure, second switch K2, third switch K3, the 6th switch K6 and the 7th are opened
It closes K7 to disconnect, first control unit 11 and the second control unit 14 are in first state.
In one particular embodiment of the present invention, as shown in Fig. 2, comparing amplifying unit 15 includes first resistor R1, the
Two resistance R2,3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the first operational amplifier A1 and capacitor C.Wherein, the first electricity
The resistance value for hindering R1 and second resistance R2 is equal, and the resistance of 3rd resistor R3 and the 4th resistance R4 are equal, and 3rd resistor R3
Resistance value is 10 times of the resistance value of first resistor R1.
Wherein, the first input end of one end of first resistor R1 amplifying unit 15 compared with is connected, the other end and first is transported
The non-inverting input terminal for calculating amplifier A1 is connected；Second input terminal of one end of second resistance R2 amplifying unit 15 compared with is connected,
The other end is connected with the inverting input terminal of the first operational amplifier A1；One end ground connection, the other end and the first fortune of 3rd resistor R3
The non-inverting input terminal for calculating amplifier A1 is connected；One end of 4th resistance R4 is connected with the output end of the first operational amplifier A1, is another
One end is connected with the inverting input terminal of the first operational amplifier A1；One end of 5th resistance R5 is defeated with the first operational amplifier A1's
Outlet is connected, the other end is connected with one end of capacitor C, the other end ground connection of capacitor C；The common end of 5th resistance R5 and capacitor C
For the output end vo ut for comparing amplifying unit 15.
Also, as shown in Fig. 2, the first buffer cell 12 include second operational amplifier A2, second operational amplifier A2's
Inverting input terminal is connected with the output end of second operational amplifier A2, and the non-inverting input terminal of second operational amplifier A2 is first slow
Rush the input terminal of unit 12；Second buffer cell 13 includes third operational amplifier A3, and the reverse phase of third operational amplifier A3 is defeated
Enter end to be connected with the output end of third operational amplifier A3, the non-inverting input terminal of third operational amplifier A3 is that the second buffering is single
The input terminal of member 13.
In the embodiment of the present invention, as shown in Fig. 2, being adopted using the base emitter voltage of the first transistor 103 as first
Sample voltage VBE1, using the base emitter voltage of second transistor 104 as the second sampled voltage VBE2, whereinVTFor thermal voltage, I is the collector current of the first transistor 103,10I
For the collector current of second transistor 104, Is is the saturation current of the first transistor 103 and second transistor 104.
Pass through VBE1And VBE2Formula it is found that electric current I and ISIt is all related with temperature, therefore, the first sampled voltage VBE1With
Two sampled voltage VBE2It can change with the variation of chip temperature.But due to the first sampled voltage VBE1With the second sampled voltage
VBE2It is not in a linear relationship with the variation of temperature, therefore, if directly by the first sampled voltage VBE1With the second sampled voltage VBE2As
Temperature sampling voltage will affect the accuracy of temperature detection.Buffer cell is used based on this, in the embodiment of the present invention and is compared puts
Big unit handles sampled voltage, to improve the accuracy of temperature detection result.
Ideally, the first buffer voltagc V of the output end of the first buffer cell 12BO1=VBE1, the second buffer cell
Second buffer voltagc V of 13 output endBO2=VBE2,
,
Again due to thermal voltage VTWith positive temperature coefficientTherefore, VOUTRelationship with temperature is VOUT∝
2mV/℃。
But in practical manufacturing process, since technological fluctuation will lead to the first buffer cell 12 and the second buffer cell
13 Differential Input cannot be essentially equal to pipe and difference current source part, therefore, will lead to the first buffer cell 12 and second
There is offset voltage V in buffer cell 13OS1And VOS2, and offset voltage VOS1And VOS2It is unequal, and then cause temperature sampling electric
Press VOUTIt can change with technique change, cause the error of chip temperature detection circuit larger.
Based on this, in the embodiment of the present invention, in the first state, by the first sampled voltage VBE1It is transmitted to the first buffering list
Member 12, the first buffer voltagc V for exporting the first buffer cell 12BO1It is transmitted to the first input end for comparing amplifying unit 15, it will
Second sampled voltage VBE2The the second buffer voltagc V for being transmitted to the second buffer cell 13, exporting the second buffer cell 13BO2Transmission
To the second input terminal for comparing amplifying unit 15, in the second condition, by the first sampled voltage VBE1It is transmitted to the second buffer cell
13, the first buffer voltagc V for exporting the second buffer cell 13BO1It is transmitted to the first input end for comparing amplifying unit 15, it will
Second sampled voltage VBE2The the second buffer voltagc V for being transmitted to the first buffer cell 12, exporting the first buffer cell 12BO2Transmission
To the second input terminal for comparing amplifying unit 15,
So that VBO1=VBE1+(VOS1+VOS2)/2,
VBO2=VBE2+(VOS1+VOS2)/2,
So that
, make
The offset voltage for obtaining the first buffer cell 12 and the second buffer cell 13 is cancelled, so that VOUTRelationship with temperature is VOUT∝
2mV/ DEG C, to eliminate influence of the offset voltage of buffer cell to chip temperature testing result, improve chip temperature inspection
The accuracy in detection of slowdown monitoring circuit.
The embodiment of the invention also provides a kind of audio-frequency power amplifier, the chip temperature provided including any embodiment as above
Spend detection circuit.Optionally, which is D-type audio power amplifier.
Optionally, audio-frequency power amplifier provided in an embodiment of the present invention further includes analog-digital converter and processor, modulus
The output end of the input terminal of converter amplifying unit compared with is connected, and the output end of analog-digital converter is connected with processor；Modulus
Converter is used to temperature sampling voltage being converted to digital voltage signal；Processor is used for according to digital voltage signal and number
Voltage signal and the corresponding relationship of temperature obtain the temperature of chip, to eliminate influence of the temperature change to loudspeaker current detecting.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.To the upper of the disclosed embodiments
It states bright, enables those skilled in the art to implement or use the present invention.Various modifications to these embodiments are to ability
Will be apparent for the professional technician in domain, the general principles defined herein can not depart from it is of the invention
In the case where spirit or scope, realize in other embodiments.Therefore, the present invention be not intended to be limited to it is shown in this article these
Embodiment, and it is to fit to the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. a kind of chip temperature detection circuit characterized by comprising
Temperature sampling unit, for exporting the first sampled voltage and the second sampled voltage, first sampled voltage and described the
Two sampled voltages are unequal；
First control unit, in said first condition, it is single that first sampled voltage being transmitted to first buffering
Second sampled voltage is transmitted to second buffer cell by member, in said second condition, by the first sampling electricity
Pressure is transmitted to second buffer cell, second sampled voltage is transmitted to first buffer cell, first shape
State and the second state alternate run；
First buffer cell, for being buffered to obtain the first buffer voltagc to first sampled voltage, alternatively, to described
Two sampled voltages are buffered to obtain the second buffer voltagc；
Second buffer cell, for being buffered to obtain the second buffer voltagc to second sampled voltage, alternatively, to described
One sampled voltage is buffered to obtain the first buffer voltagc；
Second control unit, in said first condition, the first buffer voltagc of first buffer cell output to be passed
It transports to and compares the first input end of amplifying unit, the second buffer voltagc that second buffer cell exports is transmitted to the ratio
Compared with the second input terminal of amplifying unit, in said second condition, the second buffer voltagc that first buffer cell is exported
It is transmitted to relatively second input terminal of amplifying unit, is transmitted to the first buffer voltagc that second buffer cell exports
The first input end of the relatively amplifying unit；
The relatively amplifying unit is for amplifying processing, and root to first buffer voltagc and second buffer voltagc
Temperature sampling voltage is obtained according to first buffer voltagc and second buffer voltagc, to obtain according to the temperature sampling voltage
Obtain the temperature of the chip.
2. circuit according to claim 1, which is characterized in that the temperature sampling unit includes the first current source, second
Current source, the first transistor and second transistor, the first transistor and the second transistor are bipolar transistor；
One end of first current source is connected with the emitter of the first transistor, the other end of first current source with
Voltage input end is connected；
One end of second current source is connected with the emitter of the second transistor, the other end of second current source with
The voltage input end is connected；
The base stage of the first transistor is connected to ground after being connected with collector, the base stage and collector phase of the second transistor
It is connected to ground after even；
The emitter of the first transistor is connected with the first output end of the temperature sampling unit, the second transistor
Emitter is connected with the second output terminal of the temperature sampling unit, described in the first output end output of the temperature sampling unit
The second output terminal of first sampled voltage, the temperature sampling unit exports second sampled voltage.
3. circuit according to claim 1, which is characterized in that the first control unit includes first switch, second opens
It closes, third switch and the 4th switchs；
The first end of the first switch is connected with the first output end of the temperature sampling unit, second end is delayed with described first
The input terminal for rushing unit is connected；
The first end of the second switch is connected with the first output end of the temperature sampling unit, second end is delayed with described second
The input terminal for rushing unit is connected；
The first end of the third switch is connected with the second output terminal of the temperature sampling unit, second end is delayed with described first
The input terminal for rushing unit is connected；
The first end of 4th switch is connected with the second output terminal of the temperature sampling unit, second end is delayed with described second
The input terminal for rushing unit is connected；
In said first condition, the first switch and the described 4th close the switch, the second switch and the third are opened
Shutdown is opened, and first sampled voltage is transmitted to first buffer cell, second sampled voltage is transmitted to institute
State the second buffer cell；
In said second condition, the first switch and the 4th switch disconnection, the second switch and the third are opened
It closes and closes, first sampled voltage is transmitted to second buffer cell, second sampled voltage is transmitted to institute
State the first buffer cell.
4. circuit according to claim 3, which is characterized in that second control unit is opened including the 5th switch, the 6th
It closes, the 7th switch and the 8th switchs；
The first end of 5th switch is connected with the output end of first buffer cell, second end amplifies list compared with described
The first input end of member is connected；
The first end of 6th switch is connected with the output end of second buffer cell, second end amplifies list compared with described
The first input end of member is connected；
The first end of 7th switch is connected with the output end of first buffer cell, second end amplifies list compared with described
Second input terminal of member is connected；
The first end of 8th switch is connected with the output end of second buffer cell, second end amplifies list compared with described
Second input terminal of member is connected；
In said first condition, the 5th switch is closed the switch with the described 8th, the 6th switch and the described 7th is opened
Shutdown is opened, by first buffer cell export the first buffer voltagc be transmitted to compare amplifying unit first input end,
The second buffer voltagc that second buffer cell exports is transmitted to the second input terminal of the relatively amplifying unit；
In said second condition, the 5th switch and the 8th switch disconnect, the 6th switch and the described 7th is opened
It closes and closes, the second buffer voltagc that first buffer cell exports is transmitted to the second input of the relatively amplifying unit
End, the first input end that the first buffer voltagc that second buffer cell exports is transmitted to the relatively amplifying unit.
5. circuit according to claim 4, which is characterized in that the first switch, the 4th switch, the 5th switch and the 8th
Switch is the first transistorlike, and the second switch, third switch, the 6th switch and the 7th switch are the second transistorlike；
First transistorlike is PMOS transistor, and second transistorlike is NMOS transistor；
Alternatively, first transistorlike is NMOS transistor, second transistorlike is PMOS transistor.
6. circuit according to claim 5, which is characterized in that further include clock signal generation module, the clock signal
The output end of generation module is connected with the grid of the first switch to the 8th switch；
The output end of the clock signal generation module exports the alternate clock signal of low and high level, to control first control
Unit and second control unit are in the first state and the second state alternate run.
7. circuit according to claim 1, which is characterized in that the relatively amplifying unit includes first resistor, the second electricity
Resistance, 3rd resistor, the 4th resistance, the 5th resistance, the first operational amplifier and capacitor；
The first input end of one end of first resistor amplifying unit compared with described is connected, the other end and first operation
The non-inverting input terminal of amplifier is connected；
Second input terminal of one end of second resistance amplifying unit compared with described is connected, the other end and first operation
The inverting input terminal of amplifier is connected；
One end ground connection of the 3rd resistor, the other end are connected with the non-inverting input terminal of first operational amplifier；
One end of 4th resistance is connected with the output end of first operational amplifier, the other end is put with first operation
The inverting input terminal of big device is connected；
One end of 5th resistance is connected with the output end of first operational amplifier, one end of the other end and the capacitor
It is connected, the other end ground connection of the capacitor；
5th resistance and the common end of the capacitor be it is described compared with amplifying unit output end.
8. circuit according to claim 1, which is characterized in that first buffer cell includes second operational amplifier,
The inverting input terminal of the second operational amplifier is connected with the output end of the second operational amplifier, and second operation is put
The non-inverting input terminal of big device is the input terminal of first buffer cell；
Second buffer cell includes third operational amplifier, the inverting input terminal of the third operational amplifier and described the
The output end of three operational amplifiers is connected, and the non-inverting input terminal of the third operational amplifier is the defeated of second buffer cell
Enter end.
9. a kind of audio-frequency power amplifier, which is characterized in that detected including chip temperature according to any one of claims 1 to 8
Circuit.
10. power amplifier according to claim 9, which is characterized in that it further include analog-digital converter and processor, it is described
The output end of the input terminal of analog-digital converter amplifying unit compared with described is connected, the output end of the analog-digital converter with it is described
Processor is connected；
The analog-digital converter is used to the temperature sampling voltage being converted to digital voltage signal；
The processor is used to obtain institute according to the digital voltage signal and digital voltage signal and the corresponding relationship of temperature
State the temperature of chip.
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| CN201910276107.1A CN110068394A (en) | 2019-04-08 | 2019-04-08 | A kind of chip temperature detection circuit and audio-frequency power amplifier |
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| CN201910276107.1A CN110068394A (en) | 2019-04-08 | 2019-04-08 | A kind of chip temperature detection circuit and audio-frequency power amplifier |
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Application publication date: 20190730 |