CN210573309U - Power-on and power-off time sequence control circuit of multi-power system - Google Patents
Power-on and power-off time sequence control circuit of multi-power system Download PDFInfo
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- CN210573309U CN210573309U CN201921777167.3U CN201921777167U CN210573309U CN 210573309 U CN210573309 U CN 210573309U CN 201921777167 U CN201921777167 U CN 201921777167U CN 210573309 U CN210573309 U CN 210573309U
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Abstract
The utility model relates to a multi-power system power-on and power-off sequence control circuit, which comprises three converters U1, U2 and U3; capacitors C14 and C15 and a system power supply VPPin are connected to a Vin end of the converter U3, capacitors C16 and C17 are connected to an OUT end of the converter U3, and a capacitor C19 is connected to an ENABLE end of the converter U3; capacitors C6 and C5 and a power supply VPP are connected to a Vin end of the converter U2, capacitors C7 and C8 are connected to an OUT end of the converter U2, and a capacitor C10 is connected to an ENABLE end of the converter U3; capacitors C1 and C2 and a power supply VPP are connected to a Vin end of the converter U1, capacitors C3 and C4 are connected to an OUT end of the converter U1, and a capacitor C9 is connected to an ENABLE end of the converter U1; the utility model discloses can satisfy the last electric time sequence control of going up of 4 ways of power in concrete system application, the cooperation different DC/DC conversion unit can realize the multichannel power supply system of arbitrary voltage power in a flexible way and go up the electric time sequence demand.
Description
Technical Field
The utility model relates to an electricity sequential control field about embedded hardware system integrated circuit board especially relates to an electricity sequential control circuit about many power systems.
Background
Along with the function of an electronic hardware system is continuously increased, the corresponding board circuit is gradually complicated, wherein the power module not only meets the energy requirement, but also ensures that the core part of the system runs firstly when being powered on, the power peripheral delays the power on, the power peripheral needs to be ensured to be powered off firstly when being powered off, and the core part of the system is powered off later, so that the time sequence requirement of powering on and off is strict, the electric shock is avoided, the failure rate is reduced, and the reliable running of the whole hardware system is ensured.
For controlling the power-on and power-off sequence of the system power supply module, although a few special chips are available in the market at present, the application is limited to low-power application and is not flexible.
SUMMERY OF THE UTILITY MODEL
In order to solve the problem, the utility model provides an electricity sequential control circuit about many power systems, cooperation different DC/DC conversion unit can realize the multichannel power supply system of arbitrary voltage power in a flexible way and go up the electricity sequential demand.
In order to achieve the above purpose, the utility model adopts the following technical scheme: a multi-power supply system power-on and power-off sequence control circuit comprises three converters U1, U2 and U3; capacitors C14 and C15 and a system power supply VPPin are connected to a Vin end of the converter U3, capacitors C16 and C17 are connected to an OUT end of the converter U3, and a capacitor C19 is connected to an ENABLE end of the converter U3; capacitors C6 and C5 and a power supply VPP are connected to a Vin end of the converter U2, capacitors C7 and C8 are connected to an OUT end of the converter U2, and a capacitor C10 is connected to an ENABLE end of the converter U3; capacitors C1 and C2 and a power supply VPP are connected to a Vin end of the converter U1, capacitors C3 and C4 are connected to an OUT end of the converter U1, and a capacitor C9 is connected to an ENABLE end of the converter U1; the capacitor C19 is connected with resistors R8 and R11, one end of the resistor R8, which is far away from the resistor R11, is connected with the anode of a diode D2 and the cathode of a diode D3, the cathode of the diode D2 is connected with the emitter of a triode Q3 and a capacitor C13, the anode of the diode D3 is connected with a capacitor C18, two ends of the diode D3 are connected with a resistor R7 in parallel, a resistor R9 is arranged between the diode D3 and the base of the triode Q3, the collector of the triode Q3 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the base of a triode Q4; a collector of the triode Q4 is connected with one end of a resistor R4 and the capacitor C10, respectively, the other end of the resistor R4 is connected with one end of a resistor R3 and the capacitor C9, respectively, and the other end of the resistor R3 is connected with a negative electrode of a diode D1 and the capacitor C12; the capacitor C14 is connected with a source electrode of an MOS tube Q1, a grid electrode of the MOS tube Q1 is respectively connected with a resistor R2 and a resistor R6, the resistor R2 is connected with a collector electrode of a triode Q2, a base electrode of the triode Q2 is respectively connected with one end of the capacitor C11 and one end of a resistor R5, and the other end of the resistor R5 is connected with the resistor R6; the drain of the MOS transistor Q1 is connected to the capacitor C5, the capacitor C1 and the resistor R1, respectively.
Preferably, the converters U1, U2, U3 are dc/dc converters.
Preferably, the capacitors C1, C3, C5, C7, C13, C18, C14 and C16 are polar capacitors.
Preferably, the diode D1 is a zener diode.
The utility model has the advantages that: the utility model discloses can satisfy the last electric time sequence control of going up of 4 ways of power in concrete system application, the cooperation different DC/DC conversion unit can realize the multichannel power supply system of arbitrary voltage power in a flexible way and go up the electric time sequence demand.
Drawings
Fig. 1 is a circuit diagram of the power-on and power-off sequential control circuit of the multi-power system of the present invention;
fig. 2 is a timing diagram of the power-on/power-off timing control circuit of the multi-power supply system of the present invention.
Detailed Description
As shown in fig. 1-2, an embodiment of the present invention provides a power-on/power-off timing control circuit for a multi-power system, which includes three converters U1, U2 and U3; capacitors C14 and C15 and a system power supply VPPin are connected to a Vin end of the converter U3, capacitors C16 and C17 are connected to an OUT end of the converter U3, and a capacitor C19 is connected to an ENABLE end of the converter U3; capacitors C6 and C5 and a power supply VPP are connected to a Vin end of the converter U2, capacitors C7 and C8 are connected to an OUT end of the converter U2, and a capacitor C10 is connected to an ENABLE end of the converter U3; capacitors C1 and C2 and a power supply VPP are connected to a Vin end of the converter U1, capacitors C3 and C4 are connected to an OUT end of the converter U1, and a capacitor C9 is connected to an ENABLE end of the converter U1; the capacitor C19 is connected with resistors R8 and R11, one end of the resistor R8, which is far away from the resistor R11, is connected with the anode of a diode D2 and the cathode of a diode D3, the cathode of the diode D2 is connected with the emitter of a triode Q3 and a capacitor C13, the anode of the diode D3 is connected with a capacitor C18, two ends of the diode D3 are connected with a resistor R7 in parallel, a resistor R9 is arranged between the diode D3 and the base of the triode Q3, the collector of the triode Q3 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the base of a triode Q4; a collector of the triode Q4 is connected with one end of a resistor R4 and the capacitor C10, respectively, the other end of the resistor R4 is connected with one end of a resistor R3 and the capacitor C9, respectively, and the other end of the resistor R3 is connected with a negative electrode of a diode D1 and the capacitor C12; the capacitor C14 is connected with a source electrode of an MOS tube Q1, a grid electrode of the MOS tube Q1 is respectively connected with a resistor R2 and a resistor R6, the resistor R2 is connected with a collector electrode of a triode Q2, a base electrode of the triode Q2 is respectively connected with one end of the capacitor C11 and one end of a resistor R5, and the other end of the resistor R5 is connected with the resistor R6; the drain of the MOS transistor Q1 is connected to the capacitor C5, the capacitor C1 and the resistor R1, respectively.
In one embodiment, the converters U1, U2, U3 are dc/dc converters.
In one embodiment, the capacitors C1, C3, C5, C7, C13, C18, C14 and C16 are polar capacitors.
In one embodiment, the diode D1 is a zener diode.
The utility model discloses a theory of operation: referring to fig. 1 and 2, the timing control circuit is completed by two parts of power-on and power-off.
A power-on part: when a system input power source VPPin is started, VPPin charges a capacitor C19 through a resistor R8 and a resistor R11, when Vth3 is (1+ R8/R11) multiplied by VPPin, a converter U3 starts to work, the C19 is used for filtering noise to prevent the converter U3 from being started mistakenly, VDD required by the system is generated firstly, the system chip-level power supply is maintained, and the system starts to operate; the other branch of the VPP is conducted in a delayed mode through an MOS (metal oxide semiconductor) tube Q1 to supply power to an external power load, a resistor R5 and a capacitor C11 form charging delay, when the capacitor C11 is charged until a triode Q2 is conducted, the MOS tube Q1 is driven to be conducted, the drain electrode of the MOS tube Q1 outputs the VPP, and the values of the resistor R5 and the capacitor C11 are properly adjusted to meet the power-on time sequence requirement of the VPP. Under the action of VPP, a resistor R1, a diode D1 and a capacitor C12 generate 3V stabilized voltage, the capacitor C9 is charged through the resistor R3, and when the voltage of the capacitor C9 is charged to Vth1, a converter U1 starts and outputs voltage V1; parameters of the resistor R3 and the capacitor C9 are properly adjusted, so that the power-on time sequence requirement of V1 can be met; vth1 charges the capacitor C10 through the resistor R4, when the voltage of the capacitor C10 rises to Vth2, the converter U2 starts to start and outputs V2, and the power-on timing requirements of V2 can be met by properly adjusting the values of the resistor R4 and the capacitor C10; when VPPin is powered on, the capacitor Q4 is in a conducting state to assist in maintaining the power-on time sequence of V2, the diode D2 supplies power to the triode Q3 during the power-on period, the capacitor C13 is charged to VPPin, the resistor R7 also charges the capacitor C18 to VPPin, parameters of the resistor R7 and the capacitor C18 are properly adjusted, and the power-on time sequence requirement of V2 can be met.
The power-off part: when a system input power supply VPPin is disconnected, VPPin starts to exponentially decline, a capacitor C18 discharges through a diode D3, when Vc18 is smaller than VPPin-0.7V, a triode Q3 starts to be conducted, the capacitor C13 discharges through a triode Q3, a resistor R10 and a triode Q4, the triode Q4 is conducted, Vth2 is quickly pulled to the ground, a converter U2 stops working, V2 is turned off firstly, parameters of the capacitor C13 are properly adjusted to meet the conduction maintaining time of the triode Q4 in the whole dropping period of the VPPin, and the power-down time sequence of V2 is further ensured; with the conduction of the triode Q4, the capacitor C9 discharges through the resistor R4 and the triode Q4, when Vc9 is smaller than Vth1, the converter U1 stops working, the V1 is turned off at the same time, and the capacitor C9 and the resistor R4 are properly adjusted to simultaneously meet the power-down time sequence of V1 and the power-up time sequence of V2; with the descending of VPPin, the transistor Q4 keeps on conduction, when (1+ R8/R11). times.VPPin < Vth3, the converter U3 stops working, VDD discharges through the capacitor C16 and the capacitor C17 to maintain the operation of the system chip level, and the parameters of the capacitor C16 are properly adjusted to meet the power-down time sequence of VDD.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (4)
1. A multi-power system power-on and power-off sequential control circuit is characterized in that: includes three converters U1, U2, and U3;
capacitors C14 and C15 and a system power supply VPPin are connected to a Vin end of the converter U3, capacitors C16 and C17 are connected to an OUT end of the converter U3, and a capacitor C19 is connected to an ENABLE end of the converter U3;
capacitors C6 and C5 and a power supply VPP are connected to a Vin end of the converter U2, capacitors C7 and C8 are connected to an OUT end of the converter U2, and a capacitor C10 is connected to an ENABLE end of the converter U3;
capacitors C1 and C2 and a power supply VPP are connected to a Vin end of the converter U1, capacitors C3 and C4 are connected to an OUT end of the converter U1, and a capacitor C9 is connected to an ENABLE end of the converter U1;
the capacitor C19 is connected with resistors R8 and R11, one end of the resistor R8, which is far away from the resistor R11, is connected with the anode of a diode D2 and the cathode of a diode D3, the cathode of the diode D2 is connected with the emitter of a triode Q3 and a capacitor C13, the anode of the diode D3 is connected with a capacitor C18, two ends of the diode D3 are connected with a resistor R7 in parallel, a resistor R9 is arranged between the diode D3 and the base of the triode Q3, the collector of the triode Q3 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the base of a triode Q4; a collector of the triode Q4 is connected with one end of a resistor R4 and the capacitor C10, respectively, the other end of the resistor R4 is connected with one end of a resistor R3 and the capacitor C9, respectively, and the other end of the resistor R3 is connected with a negative electrode of a diode D1 and the capacitor C12;
the capacitor C14 is connected with a source electrode of an MOS tube Q1, a grid electrode of the MOS tube Q1 is respectively connected with a resistor R2 and a resistor R6, the resistor R2 is connected with a collector electrode of a triode Q2, a base electrode of the triode Q2 is respectively connected with one end of the capacitor C11 and one end of a resistor R5, and the other end of the resistor R5 is connected with the resistor R6;
the drain of the MOS transistor Q1 is connected to the capacitor C5, the capacitor C1 and the resistor R1, respectively.
2. The power-on/power-off timing control circuit of a multi-power-supply system according to claim 1, wherein: the converters U1, U2, U3 are dc/dc converters.
3. The power-on/power-off timing control circuit of a multi-power-supply system according to claim 1, wherein: the capacitors C1, C3, C5, C7, C13, C18, C14 and C16 are polar capacitors.
4. The power-on/power-off timing control circuit of a multi-power-supply system according to claim 1, wherein: the diode D1 is a zener diode.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921777167.3U CN210573309U (en) | 2019-10-22 | 2019-10-22 | Power-on and power-off time sequence control circuit of multi-power system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921777167.3U CN210573309U (en) | 2019-10-22 | 2019-10-22 | Power-on and power-off time sequence control circuit of multi-power system |
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| CN210573309U true CN210573309U (en) | 2020-05-19 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111884498A (en) * | 2020-08-28 | 2020-11-03 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
| CN112015114A (en) * | 2020-08-17 | 2020-12-01 | 上海集成电路研发中心有限公司 | Automatic control circuit for time sequence of multi-path power supply |
-
2019
- 2019-10-22 CN CN201921777167.3U patent/CN210573309U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112015114A (en) * | 2020-08-17 | 2020-12-01 | 上海集成电路研发中心有限公司 | Automatic control circuit for time sequence of multi-path power supply |
| CN112015114B (en) * | 2020-08-17 | 2021-11-19 | 上海集成电路研发中心有限公司 | Automatic control circuit for time sequence of multi-path power supply |
| CN111884498A (en) * | 2020-08-28 | 2020-11-03 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
| CN111884498B (en) * | 2020-08-28 | 2022-04-01 | 上海中兴易联通讯股份有限公司 | Power-down time sequence control circuit and method for multi-channel power supply of indoor distribution system |
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